[llvm] [AArch64] Tighten conditions for expanding GET_ACTIVE_LANE_MASK (PR #208962)

[Usman Nadeem via llvm-commits]

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@@ -284,118 +322,96 @@ define <2 x i1> @lane_mask_v2i1_i64(i64 %index, i64 %TC) {
   ret <2 x i1> %active.lane.mask
 }
 
+define <1 x i1> @lane_mask_v1i1_i64(i64 %index, i64 %TC) {
+; CHECK-LABEL: lane_mask_v1i1_i64:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    cmp x0, x1
+; CHECK-NEXT:    cset w0, lo
+; CHECK-NEXT:    ret
+  %active.lane.mask = call <1 x i1> @llvm.get.active.lane.mask.v1i1.i64(i64 %index, i64 %TC)
+  ret <1 x i1> %active.lane.mask
+}
+
+define void @lane_mask_v32i1_i8(i8 %index, i8 %TC) {
+; CHECK-LABEL: lane_mask_v32i1_i8:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    and w9, w0, #0xff
+; CHECK-NEXT:    mov w8, #255 // =0xff
+; CHECK-NEXT:    and w11, w1, #0xff
+; CHECK-NEXT:    add w10, w9, #16
+; CHECK-NEXT:    cmp w10, #255
+; CHECK-NEXT:    csel w8, w10, w8, lo
+; CHECK-NEXT:    whilelo p0.b, w9, w11
+; CHECK-NEXT:    whilelo p1.b, w8, w11
+; CHECK-NEXT:    mov z0.b, p0/z, #-1 // =0xffffffffffffffff
+; CHECK-NEXT:    mov z1.b, p1/z, #-1 // =0xffffffffffffffff
+; CHECK-NEXT:    // fake_use: $q0
+; CHECK-NEXT:    // fake_use: $q1
+; CHECK-NEXT:    ret
----------------
UsmanNadeem wrote:

This is still better than expansion: https://godbolt.org/z/dK6cK1df4 

https://github.com/llvm/llvm-project/pull/208962