[llvm] [RISCV] computeKnownBits - add support for RISCVISD::VECREDUCE_ADD_VL (PR #210493)

[Luke Lau via llvm-commits]

lukel97 wrote:

I think this might be stacked the wrong way around. Can you change this PR so it only implements RISCVISD::VECREDUCE_ADD_VL, and then once that lands revisit ISD::VECREDUCE_ADD?

https://github.com/llvm/llvm-project/pull/210493