[llvm] [AArch64] Add patterns for selecting dec from sub (PR #209467)
John Brawn via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 15 07:07:26 PDT 2026
john-brawn-arm wrote:
> To me this feels like it should be a canonicalisation to remove the need for what's effectively a duplicate set of patterns. Looking at `DAGCombiner::visitSUB()` I can see the combine exists but is currently restricted to single uses. I don't see a reason for that and think "vscale(imm)" should be treated like any other constant.
It looks like removing the single use restriction makes things worse in cases where vscale*-C can't be folded into all its uses, e.g. in multiple_uses_sub_vscale_i64 in llvm/test/CodeGen/AArch64/sve-vscale-combine.ll where currently we get
```
multiple_uses_sub_vscale_i64: // @multiple_uses_sub_vscale_i64
// %bb.0:
rdvl x8, #1
lsr x8, x8, #4
sub x9, x0, x8
add x8, x1, x8
mul x0, x9, x8
ret
```
but with doing that we get
```
multiple_uses_sub_vscale_i64: // @multiple_uses_sub_vscale_i64
// %bb.0:
rdvl x8, #1
rdvl x9, #-1
lsr x8, x8, #4
asr x9, x9, #4
add x9, x0, x9
add x8, x1, x8
mul x0, x9, x8
ret
```
There's no incq/decq instructions, so we need to do rdvl+shift to get vscale, and because we have both +vscale and -vscale we need to do it twice.
It also makes things worse for load/store addressing, e.g. in dech_inch_scalar_i64 in llvm/test/CodeGen/AArch64/sve-vl-arith.ll where we have ``store val (add x, vscale * -8)``. This gets selected to ``STR val, [x, vscale*-8]``, but there's no cnth with negative immediate so we end up with cnth+neg:
```
dech_inch_scalar_i64: // @dech_inch_scalar_i64
.cfi_startproc
// %bb.0:
cnth x8
inch x0
neg x8, x8
str x0, [x1, x8]
ret
```
https://github.com/llvm/llvm-project/pull/209467
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