[llvm] [ExpandMemCmp][RISCV] Expand memcmp/bcmp for aligned pointers on strict-align targets (PR #209738)
Pengcheng Wang via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 16 20:51:10 PDT 2026
https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/209738
>From 613a2b026651b970a2b2d160bfbfde2d44fa96bf Mon Sep 17 00:00:00 2001
From: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: Wed, 15 Jul 2026 18:41:31 +0800
Subject: [PATCH 1/7] [RISCV] Expand memcmp/bcmp for statically-aligned
pointers on strict-align targets
`RISCVTTIImpl::enableMemCmpExpansion` previously disabled `memcmp/bcmp`
expansion entirely when the target does not support unaligned scalar
memory accesses. This is more conservative than necessary: when both
pointers are statically known to be sufficiently aligned (a common
case, e.g. comparing two naturally-aligned i32 values), the expansion
would only ever emit naturally aligned loads, which are fine on
strict-align targets.
This PR adds an alignment-aware knob `RequireNaturalAlignment` to
`MemCmpExpansionOptions`. When set, `MemCmpExpansion` filters the
available load sizes per call site against the statically-known
common alignment of both pointers, keeping only power-of-two sizes
not exceeding that alignment, and falls back to the libcall when
nothing fits.
Because the greedy load sequence only places a load of size `S` at an
offset that is a multiple of `S`, such loads are guaranteed to be
naturally aligned.
Overlapping loads and merged (non-power-of-two) tail expansions are
disabled in this mode. The filtering is shared by all strict-align
targets rather than reimplemented per target.
RISCV opts in by setting `RequireNaturalAlignment` when unaligned
scalar memory is not supported.
Fixes #209511.
Assisted-by: TRAE CLI (DeepSeek V4 Pro)
---
.../llvm/Analysis/TargetTransformInfo.h | 8 +
.../Target/RISCV/RISCVTargetTransformInfo.cpp | 11 +-
llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp | 22 +
.../ExpandMemCmp/RISCV/lit.local.cfg | 2 +
.../ExpandMemCmp/RISCV/memcmp-strict-align.ll | 445 ++++++++++++++++++
5 files changed, 484 insertions(+), 4 deletions(-)
create mode 100644 llvm/test/Transforms/ExpandMemCmp/RISCV/lit.local.cfg
create mode 100644 llvm/test/Transforms/ExpandMemCmp/RISCV/memcmp-strict-align.ll
diff --git a/llvm/include/llvm/Analysis/TargetTransformInfo.h b/llvm/include/llvm/Analysis/TargetTransformInfo.h
index 10c0509460b95..dac9e1e4238ce 100644
--- a/llvm/include/llvm/Analysis/TargetTransformInfo.h
+++ b/llvm/include/llvm/Analysis/TargetTransformInfo.h
@@ -1132,6 +1132,14 @@ class TargetTransformInfo {
// requires all loads in LoadSizes to be doable in an unaligned way.
bool AllowOverlappingLoads = false;
+ // Set to true if the expansion may only emit naturally aligned loads.
+ // Strict-alignment targets that cannot perform unaligned scalar loads can
+ // still opt into expansion by setting this flag: MemCmpExpansion then only
+ // uses load sizes covered by the statically-known alignment of both
+ // pointers at the call site, falling back to the libcall when no load size
+ // fits. Should not be combined with AllowOverlappingLoads.
+ bool RequireNaturalAlignment = false;
+
// Sometimes, the amount of data that needs to be compared is smaller than
// the standard register size, but it cannot be loaded with just one load
// instruction. For example, if the size of the memory comparison is 6
diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index a50c1664ad5a1..ffd397e6be478 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -3630,14 +3630,17 @@ bool RISCVTTIImpl::isProfitableToSinkOperands(
RISCVTTIImpl::TTI::MemCmpExpansionOptions
RISCVTTIImpl::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const {
TTI::MemCmpExpansionOptions Options;
- // TODO: Enable expansion when unaligned access is not supported after we fix
- // issues in ExpandMemcmp.
- if (!ST->enableUnalignedScalarMem())
- return Options;
if (!ST->hasStdExtZbb() && !ST->hasStdExtZbkb() && !IsZeroCmp)
return Options;
+ // If the target does not support unaligned scalar memory access, expansion is
+ // still possible when both pointers are statically known to be sufficiently
+ // aligned. ExpandMemCmp will restrict the load sizes below to the ones
+ // covered by the known per-call-site alignment and fall back to the libcall
+ // when none fits.
+ Options.RequireNaturalAlignment = !ST->enableUnalignedScalarMem();
+
Options.AllowOverlappingLoads = true;
Options.MaxNumLoads = TLI->getMaxExpandSizeMemcmp(OptSize);
Options.NumLoadsPerBlock = Options.MaxNumLoads;
diff --git a/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp b/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
index fe55e0947ac82..19cda1fbba7e0 100644
--- a/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
+++ b/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
@@ -860,6 +860,28 @@ static bool expandMemCmp(CallInst *CI, const TargetTransformInfo *TTI,
if (!OptForSize && MaxLoadsPerMemcmp.getNumOccurrences())
Options.MaxNumLoads = MaxLoadsPerMemcmp;
+ if (Options.RequireNaturalAlignment) {
+ // The target can only perform naturally aligned loads. Keep the load sizes
+ // that are powers of two and no larger than the statically known alignment
+ // of both pointers. Because the greedy load sequence only places a load of
+ // size S at an offset that is a multiple of S, a power-of-two load that
+ // does not exceed the base alignment is guaranteed to be naturally aligned.
+ // Overlapping loads and merged tail expansions can produce unaligned or
+ // non-power-of-two accesses, so they are not used in this mode.
+ Options.AllowOverlappingLoads = false;
+ Options.AllowedTailExpansions.clear();
+ const Align LhsAlign = CI->getArgOperand(0)->getPointerAlignment(*DL);
+ const Align RhsAlign = CI->getArgOperand(1)->getPointerAlignment(*DL);
+ const uint64_t MinAlign = std::min(LhsAlign.value(), RhsAlign.value());
+ llvm::erase_if(Options.LoadSizes, [&](unsigned LoadSize) {
+ return LoadSize > MinAlign || !isPowerOf2_64(LoadSize);
+ });
+ // If only single-byte loads survive, inlining a byte-wise comparison offers
+ // no benefit over the library call, so leave it as a libcall.
+ if (Options.LoadSizes.empty() || Options.LoadSizes.front() == 1)
+ return false;
+ }
+
MemCmpExpansion Expansion(CI, SizeVal, Options, IsUsedForZeroCmp, *DL, DTU);
// Don't expand if this will require more loads than desired by the target.
diff --git a/llvm/test/Transforms/ExpandMemCmp/RISCV/lit.local.cfg b/llvm/test/Transforms/ExpandMemCmp/RISCV/lit.local.cfg
new file mode 100644
index 0000000000000..17351748513d9
--- /dev/null
+++ b/llvm/test/Transforms/ExpandMemCmp/RISCV/lit.local.cfg
@@ -0,0 +1,2 @@
+if not "RISCV" in config.root.targets:
+ config.unsupported = True
diff --git a/llvm/test/Transforms/ExpandMemCmp/RISCV/memcmp-strict-align.ll b/llvm/test/Transforms/ExpandMemCmp/RISCV/memcmp-strict-align.ll
new file mode 100644
index 0000000000000..9181326edcd6b
--- /dev/null
+++ b/llvm/test/Transforms/ExpandMemCmp/RISCV/memcmp-strict-align.ll
@@ -0,0 +1,445 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: sed 's/iXLen/i32/g' %s | opt -S -passes=expand-memcmp -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefixes=RV32
+; RUN: sed 's/iXLen/i64/g' %s | opt -S -passes=expand-memcmp -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefixes=RV64
+; RUN: sed 's/iXLen/i32/g' %s | opt -S -passes=expand-memcmp -mtriple=riscv32 -mattr=+m,+unaligned-scalar-mem | FileCheck %s --check-prefixes=RV32-UNALIGNED
+; RUN: sed 's/iXLen/i64/g' %s | opt -S -passes=expand-memcmp -mtriple=riscv64 -mattr=+m,+unaligned-scalar-mem | FileCheck %s --check-prefixes=RV64-UNALIGNED
+
+; On strict-alignment targets memcmp/bcmp is still expanded when both pointers
+; are statically known to be sufficiently aligned. The load sizes are limited
+; to the ones covered by the known alignment; when no load size fits the call
+; is left as a libcall.
+
+declare i32 @bcmp(ptr, ptr, iXLen)
+declare i32 @memcmp(ptr, ptr, iXLen)
+
+; Aligned U256 equality (the motivating case): expands into naturally aligned
+; loads even though the target cannot do unaligned scalar accesses.
+define i1 @bcmp_size_32_align_8(ptr align 8 %a, ptr align 8 %b) {
+; RV32-LABEL: define i1 @bcmp_size_32_align_8(
+; RV32-SAME: ptr align 8 [[A:%.*]], ptr align 8 [[B:%.*]]) #[[ATTR0:[0-9]+]] {
+; RV32-NEXT: [[TMP1:%.*]] = load i32, ptr [[A]], align 8
+; RV32-NEXT: [[TMP2:%.*]] = load i32, ptr [[B]], align 8
+; RV32-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1]], [[TMP2]]
+; RV32-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[A]], i64 4
+; RV32-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[B]], i64 4
+; RV32-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP4]], align 4
+; RV32-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP5]], align 4
+; RV32-NEXT: [[TMP8:%.*]] = xor i32 [[TMP6]], [[TMP7]]
+; RV32-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[A]], i64 8
+; RV32-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[B]], i64 8
+; RV32-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP9]], align 8
+; RV32-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP10]], align 8
+; RV32-NEXT: [[TMP13:%.*]] = xor i32 [[TMP11]], [[TMP12]]
+; RV32-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[A]], i64 12
+; RV32-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[B]], i64 12
+; RV32-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP14]], align 4
+; RV32-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP15]], align 4
+; RV32-NEXT: [[TMP18:%.*]] = xor i32 [[TMP16]], [[TMP17]]
+; RV32-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[A]], i64 16
+; RV32-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[B]], i64 16
+; RV32-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP19]], align 8
+; RV32-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP20]], align 8
+; RV32-NEXT: [[TMP23:%.*]] = xor i32 [[TMP21]], [[TMP22]]
+; RV32-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[A]], i64 20
+; RV32-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[B]], i64 20
+; RV32-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP24]], align 4
+; RV32-NEXT: [[TMP27:%.*]] = load i32, ptr [[TMP25]], align 4
+; RV32-NEXT: [[TMP28:%.*]] = xor i32 [[TMP26]], [[TMP27]]
+; RV32-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[A]], i64 24
+; RV32-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[B]], i64 24
+; RV32-NEXT: [[TMP31:%.*]] = load i32, ptr [[TMP29]], align 8
+; RV32-NEXT: [[TMP32:%.*]] = load i32, ptr [[TMP30]], align 8
+; RV32-NEXT: [[TMP33:%.*]] = xor i32 [[TMP31]], [[TMP32]]
+; RV32-NEXT: [[TMP34:%.*]] = getelementptr i8, ptr [[A]], i64 28
+; RV32-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr [[B]], i64 28
+; RV32-NEXT: [[TMP36:%.*]] = load i32, ptr [[TMP34]], align 4
+; RV32-NEXT: [[TMP37:%.*]] = load i32, ptr [[TMP35]], align 4
+; RV32-NEXT: [[TMP38:%.*]] = xor i32 [[TMP36]], [[TMP37]]
+; RV32-NEXT: [[TMP39:%.*]] = or i32 [[TMP3]], [[TMP8]]
+; RV32-NEXT: [[TMP40:%.*]] = or i32 [[TMP13]], [[TMP18]]
+; RV32-NEXT: [[TMP41:%.*]] = or i32 [[TMP23]], [[TMP28]]
+; RV32-NEXT: [[TMP42:%.*]] = or i32 [[TMP33]], [[TMP38]]
+; RV32-NEXT: [[TMP43:%.*]] = or i32 [[TMP39]], [[TMP40]]
+; RV32-NEXT: [[TMP44:%.*]] = or i32 [[TMP41]], [[TMP42]]
+; RV32-NEXT: [[TMP45:%.*]] = or i32 [[TMP43]], [[TMP44]]
+; RV32-NEXT: [[TMP46:%.*]] = icmp ne i32 [[TMP45]], 0
+; RV32-NEXT: [[TMP47:%.*]] = zext i1 [[TMP46]] to i32
+; RV32-NEXT: [[Z:%.*]] = icmp eq i32 [[TMP47]], 0
+; RV32-NEXT: ret i1 [[Z]]
+;
+; RV64-LABEL: define i1 @bcmp_size_32_align_8(
+; RV64-SAME: ptr align 8 [[A:%.*]], ptr align 8 [[B:%.*]]) #[[ATTR0:[0-9]+]] {
+; RV64-NEXT: [[TMP1:%.*]] = load i64, ptr [[A]], align 8
+; RV64-NEXT: [[TMP2:%.*]] = load i64, ptr [[B]], align 8
+; RV64-NEXT: [[TMP3:%.*]] = xor i64 [[TMP1]], [[TMP2]]
+; RV64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[A]], i64 8
+; RV64-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[B]], i64 8
+; RV64-NEXT: [[TMP6:%.*]] = load i64, ptr [[TMP4]], align 8
+; RV64-NEXT: [[TMP7:%.*]] = load i64, ptr [[TMP5]], align 8
+; RV64-NEXT: [[TMP8:%.*]] = xor i64 [[TMP6]], [[TMP7]]
+; RV64-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[A]], i64 16
+; RV64-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[B]], i64 16
+; RV64-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP9]], align 8
+; RV64-NEXT: [[TMP12:%.*]] = load i64, ptr [[TMP10]], align 8
+; RV64-NEXT: [[TMP13:%.*]] = xor i64 [[TMP11]], [[TMP12]]
+; RV64-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[A]], i64 24
+; RV64-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[B]], i64 24
+; RV64-NEXT: [[TMP16:%.*]] = load i64, ptr [[TMP14]], align 8
+; RV64-NEXT: [[TMP17:%.*]] = load i64, ptr [[TMP15]], align 8
+; RV64-NEXT: [[TMP18:%.*]] = xor i64 [[TMP16]], [[TMP17]]
+; RV64-NEXT: [[TMP19:%.*]] = or i64 [[TMP3]], [[TMP8]]
+; RV64-NEXT: [[TMP20:%.*]] = or i64 [[TMP13]], [[TMP18]]
+; RV64-NEXT: [[TMP21:%.*]] = or i64 [[TMP19]], [[TMP20]]
+; RV64-NEXT: [[TMP22:%.*]] = icmp ne i64 [[TMP21]], 0
+; RV64-NEXT: [[TMP23:%.*]] = zext i1 [[TMP22]] to i32
+; RV64-NEXT: [[Z:%.*]] = icmp eq i32 [[TMP23]], 0
+; RV64-NEXT: ret i1 [[Z]]
+;
+; RV32-UNALIGNED-LABEL: define i1 @bcmp_size_32_align_8(
+; RV32-UNALIGNED-SAME: ptr align 8 [[A:%.*]], ptr align 8 [[B:%.*]]) #[[ATTR0:[0-9]+]] {
+; RV32-UNALIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr [[A]], align 8
+; RV32-UNALIGNED-NEXT: [[TMP2:%.*]] = load i32, ptr [[B]], align 8
+; RV32-UNALIGNED-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1]], [[TMP2]]
+; RV32-UNALIGNED-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[A]], i64 4
+; RV32-UNALIGNED-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[B]], i64 4
+; RV32-UNALIGNED-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP4]], align 4
+; RV32-UNALIGNED-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP5]], align 4
+; RV32-UNALIGNED-NEXT: [[TMP8:%.*]] = xor i32 [[TMP6]], [[TMP7]]
+; RV32-UNALIGNED-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[A]], i64 8
+; RV32-UNALIGNED-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[B]], i64 8
+; RV32-UNALIGNED-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP9]], align 8
+; RV32-UNALIGNED-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP10]], align 8
+; RV32-UNALIGNED-NEXT: [[TMP13:%.*]] = xor i32 [[TMP11]], [[TMP12]]
+; RV32-UNALIGNED-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[A]], i64 12
+; RV32-UNALIGNED-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[B]], i64 12
+; RV32-UNALIGNED-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP14]], align 4
+; RV32-UNALIGNED-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP15]], align 4
+; RV32-UNALIGNED-NEXT: [[TMP18:%.*]] = xor i32 [[TMP16]], [[TMP17]]
+; RV32-UNALIGNED-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[A]], i64 16
+; RV32-UNALIGNED-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[B]], i64 16
+; RV32-UNALIGNED-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP19]], align 8
+; RV32-UNALIGNED-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP20]], align 8
+; RV32-UNALIGNED-NEXT: [[TMP23:%.*]] = xor i32 [[TMP21]], [[TMP22]]
+; RV32-UNALIGNED-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[A]], i64 20
+; RV32-UNALIGNED-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[B]], i64 20
+; RV32-UNALIGNED-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP24]], align 4
+; RV32-UNALIGNED-NEXT: [[TMP27:%.*]] = load i32, ptr [[TMP25]], align 4
+; RV32-UNALIGNED-NEXT: [[TMP28:%.*]] = xor i32 [[TMP26]], [[TMP27]]
+; RV32-UNALIGNED-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[A]], i64 24
+; RV32-UNALIGNED-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[B]], i64 24
+; RV32-UNALIGNED-NEXT: [[TMP31:%.*]] = load i32, ptr [[TMP29]], align 8
+; RV32-UNALIGNED-NEXT: [[TMP32:%.*]] = load i32, ptr [[TMP30]], align 8
+; RV32-UNALIGNED-NEXT: [[TMP33:%.*]] = xor i32 [[TMP31]], [[TMP32]]
+; RV32-UNALIGNED-NEXT: [[TMP34:%.*]] = getelementptr i8, ptr [[A]], i64 28
+; RV32-UNALIGNED-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr [[B]], i64 28
+; RV32-UNALIGNED-NEXT: [[TMP36:%.*]] = load i32, ptr [[TMP34]], align 4
+; RV32-UNALIGNED-NEXT: [[TMP37:%.*]] = load i32, ptr [[TMP35]], align 4
+; RV32-UNALIGNED-NEXT: [[TMP38:%.*]] = xor i32 [[TMP36]], [[TMP37]]
+; RV32-UNALIGNED-NEXT: [[TMP39:%.*]] = or i32 [[TMP3]], [[TMP8]]
+; RV32-UNALIGNED-NEXT: [[TMP40:%.*]] = or i32 [[TMP13]], [[TMP18]]
+; RV32-UNALIGNED-NEXT: [[TMP41:%.*]] = or i32 [[TMP23]], [[TMP28]]
+; RV32-UNALIGNED-NEXT: [[TMP42:%.*]] = or i32 [[TMP33]], [[TMP38]]
+; RV32-UNALIGNED-NEXT: [[TMP43:%.*]] = or i32 [[TMP39]], [[TMP40]]
+; RV32-UNALIGNED-NEXT: [[TMP44:%.*]] = or i32 [[TMP41]], [[TMP42]]
+; RV32-UNALIGNED-NEXT: [[TMP45:%.*]] = or i32 [[TMP43]], [[TMP44]]
+; RV32-UNALIGNED-NEXT: [[TMP46:%.*]] = icmp ne i32 [[TMP45]], 0
+; RV32-UNALIGNED-NEXT: [[TMP47:%.*]] = zext i1 [[TMP46]] to i32
+; RV32-UNALIGNED-NEXT: [[Z:%.*]] = icmp eq i32 [[TMP47]], 0
+; RV32-UNALIGNED-NEXT: ret i1 [[Z]]
+;
+; RV64-UNALIGNED-LABEL: define i1 @bcmp_size_32_align_8(
+; RV64-UNALIGNED-SAME: ptr align 8 [[A:%.*]], ptr align 8 [[B:%.*]]) #[[ATTR0:[0-9]+]] {
+; RV64-UNALIGNED-NEXT: [[TMP1:%.*]] = load i64, ptr [[A]], align 8
+; RV64-UNALIGNED-NEXT: [[TMP2:%.*]] = load i64, ptr [[B]], align 8
+; RV64-UNALIGNED-NEXT: [[TMP3:%.*]] = xor i64 [[TMP1]], [[TMP2]]
+; RV64-UNALIGNED-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[A]], i64 8
+; RV64-UNALIGNED-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[B]], i64 8
+; RV64-UNALIGNED-NEXT: [[TMP6:%.*]] = load i64, ptr [[TMP4]], align 8
+; RV64-UNALIGNED-NEXT: [[TMP7:%.*]] = load i64, ptr [[TMP5]], align 8
+; RV64-UNALIGNED-NEXT: [[TMP8:%.*]] = xor i64 [[TMP6]], [[TMP7]]
+; RV64-UNALIGNED-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[A]], i64 16
+; RV64-UNALIGNED-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[B]], i64 16
+; RV64-UNALIGNED-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP9]], align 8
+; RV64-UNALIGNED-NEXT: [[TMP12:%.*]] = load i64, ptr [[TMP10]], align 8
+; RV64-UNALIGNED-NEXT: [[TMP13:%.*]] = xor i64 [[TMP11]], [[TMP12]]
+; RV64-UNALIGNED-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[A]], i64 24
+; RV64-UNALIGNED-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[B]], i64 24
+; RV64-UNALIGNED-NEXT: [[TMP16:%.*]] = load i64, ptr [[TMP14]], align 8
+; RV64-UNALIGNED-NEXT: [[TMP17:%.*]] = load i64, ptr [[TMP15]], align 8
+; RV64-UNALIGNED-NEXT: [[TMP18:%.*]] = xor i64 [[TMP16]], [[TMP17]]
+; RV64-UNALIGNED-NEXT: [[TMP19:%.*]] = or i64 [[TMP3]], [[TMP8]]
+; RV64-UNALIGNED-NEXT: [[TMP20:%.*]] = or i64 [[TMP13]], [[TMP18]]
+; RV64-UNALIGNED-NEXT: [[TMP21:%.*]] = or i64 [[TMP19]], [[TMP20]]
+; RV64-UNALIGNED-NEXT: [[TMP22:%.*]] = icmp ne i64 [[TMP21]], 0
+; RV64-UNALIGNED-NEXT: [[TMP23:%.*]] = zext i1 [[TMP22]] to i32
+; RV64-UNALIGNED-NEXT: [[Z:%.*]] = icmp eq i32 [[TMP23]], 0
+; RV64-UNALIGNED-NEXT: ret i1 [[Z]]
+;
+ %r = call i32 @bcmp(ptr %a, ptr %b, iXLen 32)
+ %z = icmp eq i32 %r, 0
+ ret i1 %z
+}
+
+; No known alignment: on strict-alignment targets nothing but i8 loads would be
+; legal, so the libcall is kept.
+define i1 @bcmp_size_32_align_1(ptr %a, ptr %b) {
+; RV32-LABEL: define i1 @bcmp_size_32_align_1(
+; RV32-SAME: ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0]] {
+; RV32-NEXT: [[R:%.*]] = call i32 @bcmp(ptr [[A]], ptr [[B]], i32 32)
+; RV32-NEXT: [[Z:%.*]] = icmp eq i32 [[R]], 0
+; RV32-NEXT: ret i1 [[Z]]
+;
+; RV64-LABEL: define i1 @bcmp_size_32_align_1(
+; RV64-SAME: ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0]] {
+; RV64-NEXT: [[R:%.*]] = call i32 @bcmp(ptr [[A]], ptr [[B]], i64 32)
+; RV64-NEXT: [[Z:%.*]] = icmp eq i32 [[R]], 0
+; RV64-NEXT: ret i1 [[Z]]
+;
+; RV32-UNALIGNED-LABEL: define i1 @bcmp_size_32_align_1(
+; RV32-UNALIGNED-SAME: ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0]] {
+; RV32-UNALIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr [[A]], align 1
+; RV32-UNALIGNED-NEXT: [[TMP2:%.*]] = load i32, ptr [[B]], align 1
+; RV32-UNALIGNED-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1]], [[TMP2]]
+; RV32-UNALIGNED-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[A]], i64 4
+; RV32-UNALIGNED-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[B]], i64 4
+; RV32-UNALIGNED-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP4]], align 1
+; RV32-UNALIGNED-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP5]], align 1
+; RV32-UNALIGNED-NEXT: [[TMP8:%.*]] = xor i32 [[TMP6]], [[TMP7]]
+; RV32-UNALIGNED-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[A]], i64 8
+; RV32-UNALIGNED-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[B]], i64 8
+; RV32-UNALIGNED-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP9]], align 1
+; RV32-UNALIGNED-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP10]], align 1
+; RV32-UNALIGNED-NEXT: [[TMP13:%.*]] = xor i32 [[TMP11]], [[TMP12]]
+; RV32-UNALIGNED-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[A]], i64 12
+; RV32-UNALIGNED-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[B]], i64 12
+; RV32-UNALIGNED-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP14]], align 1
+; RV32-UNALIGNED-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP15]], align 1
+; RV32-UNALIGNED-NEXT: [[TMP18:%.*]] = xor i32 [[TMP16]], [[TMP17]]
+; RV32-UNALIGNED-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[A]], i64 16
+; RV32-UNALIGNED-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[B]], i64 16
+; RV32-UNALIGNED-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP19]], align 1
+; RV32-UNALIGNED-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP20]], align 1
+; RV32-UNALIGNED-NEXT: [[TMP23:%.*]] = xor i32 [[TMP21]], [[TMP22]]
+; RV32-UNALIGNED-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[A]], i64 20
+; RV32-UNALIGNED-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[B]], i64 20
+; RV32-UNALIGNED-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP24]], align 1
+; RV32-UNALIGNED-NEXT: [[TMP27:%.*]] = load i32, ptr [[TMP25]], align 1
+; RV32-UNALIGNED-NEXT: [[TMP28:%.*]] = xor i32 [[TMP26]], [[TMP27]]
+; RV32-UNALIGNED-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[A]], i64 24
+; RV32-UNALIGNED-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[B]], i64 24
+; RV32-UNALIGNED-NEXT: [[TMP31:%.*]] = load i32, ptr [[TMP29]], align 1
+; RV32-UNALIGNED-NEXT: [[TMP32:%.*]] = load i32, ptr [[TMP30]], align 1
+; RV32-UNALIGNED-NEXT: [[TMP33:%.*]] = xor i32 [[TMP31]], [[TMP32]]
+; RV32-UNALIGNED-NEXT: [[TMP34:%.*]] = getelementptr i8, ptr [[A]], i64 28
+; RV32-UNALIGNED-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr [[B]], i64 28
+; RV32-UNALIGNED-NEXT: [[TMP36:%.*]] = load i32, ptr [[TMP34]], align 1
+; RV32-UNALIGNED-NEXT: [[TMP37:%.*]] = load i32, ptr [[TMP35]], align 1
+; RV32-UNALIGNED-NEXT: [[TMP38:%.*]] = xor i32 [[TMP36]], [[TMP37]]
+; RV32-UNALIGNED-NEXT: [[TMP39:%.*]] = or i32 [[TMP3]], [[TMP8]]
+; RV32-UNALIGNED-NEXT: [[TMP40:%.*]] = or i32 [[TMP13]], [[TMP18]]
+; RV32-UNALIGNED-NEXT: [[TMP41:%.*]] = or i32 [[TMP23]], [[TMP28]]
+; RV32-UNALIGNED-NEXT: [[TMP42:%.*]] = or i32 [[TMP33]], [[TMP38]]
+; RV32-UNALIGNED-NEXT: [[TMP43:%.*]] = or i32 [[TMP39]], [[TMP40]]
+; RV32-UNALIGNED-NEXT: [[TMP44:%.*]] = or i32 [[TMP41]], [[TMP42]]
+; RV32-UNALIGNED-NEXT: [[TMP45:%.*]] = or i32 [[TMP43]], [[TMP44]]
+; RV32-UNALIGNED-NEXT: [[TMP46:%.*]] = icmp ne i32 [[TMP45]], 0
+; RV32-UNALIGNED-NEXT: [[TMP47:%.*]] = zext i1 [[TMP46]] to i32
+; RV32-UNALIGNED-NEXT: [[Z:%.*]] = icmp eq i32 [[TMP47]], 0
+; RV32-UNALIGNED-NEXT: ret i1 [[Z]]
+;
+; RV64-UNALIGNED-LABEL: define i1 @bcmp_size_32_align_1(
+; RV64-UNALIGNED-SAME: ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0]] {
+; RV64-UNALIGNED-NEXT: [[TMP1:%.*]] = load i64, ptr [[A]], align 1
+; RV64-UNALIGNED-NEXT: [[TMP2:%.*]] = load i64, ptr [[B]], align 1
+; RV64-UNALIGNED-NEXT: [[TMP3:%.*]] = xor i64 [[TMP1]], [[TMP2]]
+; RV64-UNALIGNED-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[A]], i64 8
+; RV64-UNALIGNED-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[B]], i64 8
+; RV64-UNALIGNED-NEXT: [[TMP6:%.*]] = load i64, ptr [[TMP4]], align 1
+; RV64-UNALIGNED-NEXT: [[TMP7:%.*]] = load i64, ptr [[TMP5]], align 1
+; RV64-UNALIGNED-NEXT: [[TMP8:%.*]] = xor i64 [[TMP6]], [[TMP7]]
+; RV64-UNALIGNED-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[A]], i64 16
+; RV64-UNALIGNED-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[B]], i64 16
+; RV64-UNALIGNED-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP9]], align 1
+; RV64-UNALIGNED-NEXT: [[TMP12:%.*]] = load i64, ptr [[TMP10]], align 1
+; RV64-UNALIGNED-NEXT: [[TMP13:%.*]] = xor i64 [[TMP11]], [[TMP12]]
+; RV64-UNALIGNED-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[A]], i64 24
+; RV64-UNALIGNED-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[B]], i64 24
+; RV64-UNALIGNED-NEXT: [[TMP16:%.*]] = load i64, ptr [[TMP14]], align 1
+; RV64-UNALIGNED-NEXT: [[TMP17:%.*]] = load i64, ptr [[TMP15]], align 1
+; RV64-UNALIGNED-NEXT: [[TMP18:%.*]] = xor i64 [[TMP16]], [[TMP17]]
+; RV64-UNALIGNED-NEXT: [[TMP19:%.*]] = or i64 [[TMP3]], [[TMP8]]
+; RV64-UNALIGNED-NEXT: [[TMP20:%.*]] = or i64 [[TMP13]], [[TMP18]]
+; RV64-UNALIGNED-NEXT: [[TMP21:%.*]] = or i64 [[TMP19]], [[TMP20]]
+; RV64-UNALIGNED-NEXT: [[TMP22:%.*]] = icmp ne i64 [[TMP21]], 0
+; RV64-UNALIGNED-NEXT: [[TMP23:%.*]] = zext i1 [[TMP22]] to i32
+; RV64-UNALIGNED-NEXT: [[Z:%.*]] = icmp eq i32 [[TMP23]], 0
+; RV64-UNALIGNED-NEXT: ret i1 [[Z]]
+;
+ %r = call i32 @bcmp(ptr %a, ptr %b, iXLen 32)
+ %z = icmp eq i32 %r, 0
+ ret i1 %z
+}
+
+; Only i16 loads are naturally aligned for align-2 pointers.
+define i1 @bcmp_size_4_align_2(ptr align 2 %a, ptr align 2 %b) {
+; RV32-LABEL: define i1 @bcmp_size_4_align_2(
+; RV32-SAME: ptr align 2 [[A:%.*]], ptr align 2 [[B:%.*]]) #[[ATTR0]] {
+; RV32-NEXT: [[TMP1:%.*]] = load i16, ptr [[A]], align 2
+; RV32-NEXT: [[TMP2:%.*]] = load i16, ptr [[B]], align 2
+; RV32-NEXT: [[TMP3:%.*]] = xor i16 [[TMP1]], [[TMP2]]
+; RV32-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[A]], i64 2
+; RV32-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[B]], i64 2
+; RV32-NEXT: [[TMP6:%.*]] = load i16, ptr [[TMP4]], align 2
+; RV32-NEXT: [[TMP7:%.*]] = load i16, ptr [[TMP5]], align 2
+; RV32-NEXT: [[TMP8:%.*]] = xor i16 [[TMP6]], [[TMP7]]
+; RV32-NEXT: [[TMP9:%.*]] = or i16 [[TMP3]], [[TMP8]]
+; RV32-NEXT: [[TMP10:%.*]] = icmp ne i16 [[TMP9]], 0
+; RV32-NEXT: [[TMP11:%.*]] = zext i1 [[TMP10]] to i32
+; RV32-NEXT: [[Z:%.*]] = icmp eq i32 [[TMP11]], 0
+; RV32-NEXT: ret i1 [[Z]]
+;
+; RV64-LABEL: define i1 @bcmp_size_4_align_2(
+; RV64-SAME: ptr align 2 [[A:%.*]], ptr align 2 [[B:%.*]]) #[[ATTR0]] {
+; RV64-NEXT: [[TMP1:%.*]] = load i16, ptr [[A]], align 2
+; RV64-NEXT: [[TMP2:%.*]] = load i16, ptr [[B]], align 2
+; RV64-NEXT: [[TMP3:%.*]] = xor i16 [[TMP1]], [[TMP2]]
+; RV64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[A]], i64 2
+; RV64-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[B]], i64 2
+; RV64-NEXT: [[TMP6:%.*]] = load i16, ptr [[TMP4]], align 2
+; RV64-NEXT: [[TMP7:%.*]] = load i16, ptr [[TMP5]], align 2
+; RV64-NEXT: [[TMP8:%.*]] = xor i16 [[TMP6]], [[TMP7]]
+; RV64-NEXT: [[TMP9:%.*]] = or i16 [[TMP3]], [[TMP8]]
+; RV64-NEXT: [[TMP10:%.*]] = icmp ne i16 [[TMP9]], 0
+; RV64-NEXT: [[TMP11:%.*]] = zext i1 [[TMP10]] to i32
+; RV64-NEXT: [[Z:%.*]] = icmp eq i32 [[TMP11]], 0
+; RV64-NEXT: ret i1 [[Z]]
+;
+; RV32-UNALIGNED-LABEL: define i1 @bcmp_size_4_align_2(
+; RV32-UNALIGNED-SAME: ptr align 2 [[A:%.*]], ptr align 2 [[B:%.*]]) #[[ATTR0]] {
+; RV32-UNALIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr [[A]], align 2
+; RV32-UNALIGNED-NEXT: [[TMP2:%.*]] = load i32, ptr [[B]], align 2
+; RV32-UNALIGNED-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP1]], [[TMP2]]
+; RV32-UNALIGNED-NEXT: [[TMP4:%.*]] = zext i1 [[TMP3]] to i32
+; RV32-UNALIGNED-NEXT: [[Z:%.*]] = icmp eq i32 [[TMP4]], 0
+; RV32-UNALIGNED-NEXT: ret i1 [[Z]]
+;
+; RV64-UNALIGNED-LABEL: define i1 @bcmp_size_4_align_2(
+; RV64-UNALIGNED-SAME: ptr align 2 [[A:%.*]], ptr align 2 [[B:%.*]]) #[[ATTR0]] {
+; RV64-UNALIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr [[A]], align 2
+; RV64-UNALIGNED-NEXT: [[TMP2:%.*]] = load i32, ptr [[B]], align 2
+; RV64-UNALIGNED-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP1]], [[TMP2]]
+; RV64-UNALIGNED-NEXT: [[TMP4:%.*]] = zext i1 [[TMP3]] to i32
+; RV64-UNALIGNED-NEXT: [[Z:%.*]] = icmp eq i32 [[TMP4]], 0
+; RV64-UNALIGNED-NEXT: ret i1 [[Z]]
+;
+ %r = call i32 @bcmp(ptr %a, ptr %b, iXLen 4)
+ %z = icmp eq i32 %r, 0
+ ret i1 %z
+}
+
+; align-4 caps the load width at i32 even on RV64.
+define i1 @bcmp_size_16_align_4(ptr align 4 %a, ptr align 4 %b) {
+; RV32-LABEL: define i1 @bcmp_size_16_align_4(
+; RV32-SAME: ptr align 4 [[A:%.*]], ptr align 4 [[B:%.*]]) #[[ATTR0]] {
+; RV32-NEXT: [[TMP1:%.*]] = load i32, ptr [[A]], align 4
+; RV32-NEXT: [[TMP2:%.*]] = load i32, ptr [[B]], align 4
+; RV32-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1]], [[TMP2]]
+; RV32-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[A]], i64 4
+; RV32-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[B]], i64 4
+; RV32-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP4]], align 4
+; RV32-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP5]], align 4
+; RV32-NEXT: [[TMP8:%.*]] = xor i32 [[TMP6]], [[TMP7]]
+; RV32-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[A]], i64 8
+; RV32-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[B]], i64 8
+; RV32-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP9]], align 4
+; RV32-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP10]], align 4
+; RV32-NEXT: [[TMP13:%.*]] = xor i32 [[TMP11]], [[TMP12]]
+; RV32-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[A]], i64 12
+; RV32-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[B]], i64 12
+; RV32-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP14]], align 4
+; RV32-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP15]], align 4
+; RV32-NEXT: [[TMP18:%.*]] = xor i32 [[TMP16]], [[TMP17]]
+; RV32-NEXT: [[TMP19:%.*]] = or i32 [[TMP3]], [[TMP8]]
+; RV32-NEXT: [[TMP20:%.*]] = or i32 [[TMP13]], [[TMP18]]
+; RV32-NEXT: [[TMP21:%.*]] = or i32 [[TMP19]], [[TMP20]]
+; RV32-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
+; RV32-NEXT: [[TMP23:%.*]] = zext i1 [[TMP22]] to i32
+; RV32-NEXT: [[Z:%.*]] = icmp eq i32 [[TMP23]], 0
+; RV32-NEXT: ret i1 [[Z]]
+;
+; RV64-LABEL: define i1 @bcmp_size_16_align_4(
+; RV64-SAME: ptr align 4 [[A:%.*]], ptr align 4 [[B:%.*]]) #[[ATTR0]] {
+; RV64-NEXT: [[TMP1:%.*]] = load i32, ptr [[A]], align 4
+; RV64-NEXT: [[TMP2:%.*]] = load i32, ptr [[B]], align 4
+; RV64-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1]], [[TMP2]]
+; RV64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[A]], i64 4
+; RV64-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[B]], i64 4
+; RV64-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP4]], align 4
+; RV64-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP5]], align 4
+; RV64-NEXT: [[TMP8:%.*]] = xor i32 [[TMP6]], [[TMP7]]
+; RV64-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[A]], i64 8
+; RV64-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[B]], i64 8
+; RV64-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP9]], align 4
+; RV64-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP10]], align 4
+; RV64-NEXT: [[TMP13:%.*]] = xor i32 [[TMP11]], [[TMP12]]
+; RV64-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[A]], i64 12
+; RV64-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[B]], i64 12
+; RV64-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP14]], align 4
+; RV64-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP15]], align 4
+; RV64-NEXT: [[TMP18:%.*]] = xor i32 [[TMP16]], [[TMP17]]
+; RV64-NEXT: [[TMP19:%.*]] = or i32 [[TMP3]], [[TMP8]]
+; RV64-NEXT: [[TMP20:%.*]] = or i32 [[TMP13]], [[TMP18]]
+; RV64-NEXT: [[TMP21:%.*]] = or i32 [[TMP19]], [[TMP20]]
+; RV64-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
+; RV64-NEXT: [[TMP23:%.*]] = zext i1 [[TMP22]] to i32
+; RV64-NEXT: [[Z:%.*]] = icmp eq i32 [[TMP23]], 0
+; RV64-NEXT: ret i1 [[Z]]
+;
+; RV32-UNALIGNED-LABEL: define i1 @bcmp_size_16_align_4(
+; RV32-UNALIGNED-SAME: ptr align 4 [[A:%.*]], ptr align 4 [[B:%.*]]) #[[ATTR0]] {
+; RV32-UNALIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr [[A]], align 4
+; RV32-UNALIGNED-NEXT: [[TMP2:%.*]] = load i32, ptr [[B]], align 4
+; RV32-UNALIGNED-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1]], [[TMP2]]
+; RV32-UNALIGNED-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[A]], i64 4
+; RV32-UNALIGNED-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[B]], i64 4
+; RV32-UNALIGNED-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP4]], align 4
+; RV32-UNALIGNED-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP5]], align 4
+; RV32-UNALIGNED-NEXT: [[TMP8:%.*]] = xor i32 [[TMP6]], [[TMP7]]
+; RV32-UNALIGNED-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[A]], i64 8
+; RV32-UNALIGNED-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[B]], i64 8
+; RV32-UNALIGNED-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP9]], align 4
+; RV32-UNALIGNED-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP10]], align 4
+; RV32-UNALIGNED-NEXT: [[TMP13:%.*]] = xor i32 [[TMP11]], [[TMP12]]
+; RV32-UNALIGNED-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[A]], i64 12
+; RV32-UNALIGNED-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[B]], i64 12
+; RV32-UNALIGNED-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP14]], align 4
+; RV32-UNALIGNED-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP15]], align 4
+; RV32-UNALIGNED-NEXT: [[TMP18:%.*]] = xor i32 [[TMP16]], [[TMP17]]
+; RV32-UNALIGNED-NEXT: [[TMP19:%.*]] = or i32 [[TMP3]], [[TMP8]]
+; RV32-UNALIGNED-NEXT: [[TMP20:%.*]] = or i32 [[TMP13]], [[TMP18]]
+; RV32-UNALIGNED-NEXT: [[TMP21:%.*]] = or i32 [[TMP19]], [[TMP20]]
+; RV32-UNALIGNED-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
+; RV32-UNALIGNED-NEXT: [[TMP23:%.*]] = zext i1 [[TMP22]] to i32
+; RV32-UNALIGNED-NEXT: [[Z:%.*]] = icmp eq i32 [[TMP23]], 0
+; RV32-UNALIGNED-NEXT: ret i1 [[Z]]
+;
+; RV64-UNALIGNED-LABEL: define i1 @bcmp_size_16_align_4(
+; RV64-UNALIGNED-SAME: ptr align 4 [[A:%.*]], ptr align 4 [[B:%.*]]) #[[ATTR0]] {
+; RV64-UNALIGNED-NEXT: [[TMP1:%.*]] = load i64, ptr [[A]], align 4
+; RV64-UNALIGNED-NEXT: [[TMP2:%.*]] = load i64, ptr [[B]], align 4
+; RV64-UNALIGNED-NEXT: [[TMP3:%.*]] = xor i64 [[TMP1]], [[TMP2]]
+; RV64-UNALIGNED-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[A]], i64 8
+; RV64-UNALIGNED-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[B]], i64 8
+; RV64-UNALIGNED-NEXT: [[TMP6:%.*]] = load i64, ptr [[TMP4]], align 4
+; RV64-UNALIGNED-NEXT: [[TMP7:%.*]] = load i64, ptr [[TMP5]], align 4
+; RV64-UNALIGNED-NEXT: [[TMP8:%.*]] = xor i64 [[TMP6]], [[TMP7]]
+; RV64-UNALIGNED-NEXT: [[TMP9:%.*]] = or i64 [[TMP3]], [[TMP8]]
+; RV64-UNALIGNED-NEXT: [[TMP10:%.*]] = icmp ne i64 [[TMP9]], 0
+; RV64-UNALIGNED-NEXT: [[TMP11:%.*]] = zext i1 [[TMP10]] to i32
+; RV64-UNALIGNED-NEXT: [[Z:%.*]] = icmp eq i32 [[TMP11]], 0
+; RV64-UNALIGNED-NEXT: ret i1 [[Z]]
+;
+ %r = call i32 @bcmp(ptr %a, ptr %b, iXLen 16)
+ %z = icmp eq i32 %r, 0
+ ret i1 %z
+}
>From 1cc801a998cdcdb6ea0e5b7224e5a1123050fdfc Mon Sep 17 00:00:00 2001
From: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: Thu, 16 Jul 2026 15:02:02 +0800
Subject: [PATCH 2/7] [ExpandMemCmp] Inline small compares with byte loads on
strict-align targets
When RequireNaturalAlignment is set and the pointers have no known
alignment beyond one byte, only i8 loads survive the natural-alignment
filter. Previously such call sites were left as a libcall. However, byte
loads are naturally aligned for any pointer and are still useful for
small compares: the number of loads is bounded by MaxNumLoads, so only
compares small enough to decompose into at most that many byte loads are
inlined, while larger ones fall back to the libcall in MemCmpExpansion.
This turns e.g. bcmp(p, q, 4) with unknown alignment into a branch-free
byte-load sequence instead of a call on strict-align targets.
Assisted-by: TRAE CLI (DeepSeek V4 Pro)
---
llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp | 9 +-
llvm/test/CodeGen/RISCV/memcmp-optsize.ll | 1412 ++---
llvm/test/CodeGen/RISCV/memcmp.ll | 5829 ++++++++++---------
3 files changed, 3523 insertions(+), 3727 deletions(-)
diff --git a/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp b/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
index 19cda1fbba7e0..667b3fc7a617e 100644
--- a/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
+++ b/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
@@ -876,9 +876,12 @@ static bool expandMemCmp(CallInst *CI, const TargetTransformInfo *TTI,
llvm::erase_if(Options.LoadSizes, [&](unsigned LoadSize) {
return LoadSize > MinAlign || !isPowerOf2_64(LoadSize);
});
- // If only single-byte loads survive, inlining a byte-wise comparison offers
- // no benefit over the library call, so leave it as a libcall.
- if (Options.LoadSizes.empty() || Options.LoadSizes.front() == 1)
+ // Bail out only if no load size fits the known alignment at all. Byte
+ // loads are naturally aligned for any pointer, so they normally survive and
+ // remain useful for small compares: the number of loads is bounded by
+ // MaxNumLoads, and larger compares that would need too many byte loads fall
+ // back to the libcall in MemCmpExpansion.
+ if (Options.LoadSizes.empty())
return false;
}
diff --git a/llvm/test/CodeGen/RISCV/memcmp-optsize.ll b/llvm/test/CodeGen/RISCV/memcmp-optsize.ll
index 1b516301b7ab6..bcea113f2cad4 100644
--- a/llvm/test/CodeGen/RISCV/memcmp-optsize.ll
+++ b/llvm/test/CodeGen/RISCV/memcmp-optsize.ll
@@ -61,178 +61,30 @@ entry:
}
define i32 @bcmp_size_1(ptr %s1, ptr %s2) nounwind optsize {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_size_1:
-; CHECK-ALIGNED-RV32: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 1
-; CHECK-ALIGNED-RV32-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_size_1:
-; CHECK-ALIGNED-RV64: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 1
-; CHECK-ALIGNED-RV64-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_1:
-; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 1
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_1:
-; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 1
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_1:
-; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 1
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_1:
-; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 1
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_1:
-; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 1
-; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-V-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_1:
-; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 1
-; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-V-NEXT: ret
-;
-; CHECK-UNALIGNED-LABEL: bcmp_size_1:
-; CHECK-UNALIGNED: # %bb.0: # %entry
-; CHECK-UNALIGNED-NEXT: lbu a0, 0(a0)
-; CHECK-UNALIGNED-NEXT: lbu a1, 0(a1)
-; CHECK-UNALIGNED-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-NEXT: snez a0, a0
-; CHECK-UNALIGNED-NEXT: ret
+; CHECK-LABEL: bcmp_size_1:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lbu a0, 0(a0)
+; CHECK-NEXT: lbu a1, 0(a1)
+; CHECK-NEXT: xor a0, a0, a1
+; CHECK-NEXT: snez a0, a0
+; CHECK-NEXT: ret
entry:
%bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 1)
ret i32 %bcmp
}
define i32 @bcmp_size_2(ptr %s1, ptr %s2) nounwind optsize {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_size_2:
-; CHECK-ALIGNED-RV32: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 2
-; CHECK-ALIGNED-RV32-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_size_2:
-; CHECK-ALIGNED-RV64: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 2
-; CHECK-ALIGNED-RV64-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_2:
-; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 2
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_2:
-; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 2
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_2:
-; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 2
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_2:
-; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 2
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_2:
-; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 2
-; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-V-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_2:
-; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 2
-; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-V-NEXT: ret
+; CHECK-ALIGNED-LABEL: bcmp_size_2:
+; CHECK-ALIGNED: # %bb.0: # %entry
+; CHECK-ALIGNED-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-NEXT: lbu a0, 1(a0)
+; CHECK-ALIGNED-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-NEXT: lbu a1, 1(a1)
+; CHECK-ALIGNED-NEXT: xor a2, a2, a3
+; CHECK-ALIGNED-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-NEXT: or a0, a2, a0
+; CHECK-ALIGNED-NEXT: snez a0, a0
+; CHECK-ALIGNED-NEXT: ret
;
; CHECK-UNALIGNED-LABEL: bcmp_size_2:
; CHECK-UNALIGNED: # %bb.0: # %entry
@@ -247,85 +99,21 @@ entry:
}
define i32 @bcmp_size_3(ptr %s1, ptr %s2) nounwind optsize {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_size_3:
-; CHECK-ALIGNED-RV32: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 3
-; CHECK-ALIGNED-RV32-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_size_3:
-; CHECK-ALIGNED-RV64: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 3
-; CHECK-ALIGNED-RV64-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_3:
-; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 3
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_3:
-; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 3
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_3:
-; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 3
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_3:
-; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 3
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_3:
-; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 3
-; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-V-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_3:
-; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 3
-; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-V-NEXT: ret
+; CHECK-ALIGNED-LABEL: bcmp_size_3:
+; CHECK-ALIGNED: # %bb.0: # %entry
+; CHECK-ALIGNED-NEXT: lbu a2, 0(a1)
+; CHECK-ALIGNED-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-NEXT: lbu a4, 0(a0)
+; CHECK-ALIGNED-NEXT: lbu a5, 1(a0)
+; CHECK-ALIGNED-NEXT: lbu a0, 2(a0)
+; CHECK-ALIGNED-NEXT: lbu a1, 2(a1)
+; CHECK-ALIGNED-NEXT: xor a2, a4, a2
+; CHECK-ALIGNED-NEXT: xor a3, a5, a3
+; CHECK-ALIGNED-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-NEXT: or a0, a2, a0
+; CHECK-ALIGNED-NEXT: snez a0, a0
+; CHECK-ALIGNED-NEXT: ret
;
; CHECK-UNALIGNED-LABEL: bcmp_size_3:
; CHECK-UNALIGNED: # %bb.0: # %entry
@@ -344,85 +132,25 @@ entry:
}
define i32 @bcmp_size_4(ptr %s1, ptr %s2) nounwind optsize {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_size_4:
-; CHECK-ALIGNED-RV32: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_size_4:
-; CHECK-ALIGNED-RV64: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_4:
-; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_4:
-; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_4:
-; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_4:
-; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_4:
-; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-V-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_4:
-; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-V-NEXT: ret
+; CHECK-ALIGNED-LABEL: bcmp_size_4:
+; CHECK-ALIGNED: # %bb.0: # %entry
+; CHECK-ALIGNED-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-NEXT: lbu a3, 1(a0)
+; CHECK-ALIGNED-NEXT: lbu a4, 2(a0)
+; CHECK-ALIGNED-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-NEXT: lbu a5, 0(a1)
+; CHECK-ALIGNED-NEXT: lbu a6, 1(a1)
+; CHECK-ALIGNED-NEXT: lbu a7, 2(a1)
+; CHECK-ALIGNED-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-NEXT: xor a2, a2, a5
+; CHECK-ALIGNED-NEXT: xor a3, a3, a6
+; CHECK-ALIGNED-NEXT: xor a4, a4, a7
+; CHECK-ALIGNED-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-NEXT: or a0, a4, a0
+; CHECK-ALIGNED-NEXT: or a0, a2, a0
+; CHECK-ALIGNED-NEXT: snez a0, a0
+; CHECK-ALIGNED-NEXT: ret
;
; CHECK-UNALIGNED-LABEL: bcmp_size_4:
; CHECK-UNALIGNED: # %bb.0: # %entry
@@ -2622,93 +2350,25 @@ entry:
}
define i1 @bcmp_eq_zero(ptr %s1, ptr %s2) nounwind optsize {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_eq_zero:
-; CHECK-ALIGNED-RV32: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-NEXT: seqz a0, a0
-; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_eq_zero:
-; CHECK-ALIGNED-RV64: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-NEXT: seqz a0, a0
-; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_eq_zero:
-; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: seqz a0, a0
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_eq_zero:
-; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: seqz a0, a0
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_eq_zero:
-; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: seqz a0, a0
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_eq_zero:
-; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: seqz a0, a0
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_eq_zero:
-; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-V-NEXT: seqz a0, a0
-; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-V-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_eq_zero:
-; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-V-NEXT: seqz a0, a0
-; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-V-NEXT: ret
+; CHECK-ALIGNED-LABEL: bcmp_eq_zero:
+; CHECK-ALIGNED: # %bb.0: # %entry
+; CHECK-ALIGNED-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-NEXT: lbu a3, 1(a0)
+; CHECK-ALIGNED-NEXT: lbu a4, 2(a0)
+; CHECK-ALIGNED-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-NEXT: lbu a5, 0(a1)
+; CHECK-ALIGNED-NEXT: lbu a6, 1(a1)
+; CHECK-ALIGNED-NEXT: lbu a7, 2(a1)
+; CHECK-ALIGNED-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-NEXT: xor a2, a2, a5
+; CHECK-ALIGNED-NEXT: xor a3, a3, a6
+; CHECK-ALIGNED-NEXT: xor a4, a4, a7
+; CHECK-ALIGNED-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-NEXT: or a0, a4, a0
+; CHECK-ALIGNED-NEXT: or a0, a2, a0
+; CHECK-ALIGNED-NEXT: seqz a0, a0
+; CHECK-ALIGNED-NEXT: ret
;
; CHECK-UNALIGNED-LABEL: bcmp_eq_zero:
; CHECK-UNALIGNED: # %bb.0: # %entry
@@ -2722,100 +2382,12 @@ entry:
%ret = icmp eq i32 %bcmp, 0
ret i1 %ret
}
-
-define i1 @bcmp_lt_zero(ptr %s1, ptr %s2) nounwind optsize {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_lt_zero:
-; CHECK-ALIGNED-RV32: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-NEXT: srli a0, a0, 31
-; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_lt_zero:
-; CHECK-ALIGNED-RV64: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-NEXT: srli a0, a0, 63
-; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_lt_zero:
-; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: srli a0, a0, 31
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_lt_zero:
-; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: srli a0, a0, 63
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_lt_zero:
-; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: srli a0, a0, 31
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_lt_zero:
-; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: srli a0, a0, 63
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_lt_zero:
-; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-V-NEXT: srli a0, a0, 31
-; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-V-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_lt_zero:
-; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-V-NEXT: srli a0, a0, 63
-; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-V-NEXT: ret
-;
-; CHECK-UNALIGNED-LABEL: bcmp_lt_zero:
-; CHECK-UNALIGNED: # %bb.0: # %entry
-; CHECK-UNALIGNED-NEXT: li a0, 0
-; CHECK-UNALIGNED-NEXT: ret
+
+define i1 @bcmp_lt_zero(ptr %s1, ptr %s2) nounwind optsize {
+; CHECK-LABEL: bcmp_lt_zero:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: li a0, 0
+; CHECK-NEXT: ret
entry:
%bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 4)
%ret = icmp slt i32 %bcmp, 0
@@ -2823,93 +2395,25 @@ entry:
}
define i1 @bcmp_gt_zero(ptr %s1, ptr %s2) nounwind optsize {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_gt_zero:
-; CHECK-ALIGNED-RV32: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-NEXT: sgtz a0, a0
-; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_gt_zero:
-; CHECK-ALIGNED-RV64: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-NEXT: sgtz a0, a0
-; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_gt_zero:
-; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sgtz a0, a0
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_gt_zero:
-; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sgtz a0, a0
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_gt_zero:
-; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sgtz a0, a0
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_gt_zero:
-; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sgtz a0, a0
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_gt_zero:
-; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-V-NEXT: sgtz a0, a0
-; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-V-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_gt_zero:
-; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-V-NEXT: sgtz a0, a0
-; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-V-NEXT: ret
+; CHECK-ALIGNED-LABEL: bcmp_gt_zero:
+; CHECK-ALIGNED: # %bb.0: # %entry
+; CHECK-ALIGNED-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-NEXT: lbu a3, 1(a0)
+; CHECK-ALIGNED-NEXT: lbu a4, 2(a0)
+; CHECK-ALIGNED-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-NEXT: lbu a5, 0(a1)
+; CHECK-ALIGNED-NEXT: lbu a6, 1(a1)
+; CHECK-ALIGNED-NEXT: lbu a7, 2(a1)
+; CHECK-ALIGNED-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-NEXT: xor a2, a2, a5
+; CHECK-ALIGNED-NEXT: xor a3, a3, a6
+; CHECK-ALIGNED-NEXT: xor a4, a4, a7
+; CHECK-ALIGNED-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-NEXT: or a0, a4, a0
+; CHECK-ALIGNED-NEXT: or a0, a2, a0
+; CHECK-ALIGNED-NEXT: snez a0, a0
+; CHECK-ALIGNED-NEXT: ret
;
; CHECK-UNALIGNED-LABEL: bcmp_gt_zero:
; CHECK-UNALIGNED: # %bb.0: # %entry
@@ -2957,42 +2461,30 @@ define i32 @memcmp_size_1(ptr %s1, ptr %s2) nounwind optsize {
;
; CHECK-ALIGNED-RV32-ZBB-LABEL: memcmp_size_1:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 1
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a0, 0(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a1, 0(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBB-LABEL: memcmp_size_1:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 1
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a0, 0(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a1, 0(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV32-ZBKB-LABEL: memcmp_size_1:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 1
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a0, 0(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a1, 0(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBKB-LABEL: memcmp_size_1:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 1
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a0, 0(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a1, 0(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV32-V-LABEL: memcmp_size_1:
@@ -3110,42 +2602,58 @@ define i32 @memcmp_size_2(ptr %s1, ptr %s2) nounwind optsize {
;
; CHECK-ALIGNED-RV32-ZBB-LABEL: memcmp_size_2:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 2
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB23_2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.1: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a0, 1(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a1, 1(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: .LBB23_2: # %endblock
+; CHECK-ALIGNED-RV32-ZBB-NEXT: mv a0, a2
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBB-LABEL: memcmp_size_2:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 2
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB23_2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.1: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a0, 1(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a1, 1(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: .LBB23_2: # %endblock
+; CHECK-ALIGNED-RV64-ZBB-NEXT: mv a0, a2
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV32-ZBKB-LABEL: memcmp_size_2:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 2
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB23_2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.1: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a0, 1(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a1, 1(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: .LBB23_2: # %endblock
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: mv a0, a2
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBKB-LABEL: memcmp_size_2:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 2
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB23_2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.1: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a0, 1(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a1, 1(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: .LBB23_2: # %endblock
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: mv a0, a2
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV32-V-LABEL: memcmp_size_2:
@@ -3279,42 +2787,78 @@ define i32 @memcmp_size_3(ptr %s1, ptr %s2) nounwind optsize {
;
; CHECK-ALIGNED-RV32-ZBB-LABEL: memcmp_size_3:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 3
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB24_3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.1: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB24_3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.2: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a0, 2(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a1, 2(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: .LBB24_3: # %endblock
+; CHECK-ALIGNED-RV32-ZBB-NEXT: mv a0, a2
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBB-LABEL: memcmp_size_3:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 3
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB24_3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.1: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB24_3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.2: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a0, 2(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a1, 2(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: .LBB24_3: # %endblock
+; CHECK-ALIGNED-RV64-ZBB-NEXT: mv a0, a2
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV32-ZBKB-LABEL: memcmp_size_3:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 3
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB24_3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.1: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB24_3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.2: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a0, 2(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a1, 2(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: .LBB24_3: # %endblock
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: mv a0, a2
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBKB-LABEL: memcmp_size_3:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 3
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB24_3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.1: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB24_3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.2: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a0, 2(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a1, 2(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: .LBB24_3: # %endblock
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: mv a0, a2
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV32-V-LABEL: memcmp_size_3:
@@ -3474,42 +3018,98 @@ define i32 @memcmp_size_4(ptr %s1, ptr %s2) nounwind optsize {
;
; CHECK-ALIGNED-RV32-ZBB-LABEL: memcmp_size_4:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB25_4
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.1: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB25_4
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.2: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB25_4
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.3: # %loadbb3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: .LBB25_4: # %endblock
+; CHECK-ALIGNED-RV32-ZBB-NEXT: mv a0, a2
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBB-LABEL: memcmp_size_4:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB25_4
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.1: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB25_4
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.2: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB25_4
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.3: # %loadbb3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: .LBB25_4: # %endblock
+; CHECK-ALIGNED-RV64-ZBB-NEXT: mv a0, a2
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV32-ZBKB-LABEL: memcmp_size_4:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB25_4
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.1: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB25_4
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.2: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB25_4
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.3: # %loadbb3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: .LBB25_4: # %endblock
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: mv a0, a2
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBKB-LABEL: memcmp_size_4:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB25_4
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.1: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB25_4
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.2: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB25_4
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.3: # %loadbb3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: .LBB25_4: # %endblock
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: mv a0, a2
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV32-V-LABEL: memcmp_size_4:
@@ -5318,205 +4918,25 @@ entry:
}
define i1 @memcmp_eq_zero(ptr %s1, ptr %s2) nounwind optsize {
-; CHECK-ALIGNED-RV32-LABEL: memcmp_eq_zero:
-; CHECK-ALIGNED-RV32: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-NEXT: lbu a2, 1(a1)
-; CHECK-ALIGNED-RV32-NEXT: lbu a3, 0(a1)
-; CHECK-ALIGNED-RV32-NEXT: lbu a4, 2(a1)
-; CHECK-ALIGNED-RV32-NEXT: lbu a1, 3(a1)
-; CHECK-ALIGNED-RV32-NEXT: slli a2, a2, 8
-; CHECK-ALIGNED-RV32-NEXT: lbu a5, 1(a0)
-; CHECK-ALIGNED-RV32-NEXT: lbu a6, 2(a0)
-; CHECK-ALIGNED-RV32-NEXT: lbu a7, 3(a0)
-; CHECK-ALIGNED-RV32-NEXT: lbu a0, 0(a0)
-; CHECK-ALIGNED-RV32-NEXT: or a2, a2, a3
-; CHECK-ALIGNED-RV32-NEXT: slli a4, a4, 16
-; CHECK-ALIGNED-RV32-NEXT: slli a1, a1, 24
-; CHECK-ALIGNED-RV32-NEXT: or a1, a1, a4
-; CHECK-ALIGNED-RV32-NEXT: slli a5, a5, 8
-; CHECK-ALIGNED-RV32-NEXT: slli a6, a6, 16
-; CHECK-ALIGNED-RV32-NEXT: slli a7, a7, 24
-; CHECK-ALIGNED-RV32-NEXT: or a0, a5, a0
-; CHECK-ALIGNED-RV32-NEXT: or a3, a7, a6
-; CHECK-ALIGNED-RV32-NEXT: or a1, a1, a2
-; CHECK-ALIGNED-RV32-NEXT: or a0, a3, a0
-; CHECK-ALIGNED-RV32-NEXT: xor a0, a0, a1
-; CHECK-ALIGNED-RV32-NEXT: seqz a0, a0
-; CHECK-ALIGNED-RV32-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-LABEL: memcmp_eq_zero:
-; CHECK-ALIGNED-RV64: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-NEXT: lbu a2, 1(a1)
-; CHECK-ALIGNED-RV64-NEXT: lbu a3, 0(a1)
-; CHECK-ALIGNED-RV64-NEXT: lbu a4, 2(a1)
-; CHECK-ALIGNED-RV64-NEXT: lb a1, 3(a1)
-; CHECK-ALIGNED-RV64-NEXT: slli a2, a2, 8
-; CHECK-ALIGNED-RV64-NEXT: lbu a5, 1(a0)
-; CHECK-ALIGNED-RV64-NEXT: lbu a6, 2(a0)
-; CHECK-ALIGNED-RV64-NEXT: lb a7, 3(a0)
-; CHECK-ALIGNED-RV64-NEXT: lbu a0, 0(a0)
-; CHECK-ALIGNED-RV64-NEXT: or a2, a2, a3
-; CHECK-ALIGNED-RV64-NEXT: slli a4, a4, 16
-; CHECK-ALIGNED-RV64-NEXT: slli a1, a1, 24
-; CHECK-ALIGNED-RV64-NEXT: or a1, a1, a4
-; CHECK-ALIGNED-RV64-NEXT: slli a5, a5, 8
-; CHECK-ALIGNED-RV64-NEXT: slli a6, a6, 16
-; CHECK-ALIGNED-RV64-NEXT: slli a7, a7, 24
-; CHECK-ALIGNED-RV64-NEXT: or a0, a5, a0
-; CHECK-ALIGNED-RV64-NEXT: or a3, a7, a6
-; CHECK-ALIGNED-RV64-NEXT: or a1, a1, a2
-; CHECK-ALIGNED-RV64-NEXT: or a0, a3, a0
-; CHECK-ALIGNED-RV64-NEXT: xor a0, a0, a1
-; CHECK-ALIGNED-RV64-NEXT: seqz a0, a0
-; CHECK-ALIGNED-RV64-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: memcmp_eq_zero:
-; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 1(a1)
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 0(a1)
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a4, 2(a1)
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a1, 3(a1)
-; CHECK-ALIGNED-RV32-ZBB-NEXT: slli a2, a2, 8
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a5, 1(a0)
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a6, 2(a0)
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a7, 3(a0)
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a0, 0(a0)
-; CHECK-ALIGNED-RV32-ZBB-NEXT: or a2, a2, a3
-; CHECK-ALIGNED-RV32-ZBB-NEXT: slli a4, a4, 16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: slli a1, a1, 24
-; CHECK-ALIGNED-RV32-ZBB-NEXT: or a1, a1, a4
-; CHECK-ALIGNED-RV32-ZBB-NEXT: slli a5, a5, 8
-; CHECK-ALIGNED-RV32-ZBB-NEXT: slli a6, a6, 16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: slli a7, a7, 24
-; CHECK-ALIGNED-RV32-ZBB-NEXT: or a0, a5, a0
-; CHECK-ALIGNED-RV32-ZBB-NEXT: or a3, a7, a6
-; CHECK-ALIGNED-RV32-ZBB-NEXT: or a1, a1, a2
-; CHECK-ALIGNED-RV32-ZBB-NEXT: or a0, a3, a0
-; CHECK-ALIGNED-RV32-ZBB-NEXT: xor a0, a0, a1
-; CHECK-ALIGNED-RV32-ZBB-NEXT: seqz a0, a0
-; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: memcmp_eq_zero:
-; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 1(a1)
-; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 0(a1)
-; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a4, 2(a1)
-; CHECK-ALIGNED-RV64-ZBB-NEXT: lb a1, 3(a1)
-; CHECK-ALIGNED-RV64-ZBB-NEXT: slli a2, a2, 8
-; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a5, 1(a0)
-; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a6, 2(a0)
-; CHECK-ALIGNED-RV64-ZBB-NEXT: lb a7, 3(a0)
-; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a0, 0(a0)
-; CHECK-ALIGNED-RV64-ZBB-NEXT: or a2, a2, a3
-; CHECK-ALIGNED-RV64-ZBB-NEXT: slli a4, a4, 16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: slli a1, a1, 24
-; CHECK-ALIGNED-RV64-ZBB-NEXT: or a1, a1, a4
-; CHECK-ALIGNED-RV64-ZBB-NEXT: slli a5, a5, 8
-; CHECK-ALIGNED-RV64-ZBB-NEXT: slli a6, a6, 16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: slli a7, a7, 24
-; CHECK-ALIGNED-RV64-ZBB-NEXT: or a0, a5, a0
-; CHECK-ALIGNED-RV64-ZBB-NEXT: or a3, a7, a6
-; CHECK-ALIGNED-RV64-ZBB-NEXT: or a1, a1, a2
-; CHECK-ALIGNED-RV64-ZBB-NEXT: or a0, a3, a0
-; CHECK-ALIGNED-RV64-ZBB-NEXT: xor a0, a0, a1
-; CHECK-ALIGNED-RV64-ZBB-NEXT: seqz a0, a0
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: memcmp_eq_zero:
-; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 0(a1)
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 1(a1)
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a4, 2(a1)
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a1, 3(a1)
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a5, 0(a0)
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a6, 1(a0)
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a7, 2(a0)
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a0, 3(a0)
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: packh a1, a4, a1
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: packh a2, a2, a3
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: packh a0, a7, a0
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: packh a3, a5, a6
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: pack a1, a2, a1
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: pack a0, a3, a0
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: xor a0, a0, a1
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: seqz a0, a0
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: memcmp_eq_zero:
-; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 2(a1)
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: lb a3, 3(a1)
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a4, 1(a1)
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a1, 0(a1)
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a5, 2(a0)
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: lb a6, 3(a0)
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a7, 1(a0)
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a0, 0(a0)
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: slli a2, a2, 16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: slli a3, a3, 24
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: packh a1, a1, a4
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: or a2, a3, a2
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: slli a5, a5, 16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: slli a6, a6, 24
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: packh a0, a0, a7
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: or a3, a6, a5
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: or a1, a2, a1
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: or a0, a3, a0
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: xor a0, a0, a1
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: seqz a0, a0
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-V-LABEL: memcmp_eq_zero:
-; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-V-NEXT: lbu a2, 1(a1)
-; CHECK-ALIGNED-RV32-V-NEXT: lbu a3, 0(a1)
-; CHECK-ALIGNED-RV32-V-NEXT: lbu a4, 2(a1)
-; CHECK-ALIGNED-RV32-V-NEXT: lbu a1, 3(a1)
-; CHECK-ALIGNED-RV32-V-NEXT: slli a2, a2, 8
-; CHECK-ALIGNED-RV32-V-NEXT: lbu a5, 1(a0)
-; CHECK-ALIGNED-RV32-V-NEXT: lbu a6, 2(a0)
-; CHECK-ALIGNED-RV32-V-NEXT: lbu a7, 3(a0)
-; CHECK-ALIGNED-RV32-V-NEXT: lbu a0, 0(a0)
-; CHECK-ALIGNED-RV32-V-NEXT: or a2, a2, a3
-; CHECK-ALIGNED-RV32-V-NEXT: slli a4, a4, 16
-; CHECK-ALIGNED-RV32-V-NEXT: slli a1, a1, 24
-; CHECK-ALIGNED-RV32-V-NEXT: or a1, a1, a4
-; CHECK-ALIGNED-RV32-V-NEXT: slli a5, a5, 8
-; CHECK-ALIGNED-RV32-V-NEXT: slli a6, a6, 16
-; CHECK-ALIGNED-RV32-V-NEXT: slli a7, a7, 24
-; CHECK-ALIGNED-RV32-V-NEXT: or a0, a5, a0
-; CHECK-ALIGNED-RV32-V-NEXT: or a3, a7, a6
-; CHECK-ALIGNED-RV32-V-NEXT: or a1, a1, a2
-; CHECK-ALIGNED-RV32-V-NEXT: or a0, a3, a0
-; CHECK-ALIGNED-RV32-V-NEXT: xor a0, a0, a1
-; CHECK-ALIGNED-RV32-V-NEXT: seqz a0, a0
-; CHECK-ALIGNED-RV32-V-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-V-LABEL: memcmp_eq_zero:
-; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-V-NEXT: lbu a2, 1(a1)
-; CHECK-ALIGNED-RV64-V-NEXT: lbu a3, 0(a1)
-; CHECK-ALIGNED-RV64-V-NEXT: lbu a4, 2(a1)
-; CHECK-ALIGNED-RV64-V-NEXT: lb a1, 3(a1)
-; CHECK-ALIGNED-RV64-V-NEXT: slli a2, a2, 8
-; CHECK-ALIGNED-RV64-V-NEXT: lbu a5, 1(a0)
-; CHECK-ALIGNED-RV64-V-NEXT: lbu a6, 2(a0)
-; CHECK-ALIGNED-RV64-V-NEXT: lb a7, 3(a0)
-; CHECK-ALIGNED-RV64-V-NEXT: lbu a0, 0(a0)
-; CHECK-ALIGNED-RV64-V-NEXT: or a2, a2, a3
-; CHECK-ALIGNED-RV64-V-NEXT: slli a4, a4, 16
-; CHECK-ALIGNED-RV64-V-NEXT: slli a1, a1, 24
-; CHECK-ALIGNED-RV64-V-NEXT: or a1, a1, a4
-; CHECK-ALIGNED-RV64-V-NEXT: slli a5, a5, 8
-; CHECK-ALIGNED-RV64-V-NEXT: slli a6, a6, 16
-; CHECK-ALIGNED-RV64-V-NEXT: slli a7, a7, 24
-; CHECK-ALIGNED-RV64-V-NEXT: or a0, a5, a0
-; CHECK-ALIGNED-RV64-V-NEXT: or a3, a7, a6
-; CHECK-ALIGNED-RV64-V-NEXT: or a1, a1, a2
-; CHECK-ALIGNED-RV64-V-NEXT: or a0, a3, a0
-; CHECK-ALIGNED-RV64-V-NEXT: xor a0, a0, a1
-; CHECK-ALIGNED-RV64-V-NEXT: seqz a0, a0
-; CHECK-ALIGNED-RV64-V-NEXT: ret
+; CHECK-ALIGNED-LABEL: memcmp_eq_zero:
+; CHECK-ALIGNED: # %bb.0: # %entry
+; CHECK-ALIGNED-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-NEXT: lbu a3, 1(a0)
+; CHECK-ALIGNED-NEXT: lbu a4, 2(a0)
+; CHECK-ALIGNED-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-NEXT: lbu a5, 0(a1)
+; CHECK-ALIGNED-NEXT: lbu a6, 1(a1)
+; CHECK-ALIGNED-NEXT: lbu a7, 2(a1)
+; CHECK-ALIGNED-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-NEXT: xor a2, a2, a5
+; CHECK-ALIGNED-NEXT: xor a3, a3, a6
+; CHECK-ALIGNED-NEXT: xor a4, a4, a7
+; CHECK-ALIGNED-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-NEXT: or a0, a4, a0
+; CHECK-ALIGNED-NEXT: or a0, a2, a0
+; CHECK-ALIGNED-NEXT: seqz a0, a0
+; CHECK-ALIGNED-NEXT: ret
;
; CHECK-UNALIGNED-LABEL: memcmp_eq_zero:
; CHECK-UNALIGNED: # %bb.0: # %entry
@@ -5556,46 +4976,98 @@ define i1 @memcmp_lt_zero(ptr %s1, ptr %s2) nounwind optsize {
;
; CHECK-ALIGNED-RV32-ZBB-LABEL: memcmp_lt_zero:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: srli a0, a0, 31
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB40_4
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.1: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB40_4
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.2: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB40_4
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.3: # %loadbb3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: .LBB40_4: # %endblock
+; CHECK-ALIGNED-RV32-ZBB-NEXT: srli a0, a2, 31
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBB-LABEL: memcmp_lt_zero:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: srli a0, a0, 63
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB40_4
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.1: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB40_4
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.2: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB40_4
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.3: # %loadbb3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: .LBB40_4: # %endblock
+; CHECK-ALIGNED-RV64-ZBB-NEXT: srli a0, a2, 63
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV32-ZBKB-LABEL: memcmp_lt_zero:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: srli a0, a0, 31
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB40_4
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.1: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB40_4
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.2: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB40_4
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.3: # %loadbb3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: .LBB40_4: # %endblock
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: srli a0, a2, 31
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBKB-LABEL: memcmp_lt_zero:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: srli a0, a0, 63
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB40_4
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.1: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB40_4
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.2: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB40_4
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.3: # %loadbb3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: .LBB40_4: # %endblock
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: srli a0, a2, 63
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV32-V-LABEL: memcmp_lt_zero:
@@ -5734,46 +5206,98 @@ define i1 @memcmp_gt_zero(ptr %s1, ptr %s2) nounwind optsize {
;
; CHECK-ALIGNED-RV32-ZBB-LABEL: memcmp_gt_zero:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sgtz a0, a0
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB41_4
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.1: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB41_4
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.2: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB41_4
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.3: # %loadbb3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: .LBB41_4: # %endblock
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sgtz a0, a2
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBB-LABEL: memcmp_gt_zero:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sgtz a0, a0
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB41_4
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.1: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB41_4
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.2: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB41_4
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.3: # %loadbb3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: .LBB41_4: # %endblock
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sgtz a0, a2
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV32-ZBKB-LABEL: memcmp_gt_zero:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sgtz a0, a0
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB41_4
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.1: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB41_4
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.2: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB41_4
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.3: # %loadbb3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: .LBB41_4: # %endblock
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sgtz a0, a2
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBKB-LABEL: memcmp_gt_zero:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sgtz a0, a0
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB41_4
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.1: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB41_4
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.2: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB41_4
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.3: # %loadbb3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: .LBB41_4: # %endblock
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sgtz a0, a2
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV32-V-LABEL: memcmp_gt_zero:
@@ -5886,5 +5410,3 @@ entry:
%ret = icmp sgt i32 %memcmp, 0
ret i1 %ret
}
-;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; CHECK-ALIGNED: {{.*}}
diff --git a/llvm/test/CodeGen/RISCV/memcmp.ll b/llvm/test/CodeGen/RISCV/memcmp.ll
index de4a42db45caa..966718abc6b3e 100644
--- a/llvm/test/CodeGen/RISCV/memcmp.ll
+++ b/llvm/test/CodeGen/RISCV/memcmp.ll
@@ -61,178 +61,30 @@ entry:
}
define i32 @bcmp_size_1(ptr %s1, ptr %s2) nounwind {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_size_1:
-; CHECK-ALIGNED-RV32: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 1
-; CHECK-ALIGNED-RV32-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_size_1:
-; CHECK-ALIGNED-RV64: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 1
-; CHECK-ALIGNED-RV64-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_1:
-; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 1
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_1:
-; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 1
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_1:
-; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 1
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_1:
-; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 1
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_1:
-; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 1
-; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-V-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_1:
-; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 1
-; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-V-NEXT: ret
-;
-; CHECK-UNALIGNED-LABEL: bcmp_size_1:
-; CHECK-UNALIGNED: # %bb.0: # %entry
-; CHECK-UNALIGNED-NEXT: lbu a0, 0(a0)
-; CHECK-UNALIGNED-NEXT: lbu a1, 0(a1)
-; CHECK-UNALIGNED-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-NEXT: snez a0, a0
-; CHECK-UNALIGNED-NEXT: ret
+; CHECK-LABEL: bcmp_size_1:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lbu a0, 0(a0)
+; CHECK-NEXT: lbu a1, 0(a1)
+; CHECK-NEXT: xor a0, a0, a1
+; CHECK-NEXT: snez a0, a0
+; CHECK-NEXT: ret
entry:
%bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 1)
ret i32 %bcmp
}
define i32 @bcmp_size_2(ptr %s1, ptr %s2) nounwind {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_size_2:
-; CHECK-ALIGNED-RV32: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 2
-; CHECK-ALIGNED-RV32-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_size_2:
-; CHECK-ALIGNED-RV64: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 2
-; CHECK-ALIGNED-RV64-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_2:
-; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 2
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_2:
-; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 2
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_2:
-; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 2
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_2:
-; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 2
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_2:
-; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 2
-; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-V-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_2:
-; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 2
-; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-V-NEXT: ret
+; CHECK-ALIGNED-LABEL: bcmp_size_2:
+; CHECK-ALIGNED: # %bb.0: # %entry
+; CHECK-ALIGNED-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-NEXT: lbu a0, 1(a0)
+; CHECK-ALIGNED-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-NEXT: lbu a1, 1(a1)
+; CHECK-ALIGNED-NEXT: xor a2, a2, a3
+; CHECK-ALIGNED-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-NEXT: or a0, a2, a0
+; CHECK-ALIGNED-NEXT: snez a0, a0
+; CHECK-ALIGNED-NEXT: ret
;
; CHECK-UNALIGNED-LABEL: bcmp_size_2:
; CHECK-UNALIGNED: # %bb.0: # %entry
@@ -247,85 +99,21 @@ entry:
}
define i32 @bcmp_size_3(ptr %s1, ptr %s2) nounwind {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_size_3:
-; CHECK-ALIGNED-RV32: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 3
-; CHECK-ALIGNED-RV32-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_size_3:
-; CHECK-ALIGNED-RV64: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 3
-; CHECK-ALIGNED-RV64-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_3:
-; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 3
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_3:
-; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 3
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_3:
-; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 3
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_3:
-; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 3
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_3:
-; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 3
-; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-V-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_3:
-; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 3
-; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-V-NEXT: ret
+; CHECK-ALIGNED-LABEL: bcmp_size_3:
+; CHECK-ALIGNED: # %bb.0: # %entry
+; CHECK-ALIGNED-NEXT: lbu a2, 0(a1)
+; CHECK-ALIGNED-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-NEXT: lbu a4, 0(a0)
+; CHECK-ALIGNED-NEXT: lbu a5, 1(a0)
+; CHECK-ALIGNED-NEXT: lbu a0, 2(a0)
+; CHECK-ALIGNED-NEXT: lbu a1, 2(a1)
+; CHECK-ALIGNED-NEXT: xor a2, a4, a2
+; CHECK-ALIGNED-NEXT: xor a3, a5, a3
+; CHECK-ALIGNED-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-NEXT: or a0, a2, a0
+; CHECK-ALIGNED-NEXT: snez a0, a0
+; CHECK-ALIGNED-NEXT: ret
;
; CHECK-UNALIGNED-LABEL: bcmp_size_3:
; CHECK-UNALIGNED: # %bb.0: # %entry
@@ -344,85 +132,25 @@ entry:
}
define i32 @bcmp_size_4(ptr %s1, ptr %s2) nounwind {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_size_4:
-; CHECK-ALIGNED-RV32: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_size_4:
-; CHECK-ALIGNED-RV64: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_4:
-; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_4:
-; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_4:
-; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_4:
-; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_4:
-; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-V-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_4:
-; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-V-NEXT: ret
+; CHECK-ALIGNED-LABEL: bcmp_size_4:
+; CHECK-ALIGNED: # %bb.0: # %entry
+; CHECK-ALIGNED-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-NEXT: lbu a3, 1(a0)
+; CHECK-ALIGNED-NEXT: lbu a4, 2(a0)
+; CHECK-ALIGNED-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-NEXT: lbu a5, 0(a1)
+; CHECK-ALIGNED-NEXT: lbu a6, 1(a1)
+; CHECK-ALIGNED-NEXT: lbu a7, 2(a1)
+; CHECK-ALIGNED-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-NEXT: xor a2, a2, a5
+; CHECK-ALIGNED-NEXT: xor a3, a3, a6
+; CHECK-ALIGNED-NEXT: xor a4, a4, a7
+; CHECK-ALIGNED-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-NEXT: or a0, a4, a0
+; CHECK-ALIGNED-NEXT: or a0, a2, a0
+; CHECK-ALIGNED-NEXT: snez a0, a0
+; CHECK-ALIGNED-NEXT: ret
;
; CHECK-UNALIGNED-LABEL: bcmp_size_4:
; CHECK-UNALIGNED: # %bb.0: # %entry
@@ -434,888 +162,108 @@ define i32 @bcmp_size_4(ptr %s1, ptr %s2) nounwind {
entry:
%bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 4)
ret i32 %bcmp
-}
-
-define i32 @bcmp_size_5(ptr %s1, ptr %s2) nounwind {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_size_5:
-; CHECK-ALIGNED-RV32: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 5
-; CHECK-ALIGNED-RV32-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_size_5:
-; CHECK-ALIGNED-RV64: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 5
-; CHECK-ALIGNED-RV64-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_5:
-; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 5
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_5:
-; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 5
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_5:
-; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 5
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_5:
-; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 5
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_5:
-; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 5
-; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-V-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_5:
-; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 5
-; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-V-NEXT: ret
-;
-; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_5:
-; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lbu a0, 4(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a3, 0(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lbu a1, 4(a1)
-; CHECK-UNALIGNED-RV32-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV32-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV32-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV32-NEXT: ret
-;
-; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_5:
-; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV64-NEXT: lbu a0, 4(a0)
-; CHECK-UNALIGNED-RV64-NEXT: lw a3, 0(a1)
-; CHECK-UNALIGNED-RV64-NEXT: lbu a1, 4(a1)
-; CHECK-UNALIGNED-RV64-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV64-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV64-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV64-NEXT: ret
-;
-; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_5:
-; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lbu a0, 4(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a3, 0(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lbu a1, 4(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
-;
-; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_5:
-; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: lbu a0, 4(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: lw a3, 0(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: lbu a1, 4(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
-;
-; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_5:
-; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lbu a0, 4(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a3, 0(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lbu a1, 4(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
-;
-; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_5:
-; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: lbu a0, 4(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: lw a3, 0(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: lbu a1, 4(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
-;
-; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_5:
-; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-V-NEXT: vsetivli zero, 5, e8, mf2, ta, ma
-; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v9, (a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v8, v8, v9
-; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v8
-; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV32-V-NEXT: ret
-;
-; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_5:
-; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-V-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: lbu a0, 4(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: lw a3, 0(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: lbu a1, 4(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV64-V-NEXT: ret
-entry:
- %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 5)
- ret i32 %bcmp
-}
-
-define i32 @bcmp_size_6(ptr %s1, ptr %s2) nounwind {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_size_6:
-; CHECK-ALIGNED-RV32: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 6
-; CHECK-ALIGNED-RV32-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_size_6:
-; CHECK-ALIGNED-RV64: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 6
-; CHECK-ALIGNED-RV64-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_6:
-; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 6
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_6:
-; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 6
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_6:
-; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 6
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_6:
-; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 6
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_6:
-; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 6
-; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-V-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_6:
-; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 6
-; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-V-NEXT: ret
-;
-; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_6:
-; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lhu a0, 4(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a3, 0(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lhu a1, 4(a1)
-; CHECK-UNALIGNED-RV32-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV32-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV32-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV32-NEXT: ret
-;
-; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_6:
-; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV64-NEXT: lhu a0, 4(a0)
-; CHECK-UNALIGNED-RV64-NEXT: lw a3, 0(a1)
-; CHECK-UNALIGNED-RV64-NEXT: lhu a1, 4(a1)
-; CHECK-UNALIGNED-RV64-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV64-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV64-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV64-NEXT: ret
-;
-; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_6:
-; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lhu a0, 4(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a3, 0(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lhu a1, 4(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
-;
-; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_6:
-; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: lhu a0, 4(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: lw a3, 0(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: lhu a1, 4(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
-;
-; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_6:
-; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lhu a0, 4(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a3, 0(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lhu a1, 4(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
-;
-; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_6:
-; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: lhu a0, 4(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: lw a3, 0(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: lhu a1, 4(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
-;
-; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_6:
-; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-V-NEXT: vsetivli zero, 6, e8, mf2, ta, ma
-; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v9, (a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v8, v8, v9
-; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v8
-; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV32-V-NEXT: ret
-;
-; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_6:
-; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-V-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: lhu a0, 4(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: lw a3, 0(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: lhu a1, 4(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV64-V-NEXT: ret
-entry:
- %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 6)
- ret i32 %bcmp
-}
-
-define i32 @bcmp_size_7(ptr %s1, ptr %s2) nounwind {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_size_7:
-; CHECK-ALIGNED-RV32: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 7
-; CHECK-ALIGNED-RV32-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_size_7:
-; CHECK-ALIGNED-RV64: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 7
-; CHECK-ALIGNED-RV64-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_7:
-; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 7
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_7:
-; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 7
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_7:
-; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 7
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_7:
-; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 7
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_7:
-; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 7
-; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-V-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_7:
-; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 7
-; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-V-NEXT: ret
-;
-; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_7:
-; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a0, 3(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a3, 0(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lw a1, 3(a1)
-; CHECK-UNALIGNED-RV32-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV32-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV32-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV32-NEXT: ret
-;
-; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_7:
-; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV64-NEXT: lw a0, 3(a0)
-; CHECK-UNALIGNED-RV64-NEXT: lw a3, 0(a1)
-; CHECK-UNALIGNED-RV64-NEXT: lw a1, 3(a1)
-; CHECK-UNALIGNED-RV64-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV64-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV64-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV64-NEXT: ret
-;
-; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_7:
-; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a0, 3(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a3, 0(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a1, 3(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
-;
-; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_7:
-; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: lw a0, 3(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: lw a3, 0(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: lw a1, 3(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
-;
-; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_7:
-; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a0, 3(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a3, 0(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a1, 3(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
-;
-; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_7:
-; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: lw a0, 3(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: lw a3, 0(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: lw a1, 3(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
-;
-; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_7:
-; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-V-NEXT: vsetivli zero, 7, e8, mf2, ta, ma
-; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v9, (a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v8, v8, v9
-; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v8
-; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV32-V-NEXT: ret
-;
-; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_7:
-; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-V-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: lw a0, 3(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: lw a3, 0(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: lw a1, 3(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV64-V-NEXT: ret
-entry:
- %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 7)
- ret i32 %bcmp
-}
-
-define i32 @bcmp_size_8(ptr %s1, ptr %s2) nounwind {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_size_8:
-; CHECK-ALIGNED-RV32: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 8
-; CHECK-ALIGNED-RV32-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_size_8:
-; CHECK-ALIGNED-RV64: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 8
-; CHECK-ALIGNED-RV64-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_8:
-; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 8
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_8:
-; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 8
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_8:
-; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 8
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_8:
-; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 8
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_8:
-; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 8
-; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-V-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_8:
-; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 8
-; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-V-NEXT: ret
-;
-; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_8:
-; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a0, 4(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a3, 0(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lw a1, 4(a1)
-; CHECK-UNALIGNED-RV32-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV32-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV32-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV32-NEXT: ret
-;
-; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_8:
-; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-NEXT: ld a0, 0(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld a1, 0(a1)
-; CHECK-UNALIGNED-RV64-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV64-NEXT: ret
-;
-; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_8:
-; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a0, 4(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a3, 0(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a1, 4(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
-;
-; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_8:
-; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a0, 0(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a1, 0(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
-;
-; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_8:
-; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a0, 4(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a3, 0(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a1, 4(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a2, a2, a3
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
-;
-; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_8:
-; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a0, 0(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a1, 0(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
-;
-; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_8:
-; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-V-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
-; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v9, (a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v8, v8, v9
-; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v8
-; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV32-V-NEXT: ret
-;
-; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_8:
-; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a0, 0(a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: ld a1, 0(a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV64-V-NEXT: ret
-entry:
- %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 8)
- ret i32 %bcmp
-}
-
-define i32 @bcmp_size_15(ptr %s1, ptr %s2) nounwind {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_size_15:
-; CHECK-ALIGNED-RV32: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 15
-; CHECK-ALIGNED-RV32-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_size_15:
-; CHECK-ALIGNED-RV64: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 15
-; CHECK-ALIGNED-RV64-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_15:
-; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 15
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_15:
-; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 15
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_15:
-; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 15
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_15:
-; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 15
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_15:
-; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 15
-; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-V-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_15:
-; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 15
-; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-V-NEXT: ret
-;
-; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_15:
-; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a3, 4(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a4, 8(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a0, 11(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a5, 0(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lw a6, 4(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lw a7, 8(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lw a1, 11(a1)
-; CHECK-UNALIGNED-RV32-NEXT: xor a2, a2, a5
-; CHECK-UNALIGNED-RV32-NEXT: xor a3, a3, a6
-; CHECK-UNALIGNED-RV32-NEXT: xor a4, a4, a7
+}
+
+define i32 @bcmp_size_5(ptr %s1, ptr %s2) nounwind {
+; CHECK-ALIGNED-LABEL: bcmp_size_5:
+; CHECK-ALIGNED: # %bb.0: # %entry
+; CHECK-ALIGNED-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-NEXT: lbu a3, 1(a0)
+; CHECK-ALIGNED-NEXT: lbu a4, 2(a0)
+; CHECK-ALIGNED-NEXT: lbu a5, 3(a0)
+; CHECK-ALIGNED-NEXT: lbu a6, 0(a1)
+; CHECK-ALIGNED-NEXT: lbu a7, 1(a1)
+; CHECK-ALIGNED-NEXT: lbu t0, 2(a1)
+; CHECK-ALIGNED-NEXT: lbu t1, 3(a1)
+; CHECK-ALIGNED-NEXT: lbu a0, 4(a0)
+; CHECK-ALIGNED-NEXT: lbu a1, 4(a1)
+; CHECK-ALIGNED-NEXT: xor a2, a2, a6
+; CHECK-ALIGNED-NEXT: xor a3, a3, a7
+; CHECK-ALIGNED-NEXT: xor a4, a4, t0
+; CHECK-ALIGNED-NEXT: xor a5, a5, t1
+; CHECK-ALIGNED-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-NEXT: or a4, a4, a5
+; CHECK-ALIGNED-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-NEXT: or a2, a2, a4
+; CHECK-ALIGNED-NEXT: or a0, a2, a0
+; CHECK-ALIGNED-NEXT: snez a0, a0
+; CHECK-ALIGNED-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_5:
+; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lbu a0, 4(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a3, 0(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lbu a1, 4(a1)
+; CHECK-UNALIGNED-RV32-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV32-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV32-NEXT: or a0, a4, a0
; CHECK-UNALIGNED-RV32-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV32-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_15:
+; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_5:
; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-NEXT: ld a2, 0(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld a0, 7(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld a3, 0(a1)
-; CHECK-UNALIGNED-RV64-NEXT: ld a1, 7(a1)
+; CHECK-UNALIGNED-RV64-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV64-NEXT: lbu a0, 4(a0)
+; CHECK-UNALIGNED-RV64-NEXT: lw a3, 0(a1)
+; CHECK-UNALIGNED-RV64-NEXT: lbu a1, 4(a1)
; CHECK-UNALIGNED-RV64-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV64-NEXT: xor a0, a0, a1
; CHECK-UNALIGNED-RV64-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV64-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_15:
+; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_5:
; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a3, 4(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a4, 8(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a0, 11(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a5, 0(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a6, 4(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a7, 8(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a1, 11(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a2, a2, a5
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a3, a3, a6
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lbu a0, 4(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a3, 0(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lbu a1, 4(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a4, a0
; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV32-ZBB-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_15:
+; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_5:
; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a2, 0(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a0, 7(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a3, 0(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a1, 7(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: lbu a0, 4(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: lw a3, 0(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: lbu a1, 4(a1)
; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a0, a0, a1
; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV64-ZBB-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_15:
+; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_5:
; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a3, 4(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a4, 8(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a0, 11(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a5, 0(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a6, 4(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a7, 8(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a1, 11(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a2, a2, a5
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a3, a3, a6
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lbu a0, 4(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a3, 0(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lbu a1, 4(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a4, a0
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_15:
+; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_5:
; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a2, 0(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a0, 7(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a3, 0(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a1, 7(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: lbu a0, 4(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: lw a3, 0(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: lbu a1, 4(a1)
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a0, a0, a1
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_15:
+; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_5:
; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-V-NEXT: vsetivli zero, 15, e8, m1, ta, ma
+; CHECK-UNALIGNED-RV32-V-NEXT: vsetivli zero, 5, e8, mf2, ta, ma
; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v9, (a1)
; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v8, v8, v9
@@ -1323,200 +271,126 @@ define i32 @bcmp_size_15(ptr %s1, ptr %s2) nounwind {
; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-V-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_15:
+; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_5:
; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-V-NEXT: vsetivli zero, 15, e8, m1, ta, ma
-; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v8, (a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v9, (a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v8, v8, v9
-; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v8
+; CHECK-UNALIGNED-RV64-V-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: lbu a0, 4(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: lw a3, 0(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: lbu a1, 4(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a2, a2, a3
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-V-NEXT: ret
entry:
- %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 15)
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 5)
ret i32 %bcmp
}
-define i32 @bcmp_size_16(ptr %s1, ptr %s2) nounwind {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_size_16:
-; CHECK-ALIGNED-RV32: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 16
-; CHECK-ALIGNED-RV32-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_size_16:
-; CHECK-ALIGNED-RV64: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 16
-; CHECK-ALIGNED-RV64-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_16:
-; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_16:
-; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_16:
-; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_16:
-; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_16:
-; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 16
-; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-V-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_16:
-; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 16
-; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-V-NEXT: ret
+define i32 @bcmp_size_6(ptr %s1, ptr %s2) nounwind {
+; CHECK-ALIGNED-LABEL: bcmp_size_6:
+; CHECK-ALIGNED: # %bb.0: # %entry
+; CHECK-ALIGNED-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-NEXT: lbu a3, 1(a0)
+; CHECK-ALIGNED-NEXT: lbu a4, 2(a0)
+; CHECK-ALIGNED-NEXT: lbu a5, 3(a0)
+; CHECK-ALIGNED-NEXT: lbu a6, 0(a1)
+; CHECK-ALIGNED-NEXT: lbu a7, 1(a1)
+; CHECK-ALIGNED-NEXT: lbu t0, 2(a1)
+; CHECK-ALIGNED-NEXT: lbu t1, 3(a1)
+; CHECK-ALIGNED-NEXT: lbu t2, 4(a0)
+; CHECK-ALIGNED-NEXT: lbu a0, 5(a0)
+; CHECK-ALIGNED-NEXT: lbu t3, 4(a1)
+; CHECK-ALIGNED-NEXT: lbu a1, 5(a1)
+; CHECK-ALIGNED-NEXT: xor a2, a2, a6
+; CHECK-ALIGNED-NEXT: xor a3, a3, a7
+; CHECK-ALIGNED-NEXT: xor a4, a4, t0
+; CHECK-ALIGNED-NEXT: xor a5, a5, t1
+; CHECK-ALIGNED-NEXT: xor a6, t2, t3
+; CHECK-ALIGNED-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-NEXT: or a4, a4, a5
+; CHECK-ALIGNED-NEXT: or a0, a6, a0
+; CHECK-ALIGNED-NEXT: or a2, a2, a4
+; CHECK-ALIGNED-NEXT: or a0, a2, a0
+; CHECK-ALIGNED-NEXT: snez a0, a0
+; CHECK-ALIGNED-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_16:
+; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_6:
; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
; CHECK-UNALIGNED-RV32-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a3, 4(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a4, 8(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a0, 12(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a5, 0(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lw a6, 4(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lw a7, 8(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lw a1, 12(a1)
-; CHECK-UNALIGNED-RV32-NEXT: xor a2, a2, a5
-; CHECK-UNALIGNED-RV32-NEXT: xor a3, a3, a6
-; CHECK-UNALIGNED-RV32-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV32-NEXT: lhu a0, 4(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a3, 0(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lhu a1, 4(a1)
+; CHECK-UNALIGNED-RV32-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV32-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV32-NEXT: or a0, a4, a0
; CHECK-UNALIGNED-RV32-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV32-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_16:
+; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_6:
; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-NEXT: ld a2, 0(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld a0, 8(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld a3, 0(a1)
-; CHECK-UNALIGNED-RV64-NEXT: ld a1, 8(a1)
+; CHECK-UNALIGNED-RV64-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV64-NEXT: lhu a0, 4(a0)
+; CHECK-UNALIGNED-RV64-NEXT: lw a3, 0(a1)
+; CHECK-UNALIGNED-RV64-NEXT: lhu a1, 4(a1)
; CHECK-UNALIGNED-RV64-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV64-NEXT: xor a0, a0, a1
; CHECK-UNALIGNED-RV64-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV64-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_16:
+; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_6:
; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a3, 4(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a4, 8(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a0, 12(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a5, 0(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a6, 4(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a7, 8(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a1, 12(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a2, a2, a5
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a3, a3, a6
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lhu a0, 4(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a3, 0(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lhu a1, 4(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a4, a0
; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV32-ZBB-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_16:
+; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_6:
; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a2, 0(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a0, 8(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a3, 0(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a1, 8(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: lhu a0, 4(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: lw a3, 0(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: lhu a1, 4(a1)
; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a0, a0, a1
; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV64-ZBB-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_16:
+; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_6:
; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a3, 4(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a4, 8(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a0, 12(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a5, 0(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a6, 4(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a7, 8(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a1, 12(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a2, a2, a5
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a3, a3, a6
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lhu a0, 4(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a3, 0(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lhu a1, 4(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a4, a0
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_16:
+; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_6:
; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a2, 0(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a0, 8(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a3, 0(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a1, 8(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: lhu a0, 4(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: lw a3, 0(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: lhu a1, 4(a1)
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a0, a0, a1
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_16:
+; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_6:
; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-V-NEXT: vsetivli zero, 16, e8, m1, ta, ma
+; CHECK-UNALIGNED-RV32-V-NEXT: vsetivli zero, 6, e8, mf2, ta, ma
; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v9, (a1)
; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v8, v8, v9
@@ -1524,2078 +398,2697 @@ define i32 @bcmp_size_16(ptr %s1, ptr %s2) nounwind {
; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-V-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_16:
+; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_6:
; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-V-NEXT: vsetivli zero, 16, e8, m1, ta, ma
-; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v8, (a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v9, (a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v8, v8, v9
-; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v8
+; CHECK-UNALIGNED-RV64-V-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: lhu a0, 4(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: lw a3, 0(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: lhu a1, 4(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a2, a2, a3
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-V-NEXT: ret
entry:
- %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 16)
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 6)
ret i32 %bcmp
}
-define i32 @bcmp_size_31(ptr %s1, ptr %s2) nounwind {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_size_31:
-; CHECK-ALIGNED-RV32: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 31
-; CHECK-ALIGNED-RV32-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_size_31:
-; CHECK-ALIGNED-RV64: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 31
-; CHECK-ALIGNED-RV64-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_31:
-; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 31
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_31:
-; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 31
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_31:
-; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 31
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_31:
-; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 31
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
-;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_31:
-; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 31
-; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV32-V-NEXT: ret
-;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_31:
-; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 31
-; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
-; CHECK-ALIGNED-RV64-V-NEXT: ret
+define i32 @bcmp_size_7(ptr %s1, ptr %s2) nounwind {
+; CHECK-ALIGNED-LABEL: bcmp_size_7:
+; CHECK-ALIGNED: # %bb.0: # %entry
+; CHECK-ALIGNED-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-NEXT: lbu a3, 1(a0)
+; CHECK-ALIGNED-NEXT: lbu a4, 2(a0)
+; CHECK-ALIGNED-NEXT: lbu a5, 3(a0)
+; CHECK-ALIGNED-NEXT: lbu a6, 0(a1)
+; CHECK-ALIGNED-NEXT: lbu a7, 1(a1)
+; CHECK-ALIGNED-NEXT: lbu t0, 2(a1)
+; CHECK-ALIGNED-NEXT: lbu t1, 3(a1)
+; CHECK-ALIGNED-NEXT: lbu t2, 4(a1)
+; CHECK-ALIGNED-NEXT: lbu t3, 5(a1)
+; CHECK-ALIGNED-NEXT: lbu t4, 4(a0)
+; CHECK-ALIGNED-NEXT: lbu t5, 5(a0)
+; CHECK-ALIGNED-NEXT: lbu a0, 6(a0)
+; CHECK-ALIGNED-NEXT: lbu a1, 6(a1)
+; CHECK-ALIGNED-NEXT: xor a2, a2, a6
+; CHECK-ALIGNED-NEXT: xor a3, a3, a7
+; CHECK-ALIGNED-NEXT: xor a4, a4, t0
+; CHECK-ALIGNED-NEXT: xor a5, a5, t1
+; CHECK-ALIGNED-NEXT: xor a6, t4, t2
+; CHECK-ALIGNED-NEXT: xor a7, t5, t3
+; CHECK-ALIGNED-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-NEXT: or a4, a4, a5
+; CHECK-ALIGNED-NEXT: or a1, a6, a7
+; CHECK-ALIGNED-NEXT: or a2, a2, a4
+; CHECK-ALIGNED-NEXT: or a0, a1, a0
+; CHECK-ALIGNED-NEXT: or a0, a2, a0
+; CHECK-ALIGNED-NEXT: snez a0, a0
+; CHECK-ALIGNED-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_31:
+; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_7:
; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV32-NEXT: sw s0, 12(sp) # 4-byte Folded Spill
; CHECK-UNALIGNED-RV32-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a3, 4(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a4, 8(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a5, 12(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a6, 0(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lw a7, 4(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lw t0, 8(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lw t1, 12(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lw t2, 16(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw t3, 20(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw t4, 24(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a0, 27(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw t5, 16(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lw t6, 20(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lw s0, 24(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lw a1, 27(a1)
-; CHECK-UNALIGNED-RV32-NEXT: xor a2, a2, a6
-; CHECK-UNALIGNED-RV32-NEXT: xor a3, a3, a7
-; CHECK-UNALIGNED-RV32-NEXT: xor a4, a4, t0
-; CHECK-UNALIGNED-RV32-NEXT: xor a5, a5, t1
-; CHECK-UNALIGNED-RV32-NEXT: xor a6, t2, t5
-; CHECK-UNALIGNED-RV32-NEXT: xor a7, t3, t6
-; CHECK-UNALIGNED-RV32-NEXT: xor t0, t4, s0
+; CHECK-UNALIGNED-RV32-NEXT: lw a0, 3(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a3, 0(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw a1, 3(a1)
+; CHECK-UNALIGNED-RV32-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV32-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV32-NEXT: or a4, a4, a5
-; CHECK-UNALIGNED-RV32-NEXT: or a1, a6, a7
-; CHECK-UNALIGNED-RV32-NEXT: or a0, t0, a0
-; CHECK-UNALIGNED-RV32-NEXT: or a2, a2, a4
-; CHECK-UNALIGNED-RV32-NEXT: or a0, a1, a0
; CHECK-UNALIGNED-RV32-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV32-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV32-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
-; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, 16
; CHECK-UNALIGNED-RV32-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_31:
+; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_7:
; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-NEXT: ld a2, 0(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld a3, 8(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld a4, 16(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld a0, 23(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld a5, 0(a1)
-; CHECK-UNALIGNED-RV64-NEXT: ld a6, 8(a1)
-; CHECK-UNALIGNED-RV64-NEXT: ld a7, 16(a1)
-; CHECK-UNALIGNED-RV64-NEXT: ld a1, 23(a1)
-; CHECK-UNALIGNED-RV64-NEXT: xor a2, a2, a5
-; CHECK-UNALIGNED-RV64-NEXT: xor a3, a3, a6
-; CHECK-UNALIGNED-RV64-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV64-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV64-NEXT: lw a0, 3(a0)
+; CHECK-UNALIGNED-RV64-NEXT: lw a3, 0(a1)
+; CHECK-UNALIGNED-RV64-NEXT: lw a1, 3(a1)
+; CHECK-UNALIGNED-RV64-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV64-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV64-NEXT: or a0, a4, a0
; CHECK-UNALIGNED-RV64-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV64-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_31:
+; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_7:
; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: sw s0, 12(sp) # 4-byte Folded Spill
; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a3, 4(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a4, 8(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a5, 12(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a6, 0(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a7, 4(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t0, 8(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t1, 12(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t2, 16(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t3, 20(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t4, 24(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a0, 27(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t5, 16(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t6, 20(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw s0, 24(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a1, 27(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a2, a2, a6
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a3, a3, a7
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a4, a4, t0
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a5, a5, t1
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a6, t2, t5
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a7, t3, t6
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor t0, t4, s0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a0, 3(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a3, 0(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a1, 3(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a4, a4, a5
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a1, a6, a7
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, t0, a0
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a2, a2, a4
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a1, a0
; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV32-ZBB-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_31:
+; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_7:
; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a2, 0(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a3, 8(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a4, 16(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a0, 23(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a5, 0(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a6, 8(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a7, 16(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a1, 23(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a2, a2, a5
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a3, a3, a6
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: lw a0, 3(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: lw a3, 0(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: lw a1, 3(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, a4, a0
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
-;
-; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_31:
-; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sw s0, 12(sp) # 4-byte Folded Spill
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a3, 4(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a4, 8(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a5, 12(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a6, 0(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a7, 4(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t0, 8(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t1, 12(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t2, 16(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t3, 20(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t4, 24(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a0, 27(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t5, 16(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t6, 20(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw s0, 24(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a1, 27(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a2, a2, a6
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a3, a3, a7
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a4, a4, t0
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a5, a5, t1
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a6, t2, t5
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a7, t3, t6
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor t0, t4, s0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_7:
+; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a0, 3(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a3, 0(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a1, 3(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a4, a4, a5
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a1, a6, a7
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, t0, a0
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a2, a2, a4
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a1, a0
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_31:
+; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_7:
; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a2, 0(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a3, 8(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a4, 16(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a0, 23(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a5, 0(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a6, 8(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a7, 16(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a1, 23(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a2, a2, a5
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a3, a3, a6
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: lw a0, 3(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: lw a3, 0(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: lw a1, 3(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, a4, a0
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_31:
+; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_7:
; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-V-NEXT: vsetivli zero, 31, e8, m2, ta, ma
+; CHECK-UNALIGNED-RV32-V-NEXT: vsetivli zero, 7, e8, mf2, ta, ma
; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v10, (a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v12, v8, v10
-; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v12
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v9, (a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v8, v8, v9
+; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v8
; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-V-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_31:
+; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_7:
; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-V-NEXT: vsetivli zero, 31, e8, m2, ta, ma
-; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v8, (a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v10, (a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v12, v8, v10
-; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v12
+; CHECK-UNALIGNED-RV64-V-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: lw a0, 3(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: lw a3, 0(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: lw a1, 3(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a2, a2, a3
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV64-V-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-V-NEXT: ret
entry:
- %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 31)
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 7)
ret i32 %bcmp
}
-define i32 @bcmp_size_32(ptr %s1, ptr %s2) nounwind {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_size_32:
+define i32 @bcmp_size_8(ptr %s1, ptr %s2) nounwind {
+; CHECK-ALIGNED-RV32-LABEL: bcmp_size_8:
; CHECK-ALIGNED-RV32: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 32
-; CHECK-ALIGNED-RV32-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-NEXT: sw s0, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-NEXT: lbu a3, 1(a0)
+; CHECK-ALIGNED-RV32-NEXT: lbu a4, 2(a0)
+; CHECK-ALIGNED-RV32-NEXT: lbu a5, 3(a0)
+; CHECK-ALIGNED-RV32-NEXT: lbu a6, 0(a1)
+; CHECK-ALIGNED-RV32-NEXT: lbu a7, 1(a1)
+; CHECK-ALIGNED-RV32-NEXT: lbu t0, 2(a1)
+; CHECK-ALIGNED-RV32-NEXT: lbu t1, 3(a1)
+; CHECK-ALIGNED-RV32-NEXT: lbu t2, 4(a0)
+; CHECK-ALIGNED-RV32-NEXT: lbu t3, 5(a0)
+; CHECK-ALIGNED-RV32-NEXT: lbu t4, 6(a0)
+; CHECK-ALIGNED-RV32-NEXT: lbu a0, 7(a0)
+; CHECK-ALIGNED-RV32-NEXT: lbu t5, 4(a1)
+; CHECK-ALIGNED-RV32-NEXT: lbu t6, 5(a1)
+; CHECK-ALIGNED-RV32-NEXT: lbu s0, 6(a1)
+; CHECK-ALIGNED-RV32-NEXT: lbu a1, 7(a1)
+; CHECK-ALIGNED-RV32-NEXT: xor a2, a2, a6
+; CHECK-ALIGNED-RV32-NEXT: xor a3, a3, a7
+; CHECK-ALIGNED-RV32-NEXT: xor a4, a4, t0
+; CHECK-ALIGNED-RV32-NEXT: xor a5, a5, t1
+; CHECK-ALIGNED-RV32-NEXT: xor a6, t2, t5
+; CHECK-ALIGNED-RV32-NEXT: xor a7, t3, t6
+; CHECK-ALIGNED-RV32-NEXT: xor t0, t4, s0
+; CHECK-ALIGNED-RV32-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV32-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-RV32-NEXT: or a4, a4, a5
+; CHECK-ALIGNED-RV32-NEXT: or a1, a6, a7
+; CHECK-ALIGNED-RV32-NEXT: or a0, t0, a0
+; CHECK-ALIGNED-RV32-NEXT: or a2, a2, a4
+; CHECK-ALIGNED-RV32-NEXT: or a0, a1, a0
+; CHECK-ALIGNED-RV32-NEXT: or a0, a2, a0
+; CHECK-ALIGNED-RV32-NEXT: snez a0, a0
+; CHECK-ALIGNED-RV32-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-NEXT: ret
;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_size_32:
+; CHECK-ALIGNED-RV64-LABEL: bcmp_size_8:
; CHECK-ALIGNED-RV64: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 32
-; CHECK-ALIGNED-RV64-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-NEXT: sd s0, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-NEXT: lbu a3, 1(a0)
+; CHECK-ALIGNED-RV64-NEXT: lbu a4, 2(a0)
+; CHECK-ALIGNED-RV64-NEXT: lbu a5, 3(a0)
+; CHECK-ALIGNED-RV64-NEXT: lbu a6, 0(a1)
+; CHECK-ALIGNED-RV64-NEXT: lbu a7, 1(a1)
+; CHECK-ALIGNED-RV64-NEXT: lbu t0, 2(a1)
+; CHECK-ALIGNED-RV64-NEXT: lbu t1, 3(a1)
+; CHECK-ALIGNED-RV64-NEXT: lbu t2, 4(a0)
+; CHECK-ALIGNED-RV64-NEXT: lbu t3, 5(a0)
+; CHECK-ALIGNED-RV64-NEXT: lbu t4, 6(a0)
+; CHECK-ALIGNED-RV64-NEXT: lbu a0, 7(a0)
+; CHECK-ALIGNED-RV64-NEXT: lbu t5, 4(a1)
+; CHECK-ALIGNED-RV64-NEXT: lbu t6, 5(a1)
+; CHECK-ALIGNED-RV64-NEXT: lbu s0, 6(a1)
+; CHECK-ALIGNED-RV64-NEXT: lbu a1, 7(a1)
+; CHECK-ALIGNED-RV64-NEXT: xor a2, a2, a6
+; CHECK-ALIGNED-RV64-NEXT: xor a3, a3, a7
+; CHECK-ALIGNED-RV64-NEXT: xor a4, a4, t0
+; CHECK-ALIGNED-RV64-NEXT: xor a5, a5, t1
+; CHECK-ALIGNED-RV64-NEXT: xor a6, t2, t5
+; CHECK-ALIGNED-RV64-NEXT: xor a7, t3, t6
+; CHECK-ALIGNED-RV64-NEXT: xor t0, t4, s0
+; CHECK-ALIGNED-RV64-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV64-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-RV64-NEXT: or a4, a4, a5
+; CHECK-ALIGNED-RV64-NEXT: or a1, a6, a7
+; CHECK-ALIGNED-RV64-NEXT: or a0, t0, a0
+; CHECK-ALIGNED-RV64-NEXT: or a2, a2, a4
+; CHECK-ALIGNED-RV64-NEXT: or a0, a1, a0
+; CHECK-ALIGNED-RV64-NEXT: or a0, a2, a0
+; CHECK-ALIGNED-RV64-NEXT: snez a0, a0
+; CHECK-ALIGNED-RV64-NEXT: ld s0, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-NEXT: ret
;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_32:
+; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_8:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 32
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sw s0, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 1(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a4, 2(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a5, 3(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a6, 0(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a7, 1(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu t0, 2(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu t1, 3(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu t2, 4(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu t3, 5(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu t4, 6(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a0, 7(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu t5, 4(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu t6, 5(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu s0, 6(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a1, 7(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: xor a2, a2, a6
+; CHECK-ALIGNED-RV32-ZBB-NEXT: xor a3, a3, a7
+; CHECK-ALIGNED-RV32-ZBB-NEXT: xor a4, a4, t0
+; CHECK-ALIGNED-RV32-ZBB-NEXT: xor a5, a5, t1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: xor a6, t2, t5
+; CHECK-ALIGNED-RV32-ZBB-NEXT: xor a7, t3, t6
+; CHECK-ALIGNED-RV32-ZBB-NEXT: xor t0, t4, s0
+; CHECK-ALIGNED-RV32-ZBB-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: or a4, a4, a5
+; CHECK-ALIGNED-RV32-ZBB-NEXT: or a1, a6, a7
+; CHECK-ALIGNED-RV32-ZBB-NEXT: or a0, t0, a0
+; CHECK-ALIGNED-RV32-ZBB-NEXT: or a2, a2, a4
+; CHECK-ALIGNED-RV32-ZBB-NEXT: or a0, a1, a0
+; CHECK-ALIGNED-RV32-ZBB-NEXT: or a0, a2, a0
+; CHECK-ALIGNED-RV32-ZBB-NEXT: snez a0, a0
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_32:
+; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_8:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 32
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sd s0, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 1(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a4, 2(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a5, 3(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a6, 0(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a7, 1(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu t0, 2(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu t1, 3(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu t2, 4(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu t3, 5(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu t4, 6(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a0, 7(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu t5, 4(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu t6, 5(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu s0, 6(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a1, 7(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: xor a2, a2, a6
+; CHECK-ALIGNED-RV64-ZBB-NEXT: xor a3, a3, a7
+; CHECK-ALIGNED-RV64-ZBB-NEXT: xor a4, a4, t0
+; CHECK-ALIGNED-RV64-ZBB-NEXT: xor a5, a5, t1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: xor a6, t2, t5
+; CHECK-ALIGNED-RV64-ZBB-NEXT: xor a7, t3, t6
+; CHECK-ALIGNED-RV64-ZBB-NEXT: xor t0, t4, s0
+; CHECK-ALIGNED-RV64-ZBB-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: or a4, a4, a5
+; CHECK-ALIGNED-RV64-ZBB-NEXT: or a1, a6, a7
+; CHECK-ALIGNED-RV64-ZBB-NEXT: or a0, t0, a0
+; CHECK-ALIGNED-RV64-ZBB-NEXT: or a2, a2, a4
+; CHECK-ALIGNED-RV64-ZBB-NEXT: or a0, a1, a0
+; CHECK-ALIGNED-RV64-ZBB-NEXT: or a0, a2, a0
+; CHECK-ALIGNED-RV64-ZBB-NEXT: snez a0, a0
+; CHECK-ALIGNED-RV64-ZBB-NEXT: ld s0, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_32:
+; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_8:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 32
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw s0, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 1(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a4, 2(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a5, 3(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a6, 0(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a7, 1(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu t0, 2(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu t1, 3(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu t2, 4(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu t3, 5(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu t4, 6(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a0, 7(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu t5, 4(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu t6, 5(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu s0, 6(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a1, 7(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: xor a2, a2, a6
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: xor a3, a3, a7
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: xor a4, a4, t0
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: xor a5, a5, t1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: xor a6, t2, t5
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: xor a7, t3, t6
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: xor t0, t4, s0
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: or a4, a4, a5
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: or a1, a6, a7
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: or a0, t0, a0
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: or a2, a2, a4
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: or a0, a1, a0
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: or a0, a2, a0
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: snez a0, a0
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_32:
+; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_8:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 32
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd s0, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 1(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a4, 2(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a5, 3(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a6, 0(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a7, 1(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu t0, 2(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu t1, 3(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu t2, 4(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu t3, 5(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu t4, 6(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a0, 7(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu t5, 4(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu t6, 5(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu s0, 6(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a1, 7(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: xor a2, a2, a6
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: xor a3, a3, a7
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: xor a4, a4, t0
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: xor a5, a5, t1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: xor a6, t2, t5
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: xor a7, t3, t6
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: xor t0, t4, s0
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: or a4, a4, a5
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: or a1, a6, a7
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: or a0, t0, a0
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: or a2, a2, a4
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: or a0, a1, a0
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: or a0, a2, a0
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: snez a0, a0
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld s0, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_32:
+; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_8:
; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 32
-; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-ALIGNED-RV32-V-NEXT: sw s0, 12(sp) # 4-byte Folded Spill
+; CHECK-ALIGNED-RV32-V-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-V-NEXT: lbu a3, 1(a0)
+; CHECK-ALIGNED-RV32-V-NEXT: lbu a4, 2(a0)
+; CHECK-ALIGNED-RV32-V-NEXT: lbu a5, 3(a0)
+; CHECK-ALIGNED-RV32-V-NEXT: lbu a6, 0(a1)
+; CHECK-ALIGNED-RV32-V-NEXT: lbu a7, 1(a1)
+; CHECK-ALIGNED-RV32-V-NEXT: lbu t0, 2(a1)
+; CHECK-ALIGNED-RV32-V-NEXT: lbu t1, 3(a1)
+; CHECK-ALIGNED-RV32-V-NEXT: lbu t2, 4(a0)
+; CHECK-ALIGNED-RV32-V-NEXT: lbu t3, 5(a0)
+; CHECK-ALIGNED-RV32-V-NEXT: lbu t4, 6(a0)
+; CHECK-ALIGNED-RV32-V-NEXT: lbu a0, 7(a0)
+; CHECK-ALIGNED-RV32-V-NEXT: lbu t5, 4(a1)
+; CHECK-ALIGNED-RV32-V-NEXT: lbu t6, 5(a1)
+; CHECK-ALIGNED-RV32-V-NEXT: lbu s0, 6(a1)
+; CHECK-ALIGNED-RV32-V-NEXT: lbu a1, 7(a1)
+; CHECK-ALIGNED-RV32-V-NEXT: xor a2, a2, a6
+; CHECK-ALIGNED-RV32-V-NEXT: xor a3, a3, a7
+; CHECK-ALIGNED-RV32-V-NEXT: xor a4, a4, t0
+; CHECK-ALIGNED-RV32-V-NEXT: xor a5, a5, t1
+; CHECK-ALIGNED-RV32-V-NEXT: xor a6, t2, t5
+; CHECK-ALIGNED-RV32-V-NEXT: xor a7, t3, t6
+; CHECK-ALIGNED-RV32-V-NEXT: xor t0, t4, s0
+; CHECK-ALIGNED-RV32-V-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV32-V-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-RV32-V-NEXT: or a4, a4, a5
+; CHECK-ALIGNED-RV32-V-NEXT: or a1, a6, a7
+; CHECK-ALIGNED-RV32-V-NEXT: or a0, t0, a0
+; CHECK-ALIGNED-RV32-V-NEXT: or a2, a2, a4
+; CHECK-ALIGNED-RV32-V-NEXT: or a0, a1, a0
+; CHECK-ALIGNED-RV32-V-NEXT: or a0, a2, a0
+; CHECK-ALIGNED-RV32-V-NEXT: snez a0, a0
+; CHECK-ALIGNED-RV32-V-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-V-NEXT: ret
;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_32:
+; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_8:
; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 32
-; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-ALIGNED-RV64-V-NEXT: sd s0, 8(sp) # 8-byte Folded Spill
+; CHECK-ALIGNED-RV64-V-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-V-NEXT: lbu a3, 1(a0)
+; CHECK-ALIGNED-RV64-V-NEXT: lbu a4, 2(a0)
+; CHECK-ALIGNED-RV64-V-NEXT: lbu a5, 3(a0)
+; CHECK-ALIGNED-RV64-V-NEXT: lbu a6, 0(a1)
+; CHECK-ALIGNED-RV64-V-NEXT: lbu a7, 1(a1)
+; CHECK-ALIGNED-RV64-V-NEXT: lbu t0, 2(a1)
+; CHECK-ALIGNED-RV64-V-NEXT: lbu t1, 3(a1)
+; CHECK-ALIGNED-RV64-V-NEXT: lbu t2, 4(a0)
+; CHECK-ALIGNED-RV64-V-NEXT: lbu t3, 5(a0)
+; CHECK-ALIGNED-RV64-V-NEXT: lbu t4, 6(a0)
+; CHECK-ALIGNED-RV64-V-NEXT: lbu a0, 7(a0)
+; CHECK-ALIGNED-RV64-V-NEXT: lbu t5, 4(a1)
+; CHECK-ALIGNED-RV64-V-NEXT: lbu t6, 5(a1)
+; CHECK-ALIGNED-RV64-V-NEXT: lbu s0, 6(a1)
+; CHECK-ALIGNED-RV64-V-NEXT: lbu a1, 7(a1)
+; CHECK-ALIGNED-RV64-V-NEXT: xor a2, a2, a6
+; CHECK-ALIGNED-RV64-V-NEXT: xor a3, a3, a7
+; CHECK-ALIGNED-RV64-V-NEXT: xor a4, a4, t0
+; CHECK-ALIGNED-RV64-V-NEXT: xor a5, a5, t1
+; CHECK-ALIGNED-RV64-V-NEXT: xor a6, t2, t5
+; CHECK-ALIGNED-RV64-V-NEXT: xor a7, t3, t6
+; CHECK-ALIGNED-RV64-V-NEXT: xor t0, t4, s0
+; CHECK-ALIGNED-RV64-V-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-RV64-V-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-RV64-V-NEXT: or a4, a4, a5
+; CHECK-ALIGNED-RV64-V-NEXT: or a1, a6, a7
+; CHECK-ALIGNED-RV64-V-NEXT: or a0, t0, a0
+; CHECK-ALIGNED-RV64-V-NEXT: or a2, a2, a4
+; CHECK-ALIGNED-RV64-V-NEXT: or a0, a1, a0
+; CHECK-ALIGNED-RV64-V-NEXT: or a0, a2, a0
+; CHECK-ALIGNED-RV64-V-NEXT: snez a0, a0
+; CHECK-ALIGNED-RV64-V-NEXT: ld s0, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-V-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_32:
+; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_8:
; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV32-NEXT: sw s0, 12(sp) # 4-byte Folded Spill
; CHECK-UNALIGNED-RV32-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a3, 4(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a4, 8(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a5, 12(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a6, 0(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lw a7, 4(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lw t0, 8(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lw t1, 12(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lw t2, 16(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw t3, 20(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw t4, 24(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a0, 28(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw t5, 16(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lw t6, 20(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lw s0, 24(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lw a1, 28(a1)
-; CHECK-UNALIGNED-RV32-NEXT: xor a2, a2, a6
-; CHECK-UNALIGNED-RV32-NEXT: xor a3, a3, a7
-; CHECK-UNALIGNED-RV32-NEXT: xor a4, a4, t0
-; CHECK-UNALIGNED-RV32-NEXT: xor a5, a5, t1
-; CHECK-UNALIGNED-RV32-NEXT: xor a6, t2, t5
-; CHECK-UNALIGNED-RV32-NEXT: xor a7, t3, t6
-; CHECK-UNALIGNED-RV32-NEXT: xor t0, t4, s0
+; CHECK-UNALIGNED-RV32-NEXT: lw a0, 4(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a3, 0(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw a1, 4(a1)
+; CHECK-UNALIGNED-RV32-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV32-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV32-NEXT: or a4, a4, a5
-; CHECK-UNALIGNED-RV32-NEXT: or a1, a6, a7
-; CHECK-UNALIGNED-RV32-NEXT: or a0, t0, a0
-; CHECK-UNALIGNED-RV32-NEXT: or a2, a2, a4
-; CHECK-UNALIGNED-RV32-NEXT: or a0, a1, a0
; CHECK-UNALIGNED-RV32-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV32-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV32-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
-; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, 16
; CHECK-UNALIGNED-RV32-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_32:
+; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_8:
; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-NEXT: ld a2, 0(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld a3, 8(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld a4, 16(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld a0, 24(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld a5, 0(a1)
-; CHECK-UNALIGNED-RV64-NEXT: ld a6, 8(a1)
-; CHECK-UNALIGNED-RV64-NEXT: ld a7, 16(a1)
-; CHECK-UNALIGNED-RV64-NEXT: ld a1, 24(a1)
-; CHECK-UNALIGNED-RV64-NEXT: xor a2, a2, a5
-; CHECK-UNALIGNED-RV64-NEXT: xor a3, a3, a6
-; CHECK-UNALIGNED-RV64-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV64-NEXT: ld a0, 0(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld a1, 0(a1)
; CHECK-UNALIGNED-RV64-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV64-NEXT: or a0, a4, a0
-; CHECK-UNALIGNED-RV64-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV64-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_32:
+; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_8:
; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: sw s0, 12(sp) # 4-byte Folded Spill
; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a3, 4(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a4, 8(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a5, 12(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a6, 0(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a7, 4(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t0, 8(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t1, 12(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t2, 16(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t3, 20(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t4, 24(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a0, 28(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t5, 16(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t6, 20(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw s0, 24(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a1, 28(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a2, a2, a6
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a3, a3, a7
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a4, a4, t0
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a5, a5, t1
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a6, t2, t5
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a7, t3, t6
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor t0, t4, s0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a0, 4(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a3, 0(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a1, 4(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a4, a4, a5
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a1, a6, a7
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, t0, a0
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a2, a2, a4
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a1, a0
; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV32-ZBB-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_32:
+; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_8:
; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a2, 0(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a3, 8(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a4, 16(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a0, 24(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a5, 0(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a6, 8(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a7, 16(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a1, 24(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a2, a2, a5
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a3, a3, a6
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a0, 0(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a1, 0(a1)
; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, a4, a0
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV64-ZBB-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_32:
+; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_8:
; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sw s0, 12(sp) # 4-byte Folded Spill
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a3, 4(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a4, 8(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a5, 12(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a6, 0(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a7, 4(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t0, 8(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t1, 12(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t2, 16(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t3, 20(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t4, 24(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a0, 28(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t5, 16(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t6, 20(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw s0, 24(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a1, 28(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a2, a2, a6
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a3, a3, a7
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a4, a4, t0
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a5, a5, t1
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a6, t2, t5
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a7, t3, t6
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor t0, t4, s0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a0, 4(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a3, 0(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a1, 4(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a4, a4, a5
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a1, a6, a7
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, t0, a0
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a2, a2, a4
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a1, a0
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_32:
+; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_8:
; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a2, 0(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a3, 8(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a4, 16(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a0, 24(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a5, 0(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a6, 8(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a7, 16(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a1, 24(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a2, a2, a5
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a3, a3, a6
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a0, 0(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a1, 0(a1)
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, a4, a0
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_32:
+; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_8:
; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-V-NEXT: li a2, 32
-; CHECK-UNALIGNED-RV32-V-NEXT: vsetvli zero, a2, e8, m2, ta, ma
+; CHECK-UNALIGNED-RV32-V-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v10, (a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v12, v8, v10
-; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v12
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v9, (a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v8, v8, v9
+; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v8
; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-V-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_32:
+; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_8:
; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-V-NEXT: li a2, 32
-; CHECK-UNALIGNED-RV64-V-NEXT: vsetvli zero, a2, e8, m2, ta, ma
-; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v8, (a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v10, (a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v12, v8, v10
-; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v12
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a0, 0(a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: ld a1, 0(a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: xor a0, a0, a1
; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-V-NEXT: ret
entry:
- %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 32)
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 8)
ret i32 %bcmp
}
-define i32 @bcmp_size_63(ptr %s1, ptr %s2) nounwind {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_size_63:
+define i32 @bcmp_size_15(ptr %s1, ptr %s2) nounwind {
+; CHECK-ALIGNED-RV32-LABEL: bcmp_size_15:
; CHECK-ALIGNED-RV32: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 63
+; CHECK-ALIGNED-RV32-NEXT: li a2, 15
; CHECK-ALIGNED-RV32-NEXT: call bcmp
; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-NEXT: ret
;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_size_63:
+; CHECK-ALIGNED-RV64-LABEL: bcmp_size_15:
; CHECK-ALIGNED-RV64: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 63
+; CHECK-ALIGNED-RV64-NEXT: li a2, 15
; CHECK-ALIGNED-RV64-NEXT: call bcmp
; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-NEXT: ret
;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_63:
+; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_15:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 63
+; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 15
; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_63:
+; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_15:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 63
+; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 15
; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_63:
+; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_15:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 63
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 15
; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_63:
+; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_15:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 63
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 15
; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_63:
+; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_15:
; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 63
+; CHECK-ALIGNED-RV32-V-NEXT: li a2, 15
; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-V-NEXT: ret
;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_63:
+; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_15:
; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 63
+; CHECK-ALIGNED-RV64-V-NEXT: li a2, 15
; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-V-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_63:
+; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_15:
; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-UNALIGNED-RV32-NEXT: li a2, 63
-; CHECK-UNALIGNED-RV32-NEXT: call bcmp
-; CHECK-UNALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a3, 4(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a4, 8(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a0, 11(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a5, 0(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw a6, 4(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw a7, 8(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw a1, 11(a1)
+; CHECK-UNALIGNED-RV32-NEXT: xor a2, a2, a5
+; CHECK-UNALIGNED-RV32-NEXT: xor a3, a3, a6
+; CHECK-UNALIGNED-RV32-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV32-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV32-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV32-NEXT: or a0, a4, a0
+; CHECK-UNALIGNED-RV32-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_63:
+; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_15:
; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV64-NEXT: sd s0, 8(sp) # 8-byte Folded Spill
; CHECK-UNALIGNED-RV64-NEXT: ld a2, 0(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld a3, 8(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld a4, 16(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld a5, 24(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld a6, 0(a1)
-; CHECK-UNALIGNED-RV64-NEXT: ld a7, 8(a1)
-; CHECK-UNALIGNED-RV64-NEXT: ld t0, 16(a1)
-; CHECK-UNALIGNED-RV64-NEXT: ld t1, 24(a1)
-; CHECK-UNALIGNED-RV64-NEXT: ld t2, 32(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld t3, 40(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld t4, 48(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld a0, 55(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld t5, 32(a1)
-; CHECK-UNALIGNED-RV64-NEXT: ld t6, 40(a1)
-; CHECK-UNALIGNED-RV64-NEXT: ld s0, 48(a1)
-; CHECK-UNALIGNED-RV64-NEXT: ld a1, 55(a1)
-; CHECK-UNALIGNED-RV64-NEXT: xor a2, a2, a6
-; CHECK-UNALIGNED-RV64-NEXT: xor a3, a3, a7
-; CHECK-UNALIGNED-RV64-NEXT: xor a4, a4, t0
-; CHECK-UNALIGNED-RV64-NEXT: xor a5, a5, t1
-; CHECK-UNALIGNED-RV64-NEXT: xor a6, t2, t5
-; CHECK-UNALIGNED-RV64-NEXT: xor a7, t3, t6
-; CHECK-UNALIGNED-RV64-NEXT: xor t0, t4, s0
+; CHECK-UNALIGNED-RV64-NEXT: ld a0, 7(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld a3, 0(a1)
+; CHECK-UNALIGNED-RV64-NEXT: ld a1, 7(a1)
+; CHECK-UNALIGNED-RV64-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV64-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV64-NEXT: or a4, a4, a5
-; CHECK-UNALIGNED-RV64-NEXT: or a1, a6, a7
-; CHECK-UNALIGNED-RV64-NEXT: or a0, t0, a0
-; CHECK-UNALIGNED-RV64-NEXT: or a2, a2, a4
-; CHECK-UNALIGNED-RV64-NEXT: or a0, a1, a0
; CHECK-UNALIGNED-RV64-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV64-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV64-NEXT: ld s0, 8(sp) # 8-byte Folded Reload
-; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, 16
; CHECK-UNALIGNED-RV64-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_63:
+; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_15:
; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: li a2, 63
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a3, 4(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a4, 8(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a0, 11(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a5, 0(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a6, 4(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a7, 8(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a1, 11(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a2, a2, a5
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a3, a3, a6
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a4, a0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_63:
+; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_15:
; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: sd s0, 8(sp) # 8-byte Folded Spill
; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a2, 0(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a3, 8(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a4, 16(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a5, 24(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a6, 0(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a7, 8(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t0, 16(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t1, 24(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t2, 32(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t3, 40(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t4, 48(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a0, 55(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t5, 32(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t6, 40(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld s0, 48(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a1, 55(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a2, a2, a6
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a3, a3, a7
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a4, a4, t0
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a5, a5, t1
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a6, t2, t5
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a7, t3, t6
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor t0, t4, s0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a0, 7(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a3, 0(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a1, 7(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a4, a4, a5
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a1, a6, a7
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, t0, a0
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a2, a2, a4
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, a1, a0
; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV64-ZBB-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld s0, 8(sp) # 8-byte Folded Reload
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_63:
+; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_15:
; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: li a2, 63
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
-;
-; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_63:
-; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sd s0, 8(sp) # 8-byte Folded Spill
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a2, 0(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a3, 8(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a4, 16(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a5, 24(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a6, 0(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a7, 8(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t0, 16(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t1, 24(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t2, 32(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t3, 40(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t4, 48(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a0, 55(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t5, 32(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t6, 40(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld s0, 48(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a1, 55(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a2, a2, a6
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a3, a3, a7
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a4, a4, t0
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a5, a5, t1
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a6, t2, t5
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a7, t3, t6
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor t0, t4, s0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a3, 4(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a4, 8(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a0, 11(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a5, 0(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a6, 4(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a7, 8(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a1, 11(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a2, a2, a5
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a3, a3, a6
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a4, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_15:
+; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a2, 0(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a0, 7(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a3, 0(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a1, 7(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a4, a4, a5
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a1, a6, a7
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, t0, a0
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a2, a2, a4
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, a1, a0
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld s0, 8(sp) # 8-byte Folded Reload
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_63:
+; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_15:
; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-V-NEXT: li a2, 63
-; CHECK-UNALIGNED-RV32-V-NEXT: vsetvli zero, a2, e8, m4, ta, ma
+; CHECK-UNALIGNED-RV32-V-NEXT: vsetivli zero, 15, e8, m1, ta, ma
; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v12, (a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v16, v8, v12
-; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v16
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v9, (a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v8, v8, v9
+; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v8
; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-V-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_63:
+; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_15:
; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-V-NEXT: li a2, 63
-; CHECK-UNALIGNED-RV64-V-NEXT: vsetvli zero, a2, e8, m4, ta, ma
+; CHECK-UNALIGNED-RV64-V-NEXT: vsetivli zero, 15, e8, m1, ta, ma
; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v8, (a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v12, (a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v16, v8, v12
-; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v16
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v9, (a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v8, v8, v9
+; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v8
; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-V-NEXT: ret
entry:
- %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 63)
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 15)
ret i32 %bcmp
}
-define i32 @bcmp_size_64(ptr %s1, ptr %s2) nounwind {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_size_64:
+define i32 @bcmp_size_16(ptr %s1, ptr %s2) nounwind {
+; CHECK-ALIGNED-RV32-LABEL: bcmp_size_16:
; CHECK-ALIGNED-RV32: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 64
+; CHECK-ALIGNED-RV32-NEXT: li a2, 16
; CHECK-ALIGNED-RV32-NEXT: call bcmp
; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-NEXT: ret
;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_size_64:
+; CHECK-ALIGNED-RV64-LABEL: bcmp_size_16:
; CHECK-ALIGNED-RV64: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 64
+; CHECK-ALIGNED-RV64-NEXT: li a2, 16
; CHECK-ALIGNED-RV64-NEXT: call bcmp
; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-NEXT: ret
;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_64:
+; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_16:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 64
+; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 16
; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_64:
+; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_16:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 64
+; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 16
; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_64:
+; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_16:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 64
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 16
; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_64:
+; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_16:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 64
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_64:
+; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_16:
; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 64
+; CHECK-ALIGNED-RV32-V-NEXT: li a2, 16
; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-V-NEXT: ret
;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_64:
+; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_16:
; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 64
+; CHECK-ALIGNED-RV64-V-NEXT: li a2, 16
; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-V-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_16:
; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-UNALIGNED-RV32-NEXT: li a2, 64
-; CHECK-UNALIGNED-RV32-NEXT: call bcmp
-; CHECK-UNALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a3, 4(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a4, 8(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a0, 12(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a5, 0(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw a6, 4(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw a7, 8(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw a1, 12(a1)
+; CHECK-UNALIGNED-RV32-NEXT: xor a2, a2, a5
+; CHECK-UNALIGNED-RV32-NEXT: xor a3, a3, a6
+; CHECK-UNALIGNED-RV32-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV32-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV32-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV32-NEXT: or a0, a4, a0
+; CHECK-UNALIGNED-RV32-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_16:
; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV64-NEXT: sd s0, 8(sp) # 8-byte Folded Spill
; CHECK-UNALIGNED-RV64-NEXT: ld a2, 0(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld a3, 8(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld a4, 16(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld a5, 24(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld a6, 0(a1)
-; CHECK-UNALIGNED-RV64-NEXT: ld a7, 8(a1)
-; CHECK-UNALIGNED-RV64-NEXT: ld t0, 16(a1)
-; CHECK-UNALIGNED-RV64-NEXT: ld t1, 24(a1)
-; CHECK-UNALIGNED-RV64-NEXT: ld t2, 32(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld t3, 40(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld t4, 48(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld a0, 56(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld t5, 32(a1)
-; CHECK-UNALIGNED-RV64-NEXT: ld t6, 40(a1)
-; CHECK-UNALIGNED-RV64-NEXT: ld s0, 48(a1)
-; CHECK-UNALIGNED-RV64-NEXT: ld a1, 56(a1)
-; CHECK-UNALIGNED-RV64-NEXT: xor a2, a2, a6
-; CHECK-UNALIGNED-RV64-NEXT: xor a3, a3, a7
-; CHECK-UNALIGNED-RV64-NEXT: xor a4, a4, t0
-; CHECK-UNALIGNED-RV64-NEXT: xor a5, a5, t1
-; CHECK-UNALIGNED-RV64-NEXT: xor a6, t2, t5
-; CHECK-UNALIGNED-RV64-NEXT: xor a7, t3, t6
-; CHECK-UNALIGNED-RV64-NEXT: xor t0, t4, s0
+; CHECK-UNALIGNED-RV64-NEXT: ld a0, 8(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld a3, 0(a1)
+; CHECK-UNALIGNED-RV64-NEXT: ld a1, 8(a1)
+; CHECK-UNALIGNED-RV64-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV64-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV64-NEXT: or a4, a4, a5
-; CHECK-UNALIGNED-RV64-NEXT: or a1, a6, a7
-; CHECK-UNALIGNED-RV64-NEXT: or a0, t0, a0
-; CHECK-UNALIGNED-RV64-NEXT: or a2, a2, a4
-; CHECK-UNALIGNED-RV64-NEXT: or a0, a1, a0
; CHECK-UNALIGNED-RV64-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV64-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV64-NEXT: ld s0, 8(sp) # 8-byte Folded Reload
-; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, 16
; CHECK-UNALIGNED-RV64-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_16:
; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: li a2, 64
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a3, 4(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a4, 8(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a0, 12(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a5, 0(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a6, 4(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a7, 8(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a1, 12(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a2, a2, a5
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a3, a3, a6
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a4, a0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_16:
; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: sd s0, 8(sp) # 8-byte Folded Spill
; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a2, 0(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a3, 8(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a4, 16(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a5, 24(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a6, 0(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a7, 8(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t0, 16(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t1, 24(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t2, 32(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t3, 40(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t4, 48(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a0, 56(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t5, 32(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t6, 40(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld s0, 48(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a1, 56(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a2, a2, a6
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a3, a3, a7
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a4, a4, t0
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a5, a5, t1
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a6, t2, t5
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a7, t3, t6
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor t0, t4, s0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a0, 8(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a3, 0(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a1, 8(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a4, a4, a5
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a1, a6, a7
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, t0, a0
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a2, a2, a4
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, a1, a0
; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV64-ZBB-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld s0, 8(sp) # 8-byte Folded Reload
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_16:
; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: li a2, 64
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
-;
-; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_64:
-; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sd s0, 8(sp) # 8-byte Folded Spill
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a2, 0(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a3, 8(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a4, 16(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a5, 24(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a6, 0(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a7, 8(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t0, 16(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t1, 24(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t2, 32(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t3, 40(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t4, 48(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a0, 56(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t5, 32(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t6, 40(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld s0, 48(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a1, 56(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a2, a2, a6
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a3, a3, a7
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a4, a4, t0
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a5, a5, t1
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a6, t2, t5
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a7, t3, t6
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor t0, t4, s0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a3, 4(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a4, 8(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a0, 12(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a5, 0(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a6, 4(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a7, 8(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a1, 12(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a2, a2, a5
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a3, a3, a6
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a4, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_16:
+; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a2, 0(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a0, 8(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a3, 0(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a1, 8(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a2, a2, a3
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a4, a4, a5
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a1, a6, a7
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, t0, a0
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a2, a2, a4
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, a1, a0
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, a2, a0
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: snez a0, a0
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld s0, 8(sp) # 8-byte Folded Reload
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_16:
; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-V-NEXT: li a2, 64
-; CHECK-UNALIGNED-RV32-V-NEXT: vsetvli zero, a2, e8, m4, ta, ma
+; CHECK-UNALIGNED-RV32-V-NEXT: vsetivli zero, 16, e8, m1, ta, ma
; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v12, (a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v16, v8, v12
-; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v16
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v9, (a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v8, v8, v9
+; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v8
; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-V-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_16:
; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-V-NEXT: li a2, 64
-; CHECK-UNALIGNED-RV64-V-NEXT: vsetvli zero, a2, e8, m4, ta, ma
+; CHECK-UNALIGNED-RV64-V-NEXT: vsetivli zero, 16, e8, m1, ta, ma
; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v8, (a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v12, (a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v16, v8, v12
-; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v16
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v9, (a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v8, v8, v9
+; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v8
; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-V-NEXT: ret
entry:
- %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 64)
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 16)
ret i32 %bcmp
}
-define i32 @bcmp_size_127(ptr %s1, ptr %s2) nounwind {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_size_127:
+define i32 @bcmp_size_31(ptr %s1, ptr %s2) nounwind {
+; CHECK-ALIGNED-RV32-LABEL: bcmp_size_31:
; CHECK-ALIGNED-RV32: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 127
+; CHECK-ALIGNED-RV32-NEXT: li a2, 31
; CHECK-ALIGNED-RV32-NEXT: call bcmp
; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-NEXT: ret
;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_size_127:
+; CHECK-ALIGNED-RV64-LABEL: bcmp_size_31:
; CHECK-ALIGNED-RV64: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 127
+; CHECK-ALIGNED-RV64-NEXT: li a2, 31
; CHECK-ALIGNED-RV64-NEXT: call bcmp
; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-NEXT: ret
;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_127:
+; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_31:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 127
+; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 31
; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_127:
+; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_31:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 127
+; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 31
; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_127:
+; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_31:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 127
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 31
; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_127:
+; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_31:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 127
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 31
; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_127:
+; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_31:
; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 127
+; CHECK-ALIGNED-RV32-V-NEXT: li a2, 31
; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-V-NEXT: ret
;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_127:
+; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_31:
; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 127
+; CHECK-ALIGNED-RV64-V-NEXT: li a2, 31
; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-V-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_31:
; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-UNALIGNED-RV32-NEXT: li a2, 127
-; CHECK-UNALIGNED-RV32-NEXT: call bcmp
-; CHECK-UNALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-NEXT: sw s0, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a3, 4(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a4, 8(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a5, 12(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a6, 0(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw a7, 4(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw t0, 8(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw t1, 12(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw t2, 16(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw t3, 20(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw t4, 24(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a0, 27(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw t5, 16(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw t6, 20(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw s0, 24(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw a1, 27(a1)
+; CHECK-UNALIGNED-RV32-NEXT: xor a2, a2, a6
+; CHECK-UNALIGNED-RV32-NEXT: xor a3, a3, a7
+; CHECK-UNALIGNED-RV32-NEXT: xor a4, a4, t0
+; CHECK-UNALIGNED-RV32-NEXT: xor a5, a5, t1
+; CHECK-UNALIGNED-RV32-NEXT: xor a6, t2, t5
+; CHECK-UNALIGNED-RV32-NEXT: xor a7, t3, t6
+; CHECK-UNALIGNED-RV32-NEXT: xor t0, t4, s0
+; CHECK-UNALIGNED-RV32-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV32-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV32-NEXT: or a4, a4, a5
+; CHECK-UNALIGNED-RV32-NEXT: or a1, a6, a7
+; CHECK-UNALIGNED-RV32-NEXT: or a0, t0, a0
+; CHECK-UNALIGNED-RV32-NEXT: or a2, a2, a4
+; CHECK-UNALIGNED-RV32-NEXT: or a0, a1, a0
+; CHECK-UNALIGNED-RV32-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV32-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, 16
; CHECK-UNALIGNED-RV32-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_31:
; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-UNALIGNED-RV64-NEXT: li a2, 127
-; CHECK-UNALIGNED-RV64-NEXT: call bcmp
-; CHECK-UNALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-NEXT: ld a2, 0(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld a3, 8(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld a4, 16(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld a0, 23(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld a5, 0(a1)
+; CHECK-UNALIGNED-RV64-NEXT: ld a6, 8(a1)
+; CHECK-UNALIGNED-RV64-NEXT: ld a7, 16(a1)
+; CHECK-UNALIGNED-RV64-NEXT: ld a1, 23(a1)
+; CHECK-UNALIGNED-RV64-NEXT: xor a2, a2, a5
+; CHECK-UNALIGNED-RV64-NEXT: xor a3, a3, a6
+; CHECK-UNALIGNED-RV64-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV64-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV64-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV64-NEXT: or a0, a4, a0
+; CHECK-UNALIGNED-RV64-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_31:
; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: li a2, 127
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: sw s0, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a3, 4(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a4, 8(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a5, 12(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a6, 0(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a7, 4(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t0, 8(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t1, 12(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t2, 16(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t3, 20(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t4, 24(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a0, 27(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t5, 16(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t6, 20(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw s0, 24(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a1, 27(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a2, a2, a6
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a3, a3, a7
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a4, a4, t0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a5, a5, t1
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a6, t2, t5
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a7, t3, t6
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor t0, t4, s0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a4, a4, a5
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a1, a6, a7
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, t0, a0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a2, a2, a4
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a1, a0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_31:
; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: li a2, 127
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: call bcmp
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a2, 0(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a3, 8(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a4, 16(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a0, 23(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a5, 0(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a6, 8(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a7, 16(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a1, 23(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a2, a2, a5
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a3, a3, a6
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, a4, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_31:
; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: li a2, 127
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
-;
-; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_127:
-; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: li a2, 127
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: call bcmp
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sw s0, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a3, 4(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a4, 8(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a5, 12(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a6, 0(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a7, 4(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t0, 8(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t1, 12(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t2, 16(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t3, 20(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t4, 24(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a0, 27(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t5, 16(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t6, 20(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw s0, 24(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a1, 27(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a2, a2, a6
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a3, a3, a7
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a4, a4, t0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a5, a5, t1
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a6, t2, t5
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a7, t3, t6
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor t0, t4, s0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a4, a4, a5
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a1, a6, a7
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, t0, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a2, a2, a4
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a1, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_31:
+; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a2, 0(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a3, 8(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a4, 16(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a0, 23(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a5, 0(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a6, 8(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a7, 16(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a1, 23(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a2, a2, a5
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a3, a3, a6
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, a4, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_31:
; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-V-NEXT: li a2, 127
-; CHECK-UNALIGNED-RV32-V-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; CHECK-UNALIGNED-RV32-V-NEXT: vsetivli zero, 31, e8, m2, ta, ma
; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v16, (a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v24, v8, v16
-; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v24
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v10, (a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v12, v8, v10
+; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v12
; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-V-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_31:
; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-V-NEXT: li a2, 127
-; CHECK-UNALIGNED-RV64-V-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; CHECK-UNALIGNED-RV64-V-NEXT: vsetivli zero, 31, e8, m2, ta, ma
; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v8, (a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v16, (a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v24, v8, v16
-; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v24
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v10, (a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v12, v8, v10
+; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v12
; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-V-NEXT: ret
entry:
- %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 127)
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 31)
ret i32 %bcmp
}
-define i32 @bcmp_size_128(ptr %s1, ptr %s2) nounwind {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_size_128:
+define i32 @bcmp_size_32(ptr %s1, ptr %s2) nounwind {
+; CHECK-ALIGNED-RV32-LABEL: bcmp_size_32:
; CHECK-ALIGNED-RV32: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 128
+; CHECK-ALIGNED-RV32-NEXT: li a2, 32
; CHECK-ALIGNED-RV32-NEXT: call bcmp
; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-NEXT: ret
;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_size_128:
+; CHECK-ALIGNED-RV64-LABEL: bcmp_size_32:
; CHECK-ALIGNED-RV64: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 128
+; CHECK-ALIGNED-RV64-NEXT: li a2, 32
; CHECK-ALIGNED-RV64-NEXT: call bcmp
; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-NEXT: ret
;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_128:
+; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_32:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 128
+; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 32
; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_128:
+; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_32:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 128
+; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 32
; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_128:
+; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_32:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 128
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 32
; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_128:
+; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_32:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 128
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 32
; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_128:
+; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_32:
; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 128
+; CHECK-ALIGNED-RV32-V-NEXT: li a2, 32
; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-V-NEXT: ret
;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_128:
+; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_32:
; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 128
+; CHECK-ALIGNED-RV64-V-NEXT: li a2, 32
; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-V-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_32:
; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-UNALIGNED-RV32-NEXT: li a2, 128
-; CHECK-UNALIGNED-RV32-NEXT: call bcmp
-; CHECK-UNALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-NEXT: sw s0, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a3, 4(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a4, 8(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a5, 12(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a6, 0(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw a7, 4(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw t0, 8(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw t1, 12(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw t2, 16(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw t3, 20(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw t4, 24(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a0, 28(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw t5, 16(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw t6, 20(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw s0, 24(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw a1, 28(a1)
+; CHECK-UNALIGNED-RV32-NEXT: xor a2, a2, a6
+; CHECK-UNALIGNED-RV32-NEXT: xor a3, a3, a7
+; CHECK-UNALIGNED-RV32-NEXT: xor a4, a4, t0
+; CHECK-UNALIGNED-RV32-NEXT: xor a5, a5, t1
+; CHECK-UNALIGNED-RV32-NEXT: xor a6, t2, t5
+; CHECK-UNALIGNED-RV32-NEXT: xor a7, t3, t6
+; CHECK-UNALIGNED-RV32-NEXT: xor t0, t4, s0
+; CHECK-UNALIGNED-RV32-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV32-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV32-NEXT: or a4, a4, a5
+; CHECK-UNALIGNED-RV32-NEXT: or a1, a6, a7
+; CHECK-UNALIGNED-RV32-NEXT: or a0, t0, a0
+; CHECK-UNALIGNED-RV32-NEXT: or a2, a2, a4
+; CHECK-UNALIGNED-RV32-NEXT: or a0, a1, a0
+; CHECK-UNALIGNED-RV32-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV32-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, 16
; CHECK-UNALIGNED-RV32-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_32:
; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-UNALIGNED-RV64-NEXT: li a2, 128
-; CHECK-UNALIGNED-RV64-NEXT: call bcmp
-; CHECK-UNALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-NEXT: ld a2, 0(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld a3, 8(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld a4, 16(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld a0, 24(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld a5, 0(a1)
+; CHECK-UNALIGNED-RV64-NEXT: ld a6, 8(a1)
+; CHECK-UNALIGNED-RV64-NEXT: ld a7, 16(a1)
+; CHECK-UNALIGNED-RV64-NEXT: ld a1, 24(a1)
+; CHECK-UNALIGNED-RV64-NEXT: xor a2, a2, a5
+; CHECK-UNALIGNED-RV64-NEXT: xor a3, a3, a6
+; CHECK-UNALIGNED-RV64-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV64-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV64-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV64-NEXT: or a0, a4, a0
+; CHECK-UNALIGNED-RV64-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_32:
; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: li a2, 128
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: sw s0, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a3, 4(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a4, 8(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a5, 12(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a6, 0(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a7, 4(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t0, 8(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t1, 12(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t2, 16(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t3, 20(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t4, 24(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a0, 28(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t5, 16(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw t6, 20(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw s0, 24(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a1, 28(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a2, a2, a6
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a3, a3, a7
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a4, a4, t0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a5, a5, t1
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a6, t2, t5
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a7, t3, t6
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor t0, t4, s0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a4, a4, a5
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a1, a6, a7
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, t0, a0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a2, a2, a4
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a1, a0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_32:
; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: li a2, 128
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: call bcmp
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a2, 0(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a3, 8(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a4, 16(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a0, 24(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a5, 0(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a6, 8(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a7, 16(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a1, 24(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a2, a2, a5
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a3, a3, a6
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, a4, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_32:
; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: li a2, 128
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sw s0, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a3, 4(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a4, 8(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a5, 12(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a6, 0(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a7, 4(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t0, 8(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t1, 12(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t2, 16(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t3, 20(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t4, 24(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a0, 28(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t5, 16(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw t6, 20(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw s0, 24(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a1, 28(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a2, a2, a6
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a3, a3, a7
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a4, a4, t0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a5, a5, t1
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a6, t2, t5
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a7, t3, t6
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor t0, t4, s0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a4, a4, a5
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a1, a6, a7
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, t0, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a2, a2, a4
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a1, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_128:
-; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: li a2, 128
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: call bcmp
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_32:
+; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a2, 0(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a3, 8(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a4, 16(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a0, 24(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a5, 0(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a6, 8(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a7, 16(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a1, 24(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a2, a2, a5
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a3, a3, a6
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, a4, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_32:
; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-V-NEXT: li a2, 128
-; CHECK-UNALIGNED-RV32-V-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; CHECK-UNALIGNED-RV32-V-NEXT: li a2, 32
+; CHECK-UNALIGNED-RV32-V-NEXT: vsetvli zero, a2, e8, m2, ta, ma
; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v16, (a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v24, v8, v16
-; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v24
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v10, (a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v12, v8, v10
+; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v12
; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-V-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_32:
; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-V-NEXT: li a2, 128
-; CHECK-UNALIGNED-RV64-V-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; CHECK-UNALIGNED-RV64-V-NEXT: li a2, 32
+; CHECK-UNALIGNED-RV64-V-NEXT: vsetvli zero, a2, e8, m2, ta, ma
; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v8, (a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v16, (a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v24, v8, v16
-; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v24
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v10, (a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v12, v8, v10
+; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v12
; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-V-NEXT: ret
entry:
- %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 128)
- ret i32 %bcmp
-}
-
-define i32 @bcmp_size_runtime(ptr %s1, ptr %s2, iXLen %len) nounwind {
-; CHECK-RV32-LABEL: bcmp_size_runtime:
-; CHECK-RV32: # %bb.0: # %entry
-; CHECK-RV32-NEXT: addi sp, sp, -16
-; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-RV32-NEXT: call bcmp
-; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-RV32-NEXT: addi sp, sp, 16
-; CHECK-RV32-NEXT: ret
-;
-; CHECK-RV64-LABEL: bcmp_size_runtime:
-; CHECK-RV64: # %bb.0: # %entry
-; CHECK-RV64-NEXT: addi sp, sp, -16
-; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-RV64-NEXT: call bcmp
-; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-RV64-NEXT: addi sp, sp, 16
-; CHECK-RV64-NEXT: ret
-entry:
- %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen %len)
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 32)
ret i32 %bcmp
}
-define i1 @bcmp_eq_zero(ptr %s1, ptr %s2) nounwind {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_eq_zero:
+define i32 @bcmp_size_63(ptr %s1, ptr %s2) nounwind {
+; CHECK-ALIGNED-RV32-LABEL: bcmp_size_63:
; CHECK-ALIGNED-RV32: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 16
+; CHECK-ALIGNED-RV32-NEXT: li a2, 63
; CHECK-ALIGNED-RV32-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-NEXT: seqz a0, a0
; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-NEXT: ret
;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_eq_zero:
+; CHECK-ALIGNED-RV64-LABEL: bcmp_size_63:
; CHECK-ALIGNED-RV64: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 16
+; CHECK-ALIGNED-RV64-NEXT: li a2, 63
; CHECK-ALIGNED-RV64-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-NEXT: seqz a0, a0
; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-NEXT: ret
;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_eq_zero:
+; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_63:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 63
; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: seqz a0, a0
; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_eq_zero:
+; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_63:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 63
; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: seqz a0, a0
; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_eq_zero:
+; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_63:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 63
; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: seqz a0, a0
; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_eq_zero:
+; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_63:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 63
; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: seqz a0, a0
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_eq_zero:
+; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_63:
; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 16
+; CHECK-ALIGNED-RV32-V-NEXT: li a2, 63
; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-V-NEXT: seqz a0, a0
; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-V-NEXT: ret
;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_eq_zero:
+; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_63:
; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 16
+; CHECK-ALIGNED-RV64-V-NEXT: li a2, 63
; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-V-NEXT: seqz a0, a0
; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-V-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-LABEL: bcmp_eq_zero:
+; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_63:
; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a3, 4(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a4, 8(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a0, 12(a0)
-; CHECK-UNALIGNED-RV32-NEXT: lw a5, 0(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lw a6, 4(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lw a7, 8(a1)
-; CHECK-UNALIGNED-RV32-NEXT: lw a1, 12(a1)
-; CHECK-UNALIGNED-RV32-NEXT: xor a2, a2, a5
-; CHECK-UNALIGNED-RV32-NEXT: xor a3, a3, a6
-; CHECK-UNALIGNED-RV32-NEXT: xor a4, a4, a7
-; CHECK-UNALIGNED-RV32-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV32-NEXT: or a0, a4, a0
-; CHECK-UNALIGNED-RV32-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV32-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-NEXT: li a2, 63
+; CHECK-UNALIGNED-RV32-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, 16
; CHECK-UNALIGNED-RV32-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-LABEL: bcmp_eq_zero:
+; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_63:
; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-NEXT: sd s0, 8(sp) # 8-byte Folded Spill
; CHECK-UNALIGNED-RV64-NEXT: ld a2, 0(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld a0, 8(a0)
-; CHECK-UNALIGNED-RV64-NEXT: ld a3, 0(a1)
-; CHECK-UNALIGNED-RV64-NEXT: ld a1, 8(a1)
-; CHECK-UNALIGNED-RV64-NEXT: xor a2, a2, a3
+; CHECK-UNALIGNED-RV64-NEXT: ld a3, 8(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld a4, 16(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld a5, 24(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld a6, 0(a1)
+; CHECK-UNALIGNED-RV64-NEXT: ld a7, 8(a1)
+; CHECK-UNALIGNED-RV64-NEXT: ld t0, 16(a1)
+; CHECK-UNALIGNED-RV64-NEXT: ld t1, 24(a1)
+; CHECK-UNALIGNED-RV64-NEXT: ld t2, 32(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld t3, 40(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld t4, 48(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld a0, 55(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld t5, 32(a1)
+; CHECK-UNALIGNED-RV64-NEXT: ld t6, 40(a1)
+; CHECK-UNALIGNED-RV64-NEXT: ld s0, 48(a1)
+; CHECK-UNALIGNED-RV64-NEXT: ld a1, 55(a1)
+; CHECK-UNALIGNED-RV64-NEXT: xor a2, a2, a6
+; CHECK-UNALIGNED-RV64-NEXT: xor a3, a3, a7
+; CHECK-UNALIGNED-RV64-NEXT: xor a4, a4, t0
+; CHECK-UNALIGNED-RV64-NEXT: xor a5, a5, t1
+; CHECK-UNALIGNED-RV64-NEXT: xor a6, t2, t5
+; CHECK-UNALIGNED-RV64-NEXT: xor a7, t3, t6
+; CHECK-UNALIGNED-RV64-NEXT: xor t0, t4, s0
; CHECK-UNALIGNED-RV64-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV64-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV64-NEXT: or a4, a4, a5
+; CHECK-UNALIGNED-RV64-NEXT: or a1, a6, a7
+; CHECK-UNALIGNED-RV64-NEXT: or a0, t0, a0
+; CHECK-UNALIGNED-RV64-NEXT: or a2, a2, a4
+; CHECK-UNALIGNED-RV64-NEXT: or a0, a1, a0
; CHECK-UNALIGNED-RV64-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV64-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV64-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV64-NEXT: ld s0, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, 16
; CHECK-UNALIGNED-RV64-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_eq_zero:
+; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_63:
; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a3, 4(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a4, 8(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a0, 12(a0)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a5, 0(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a6, 4(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a7, 8(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a1, 12(a1)
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a2, a2, a5
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a3, a3, a6
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a4, a4, a7
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a4, a0
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: li a2, 63
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_eq_zero:
+; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_63:
; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sd s0, 8(sp) # 8-byte Folded Spill
; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a2, 0(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a0, 8(a0)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a3, 0(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a1, 8(a1)
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a2, a2, a3
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a3, 8(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a4, 16(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a5, 24(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a6, 0(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a7, 8(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t0, 16(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t1, 24(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t2, 32(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t3, 40(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t4, 48(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a0, 55(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t5, 32(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t6, 40(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld s0, 48(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a1, 55(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a2, a2, a6
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a3, a3, a7
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a4, a4, t0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a5, a5, t1
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a6, t2, t5
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a7, t3, t6
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor t0, t4, s0
; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a4, a4, a5
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a1, a6, a7
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, t0, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a2, a2, a4
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, a1, a0
; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld s0, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_eq_zero:
+; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_63:
; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a2, 0(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a3, 4(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a4, 8(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a0, 12(a0)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a5, 0(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a6, 4(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a7, 8(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a1, 12(a1)
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a2, a2, a5
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a3, a3, a6
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a4, a4, a7
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a2, a2, a3
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a4, a0
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: li a2, 63
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_eq_zero:
+; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_63:
; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sd s0, 8(sp) # 8-byte Folded Spill
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a2, 0(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a0, 8(a0)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a3, 0(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a1, 8(a1)
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a2, a2, a3
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a3, 8(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a4, 16(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a5, 24(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a6, 0(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a7, 8(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t0, 16(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t1, 24(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t2, 32(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t3, 40(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t4, 48(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a0, 55(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t5, 32(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t6, 40(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld s0, 48(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a1, 55(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a2, a2, a6
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a3, a3, a7
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a4, a4, t0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a5, a5, t1
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a6, t2, t5
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a7, t3, t6
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor t0, t4, s0
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a4, a4, a5
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a1, a6, a7
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, t0, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a2, a2, a4
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, a1, a0
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, a2, a0
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld s0, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
;
-; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_eq_zero:
+; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_63:
; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-V-NEXT: vsetivli zero, 16, e8, m1, ta, ma
+; CHECK-UNALIGNED-RV32-V-NEXT: li a2, 63
+; CHECK-UNALIGNED-RV32-V-NEXT: vsetvli zero, a2, e8, m4, ta, ma
; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
-; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v9, (a1)
-; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v8, v8, v9
-; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v8
-; CHECK-UNALIGNED-RV32-V-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v12, (a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v16, v8, v12
+; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v16
+; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV32-V-NEXT: ret
;
-; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_eq_zero:
+; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_63:
; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
-; CHECK-UNALIGNED-RV64-V-NEXT: vsetivli zero, 16, e8, m1, ta, ma
+; CHECK-UNALIGNED-RV64-V-NEXT: li a2, 63
+; CHECK-UNALIGNED-RV64-V-NEXT: vsetvli zero, a2, e8, m4, ta, ma
; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v8, (a0)
-; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v9, (a1)
-; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v8, v8, v9
-; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v8
-; CHECK-UNALIGNED-RV64-V-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v12, (a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v16, v8, v12
+; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v16
+; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
; CHECK-UNALIGNED-RV64-V-NEXT: ret
entry:
- %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 16)
- %ret = icmp eq i32 %bcmp, 0
- ret i1 %ret
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 63)
+ ret i32 %bcmp
}
-define i1 @bcmp_lt_zero(ptr %s1, ptr %s2) nounwind {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_lt_zero:
+define i32 @bcmp_size_64(ptr %s1, ptr %s2) nounwind {
+; CHECK-ALIGNED-RV32-LABEL: bcmp_size_64:
; CHECK-ALIGNED-RV32: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 4
+; CHECK-ALIGNED-RV32-NEXT: li a2, 64
; CHECK-ALIGNED-RV32-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-NEXT: srli a0, a0, 31
; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-NEXT: ret
;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_lt_zero:
+; CHECK-ALIGNED-RV64-LABEL: bcmp_size_64:
; CHECK-ALIGNED-RV64: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 4
+; CHECK-ALIGNED-RV64-NEXT: li a2, 64
; CHECK-ALIGNED-RV64-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-NEXT: srli a0, a0, 63
; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-NEXT: ret
;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_lt_zero:
+; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_64:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 4
+; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 64
; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: srli a0, a0, 31
; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_lt_zero:
+; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_64:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 4
+; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 64
; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: srli a0, a0, 63
; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_lt_zero:
+; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_64:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 4
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 64
; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: srli a0, a0, 31
; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_lt_zero:
+; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_64:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 4
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 64
; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: srli a0, a0, 63
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_lt_zero:
+; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_64:
; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 4
+; CHECK-ALIGNED-RV32-V-NEXT: li a2, 64
; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-V-NEXT: srli a0, a0, 31
; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-V-NEXT: ret
;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_lt_zero:
+; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_64:
; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 4
+; CHECK-ALIGNED-RV64-V-NEXT: li a2, 64
; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-V-NEXT: srli a0, a0, 63
; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-V-NEXT: ret
;
-; CHECK-UNALIGNED-LABEL: bcmp_lt_zero:
-; CHECK-UNALIGNED: # %bb.0: # %entry
-; CHECK-UNALIGNED-NEXT: li a0, 0
-; CHECK-UNALIGNED-NEXT: ret
+; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-NEXT: li a2, 64
+; CHECK-UNALIGNED-RV32-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-NEXT: sd s0, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-NEXT: ld a2, 0(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld a3, 8(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld a4, 16(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld a5, 24(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld a6, 0(a1)
+; CHECK-UNALIGNED-RV64-NEXT: ld a7, 8(a1)
+; CHECK-UNALIGNED-RV64-NEXT: ld t0, 16(a1)
+; CHECK-UNALIGNED-RV64-NEXT: ld t1, 24(a1)
+; CHECK-UNALIGNED-RV64-NEXT: ld t2, 32(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld t3, 40(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld t4, 48(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld a0, 56(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld t5, 32(a1)
+; CHECK-UNALIGNED-RV64-NEXT: ld t6, 40(a1)
+; CHECK-UNALIGNED-RV64-NEXT: ld s0, 48(a1)
+; CHECK-UNALIGNED-RV64-NEXT: ld a1, 56(a1)
+; CHECK-UNALIGNED-RV64-NEXT: xor a2, a2, a6
+; CHECK-UNALIGNED-RV64-NEXT: xor a3, a3, a7
+; CHECK-UNALIGNED-RV64-NEXT: xor a4, a4, t0
+; CHECK-UNALIGNED-RV64-NEXT: xor a5, a5, t1
+; CHECK-UNALIGNED-RV64-NEXT: xor a6, t2, t5
+; CHECK-UNALIGNED-RV64-NEXT: xor a7, t3, t6
+; CHECK-UNALIGNED-RV64-NEXT: xor t0, t4, s0
+; CHECK-UNALIGNED-RV64-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV64-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV64-NEXT: or a4, a4, a5
+; CHECK-UNALIGNED-RV64-NEXT: or a1, a6, a7
+; CHECK-UNALIGNED-RV64-NEXT: or a0, t0, a0
+; CHECK-UNALIGNED-RV64-NEXT: or a2, a2, a4
+; CHECK-UNALIGNED-RV64-NEXT: or a0, a1, a0
+; CHECK-UNALIGNED-RV64-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV64-NEXT: ld s0, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: li a2, 64
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sd s0, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a2, 0(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a3, 8(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a4, 16(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a5, 24(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a6, 0(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a7, 8(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t0, 16(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t1, 24(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t2, 32(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t3, 40(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t4, 48(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a0, 56(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t5, 32(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld t6, 40(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld s0, 48(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a1, 56(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a2, a2, a6
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a3, a3, a7
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a4, a4, t0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a5, a5, t1
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a6, t2, t5
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a7, t3, t6
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor t0, t4, s0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a4, a4, a5
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a1, a6, a7
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, t0, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a2, a2, a4
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, a1, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld s0, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: li a2, 64
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sd s0, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a2, 0(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a3, 8(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a4, 16(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a5, 24(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a6, 0(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a7, 8(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t0, 16(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t1, 24(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t2, 32(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t3, 40(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t4, 48(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a0, 56(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t5, 32(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld t6, 40(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld s0, 48(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a1, 56(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a2, a2, a6
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a3, a3, a7
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a4, a4, t0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a5, a5, t1
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a6, t2, t5
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a7, t3, t6
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor t0, t4, s0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a4, a4, a5
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a1, a6, a7
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, t0, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a2, a2, a4
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, a1, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld s0, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-V-NEXT: li a2, 64
+; CHECK-UNALIGNED-RV32-V-NEXT: vsetvli zero, a2, e8, m4, ta, ma
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v12, (a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v16, v8, v12
+; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v16
+; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_64:
+; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-V-NEXT: li a2, 64
+; CHECK-UNALIGNED-RV64-V-NEXT: vsetvli zero, a2, e8, m4, ta, ma
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v12, (a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v16, v8, v12
+; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v16
+; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: ret
entry:
- %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 4)
- %ret = icmp slt i32 %bcmp, 0
- ret i1 %ret
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 64)
+ ret i32 %bcmp
}
-define i1 @bcmp_gt_zero(ptr %s1, ptr %s2) nounwind {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_gt_zero:
+define i32 @bcmp_size_127(ptr %s1, ptr %s2) nounwind {
+; CHECK-ALIGNED-RV32-LABEL: bcmp_size_127:
; CHECK-ALIGNED-RV32: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 4
+; CHECK-ALIGNED-RV32-NEXT: li a2, 127
; CHECK-ALIGNED-RV32-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-NEXT: sgtz a0, a0
; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-NEXT: ret
;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_gt_zero:
+; CHECK-ALIGNED-RV64-LABEL: bcmp_size_127:
; CHECK-ALIGNED-RV64: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 4
+; CHECK-ALIGNED-RV64-NEXT: li a2, 127
; CHECK-ALIGNED-RV64-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-NEXT: sgtz a0, a0
; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-NEXT: ret
;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_gt_zero:
+; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_127:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 4
+; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 127
; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sgtz a0, a0
; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_gt_zero:
+; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_127:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 4
+; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 127
; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sgtz a0, a0
; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_gt_zero:
+; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_127:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 4
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 127
; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sgtz a0, a0
; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_gt_zero:
+; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_127:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 4
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 127
; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sgtz a0, a0
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_gt_zero:
+; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_127:
; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 4
+; CHECK-ALIGNED-RV32-V-NEXT: li a2, 127
; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-V-NEXT: sgtz a0, a0
; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-V-NEXT: ret
;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_gt_zero:
+; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_127:
; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 4
+; CHECK-ALIGNED-RV64-V-NEXT: li a2, 127
; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-V-NEXT: sgtz a0, a0
; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-V-NEXT: ret
;
-; CHECK-UNALIGNED-LABEL: bcmp_gt_zero:
-; CHECK-UNALIGNED: # %bb.0: # %entry
-; CHECK-UNALIGNED-NEXT: lw a0, 0(a0)
-; CHECK-UNALIGNED-NEXT: lw a1, 0(a1)
-; CHECK-UNALIGNED-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-NEXT: snez a0, a0
-; CHECK-UNALIGNED-NEXT: ret
+; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-NEXT: li a2, 127
+; CHECK-UNALIGNED-RV32-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-NEXT: li a2, 127
+; CHECK-UNALIGNED-RV64-NEXT: call bcmp
+; CHECK-UNALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: li a2, 127
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: li a2, 127
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: li a2, 127
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: li a2, 127
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-V-NEXT: li a2, 127
+; CHECK-UNALIGNED-RV32-V-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v16, (a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v24, v8, v16
+; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v24
+; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_127:
+; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-V-NEXT: li a2, 127
+; CHECK-UNALIGNED-RV64-V-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v16, (a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v24, v8, v16
+; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v24
+; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: ret
entry:
- %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 4)
- %ret = icmp sgt i32 %bcmp, 0
- ret i1 %ret
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 127)
+ ret i32 %bcmp
}
-define i1 @bcmp_le_zero(ptr %s1, ptr %s2) nounwind {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_le_zero:
+define i32 @bcmp_size_128(ptr %s1, ptr %s2) nounwind {
+; CHECK-ALIGNED-RV32-LABEL: bcmp_size_128:
; CHECK-ALIGNED-RV32: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 4
+; CHECK-ALIGNED-RV32-NEXT: li a2, 128
; CHECK-ALIGNED-RV32-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-NEXT: slti a0, a0, 1
; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-NEXT: ret
;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_le_zero:
+; CHECK-ALIGNED-RV64-LABEL: bcmp_size_128:
; CHECK-ALIGNED-RV64: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 4
+; CHECK-ALIGNED-RV64-NEXT: li a2, 128
; CHECK-ALIGNED-RV64-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-NEXT: slti a0, a0, 1
; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-NEXT: ret
;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_le_zero:
+; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_size_128:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 4
+; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 128
; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: slti a0, a0, 1
; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_le_zero:
+; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_size_128:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 4
+; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 128
; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: slti a0, a0, 1
; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_le_zero:
+; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_size_128:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 4
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 128
; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: slti a0, a0, 1
; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_le_zero:
+; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_size_128:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 4
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 128
; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: slti a0, a0, 1
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_le_zero:
+; CHECK-ALIGNED-RV32-V-LABEL: bcmp_size_128:
; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 4
+; CHECK-ALIGNED-RV32-V-NEXT: li a2, 128
; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-V-NEXT: slti a0, a0, 1
; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-V-NEXT: ret
;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_le_zero:
+; CHECK-ALIGNED-RV64-V-LABEL: bcmp_size_128:
; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 4
+; CHECK-ALIGNED-RV64-V-NEXT: li a2, 128
; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-V-NEXT: slti a0, a0, 1
; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-V-NEXT: ret
;
-; CHECK-UNALIGNED-LABEL: bcmp_le_zero:
-; CHECK-UNALIGNED: # %bb.0: # %entry
-; CHECK-UNALIGNED-NEXT: lw a0, 0(a0)
-; CHECK-UNALIGNED-NEXT: lw a1, 0(a1)
-; CHECK-UNALIGNED-NEXT: xor a0, a0, a1
-; CHECK-UNALIGNED-NEXT: snez a0, a0
-; CHECK-UNALIGNED-NEXT: slti a0, a0, 1
-; CHECK-UNALIGNED-NEXT: ret
+; CHECK-UNALIGNED-RV32-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-NEXT: li a2, 128
+; CHECK-UNALIGNED-RV32-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-NEXT: li a2, 128
+; CHECK-UNALIGNED-RV64-NEXT: call bcmp
+; CHECK-UNALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: li a2, 128
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: li a2, 128
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: li a2, 128
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: li a2, 128
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: call bcmp
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-V-NEXT: li a2, 128
+; CHECK-UNALIGNED-RV32-V-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v16, (a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v24, v8, v16
+; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v24
+; CHECK-UNALIGNED-RV32-V-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_size_128:
+; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-V-NEXT: li a2, 128
+; CHECK-UNALIGNED-RV64-V-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v16, (a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v24, v8, v16
+; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v24
+; CHECK-UNALIGNED-RV64-V-NEXT: snez a0, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 128)
+ ret i32 %bcmp
+}
+
+define i32 @bcmp_size_runtime(ptr %s1, ptr %s2, iXLen %len) nounwind {
+; CHECK-RV32-LABEL: bcmp_size_runtime:
+; CHECK-RV32: # %bb.0: # %entry
+; CHECK-RV32-NEXT: addi sp, sp, -16
+; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; CHECK-RV32-NEXT: call bcmp
+; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; CHECK-RV32-NEXT: addi sp, sp, 16
+; CHECK-RV32-NEXT: ret
+;
+; CHECK-RV64-LABEL: bcmp_size_runtime:
+; CHECK-RV64: # %bb.0: # %entry
+; CHECK-RV64-NEXT: addi sp, sp, -16
+; CHECK-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-RV64-NEXT: call bcmp
+; CHECK-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-RV64-NEXT: addi sp, sp, 16
+; CHECK-RV64-NEXT: ret
entry:
- %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 4)
- %ret = icmp slt i32 %bcmp, 1
- ret i1 %ret
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen %len)
+ ret i32 %bcmp
}
-define i1 @bcmp_ge_zero(ptr %s1, ptr %s2) nounwind {
-; CHECK-ALIGNED-RV32-LABEL: bcmp_ge_zero:
+define i1 @bcmp_eq_zero(ptr %s1, ptr %s2) nounwind {
+; CHECK-ALIGNED-RV32-LABEL: bcmp_eq_zero:
; CHECK-ALIGNED-RV32: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT: li a2, 4
+; CHECK-ALIGNED-RV32-NEXT: li a2, 16
; CHECK-ALIGNED-RV32-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-NEXT: srli a0, a0, 31
-; CHECK-ALIGNED-RV32-NEXT: xori a0, a0, 1
+; CHECK-ALIGNED-RV32-NEXT: seqz a0, a0
; CHECK-ALIGNED-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-NEXT: ret
;
-; CHECK-ALIGNED-RV64-LABEL: bcmp_ge_zero:
+; CHECK-ALIGNED-RV64-LABEL: bcmp_eq_zero:
; CHECK-ALIGNED-RV64: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT: li a2, 4
+; CHECK-ALIGNED-RV64-NEXT: li a2, 16
; CHECK-ALIGNED-RV64-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-NEXT: srli a0, a0, 63
-; CHECK-ALIGNED-RV64-NEXT: xori a0, a0, 1
+; CHECK-ALIGNED-RV64-NEXT: seqz a0, a0
; CHECK-ALIGNED-RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-NEXT: ret
;
-; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_ge_zero:
+; CHECK-ALIGNED-RV32-ZBB-LABEL: bcmp_eq_zero:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 4
+; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 16
; CHECK-ALIGNED-RV32-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: srli a0, a0, 31
-; CHECK-ALIGNED-RV32-ZBB-NEXT: xori a0, a0, 1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: seqz a0, a0
; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
-; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_ge_zero:
+; CHECK-ALIGNED-RV64-ZBB-LABEL: bcmp_eq_zero:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 4
+; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 16
; CHECK-ALIGNED-RV64-ZBB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: srli a0, a0, 63
-; CHECK-ALIGNED-RV64-ZBB-NEXT: xori a0, a0, 1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: seqz a0, a0
; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
-; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_ge_zero:
+; CHECK-ALIGNED-RV32-ZBKB-LABEL: bcmp_eq_zero:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 4
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 16
; CHECK-ALIGNED-RV32-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: srli a0, a0, 31
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: xori a0, a0, 1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: seqz a0, a0
; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
-; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_ge_zero:
+; CHECK-ALIGNED-RV64-ZBKB-LABEL: bcmp_eq_zero:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 4
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: srli a0, a0, 63
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: xori a0, a0, 1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: seqz a0, a0
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
-; CHECK-ALIGNED-RV32-V-LABEL: bcmp_ge_zero:
+; CHECK-ALIGNED-RV32-V-LABEL: bcmp_eq_zero:
; CHECK-ALIGNED-RV32-V: # %bb.0: # %entry
; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV32-V-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-V-NEXT: li a2, 4
+; CHECK-ALIGNED-RV32-V-NEXT: li a2, 16
; CHECK-ALIGNED-RV32-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV32-V-NEXT: srli a0, a0, 31
-; CHECK-ALIGNED-RV32-V-NEXT: xori a0, a0, 1
+; CHECK-ALIGNED-RV32-V-NEXT: seqz a0, a0
; CHECK-ALIGNED-RV32-V-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-ALIGNED-RV32-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV32-V-NEXT: ret
;
-; CHECK-ALIGNED-RV64-V-LABEL: bcmp_ge_zero:
+; CHECK-ALIGNED-RV64-V-LABEL: bcmp_eq_zero:
; CHECK-ALIGNED-RV64-V: # %bb.0: # %entry
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, -16
; CHECK-ALIGNED-RV64-V-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-V-NEXT: li a2, 4
+; CHECK-ALIGNED-RV64-V-NEXT: li a2, 16
; CHECK-ALIGNED-RV64-V-NEXT: call bcmp
-; CHECK-ALIGNED-RV64-V-NEXT: srli a0, a0, 63
-; CHECK-ALIGNED-RV64-V-NEXT: xori a0, a0, 1
+; CHECK-ALIGNED-RV64-V-NEXT: seqz a0, a0
; CHECK-ALIGNED-RV64-V-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; CHECK-ALIGNED-RV64-V-NEXT: addi sp, sp, 16
; CHECK-ALIGNED-RV64-V-NEXT: ret
;
-; CHECK-UNALIGNED-LABEL: bcmp_ge_zero:
+; CHECK-UNALIGNED-RV32-LABEL: bcmp_eq_zero:
+; CHECK-UNALIGNED-RV32: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a3, 4(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a4, 8(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a0, 12(a0)
+; CHECK-UNALIGNED-RV32-NEXT: lw a5, 0(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw a6, 4(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw a7, 8(a1)
+; CHECK-UNALIGNED-RV32-NEXT: lw a1, 12(a1)
+; CHECK-UNALIGNED-RV32-NEXT: xor a2, a2, a5
+; CHECK-UNALIGNED-RV32-NEXT: xor a3, a3, a6
+; CHECK-UNALIGNED-RV32-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV32-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV32-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV32-NEXT: or a0, a4, a0
+; CHECK-UNALIGNED-RV32-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV32-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-LABEL: bcmp_eq_zero:
+; CHECK-UNALIGNED-RV64: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-NEXT: ld a2, 0(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld a0, 8(a0)
+; CHECK-UNALIGNED-RV64-NEXT: ld a3, 0(a1)
+; CHECK-UNALIGNED-RV64-NEXT: ld a1, 8(a1)
+; CHECK-UNALIGNED-RV64-NEXT: xor a2, a2, a3
+; CHECK-UNALIGNED-RV64-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV64-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV64-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-ZBB-LABEL: bcmp_eq_zero:
+; CHECK-UNALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a3, 4(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a4, 8(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a0, 12(a0)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a5, 0(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a6, 4(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a7, 8(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: lw a1, 12(a1)
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a2, a2, a5
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a3, a3, a6
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a4, a0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBB-LABEL: bcmp_eq_zero:
+; CHECK-UNALIGNED-RV64-ZBB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a2, 0(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a0, 8(a0)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a3, 0(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ld a1, 8(a1)
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a2, a2, a3
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-ZBKB-LABEL: bcmp_eq_zero:
+; CHECK-UNALIGNED-RV32-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a2, 0(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a3, 4(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a4, 8(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a0, 12(a0)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a5, 0(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a6, 4(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a7, 8(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: lw a1, 12(a1)
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a2, a2, a5
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a3, a3, a6
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a4, a4, a7
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a2, a2, a3
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a4, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-ZBKB-LABEL: bcmp_eq_zero:
+; CHECK-UNALIGNED-RV64-ZBKB: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a2, 0(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a0, 8(a0)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a3, 0(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ld a1, 8(a1)
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a2, a2, a3
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: or a0, a2, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
+;
+; CHECK-UNALIGNED-RV32-V-LABEL: bcmp_eq_zero:
+; CHECK-UNALIGNED-RV32-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV32-V-NEXT: vsetivli zero, 16, e8, m1, ta, ma
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV32-V-NEXT: vle8.v v9, (a1)
+; CHECK-UNALIGNED-RV32-V-NEXT: vmsne.vv v8, v8, v9
+; CHECK-UNALIGNED-RV32-V-NEXT: vcpop.m a0, v8
+; CHECK-UNALIGNED-RV32-V-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV32-V-NEXT: ret
+;
+; CHECK-UNALIGNED-RV64-V-LABEL: bcmp_eq_zero:
+; CHECK-UNALIGNED-RV64-V: # %bb.0: # %entry
+; CHECK-UNALIGNED-RV64-V-NEXT: vsetivli zero, 16, e8, m1, ta, ma
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v8, (a0)
+; CHECK-UNALIGNED-RV64-V-NEXT: vle8.v v9, (a1)
+; CHECK-UNALIGNED-RV64-V-NEXT: vmsne.vv v8, v8, v9
+; CHECK-UNALIGNED-RV64-V-NEXT: vcpop.m a0, v8
+; CHECK-UNALIGNED-RV64-V-NEXT: seqz a0, a0
+; CHECK-UNALIGNED-RV64-V-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 16)
+ %ret = icmp eq i32 %bcmp, 0
+ ret i1 %ret
+}
+
+define i1 @bcmp_lt_zero(ptr %s1, ptr %s2) nounwind {
+; CHECK-LABEL: bcmp_lt_zero:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: li a0, 0
+; CHECK-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 4)
+ %ret = icmp slt i32 %bcmp, 0
+ ret i1 %ret
+}
+
+define i1 @bcmp_gt_zero(ptr %s1, ptr %s2) nounwind {
+; CHECK-ALIGNED-LABEL: bcmp_gt_zero:
+; CHECK-ALIGNED: # %bb.0: # %entry
+; CHECK-ALIGNED-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-NEXT: lbu a3, 1(a0)
+; CHECK-ALIGNED-NEXT: lbu a4, 2(a0)
+; CHECK-ALIGNED-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-NEXT: lbu a5, 0(a1)
+; CHECK-ALIGNED-NEXT: lbu a6, 1(a1)
+; CHECK-ALIGNED-NEXT: lbu a7, 2(a1)
+; CHECK-ALIGNED-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-NEXT: xor a2, a2, a5
+; CHECK-ALIGNED-NEXT: xor a3, a3, a6
+; CHECK-ALIGNED-NEXT: xor a4, a4, a7
+; CHECK-ALIGNED-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-NEXT: or a0, a4, a0
+; CHECK-ALIGNED-NEXT: or a0, a2, a0
+; CHECK-ALIGNED-NEXT: snez a0, a0
+; CHECK-ALIGNED-NEXT: ret
+;
+; CHECK-UNALIGNED-LABEL: bcmp_gt_zero:
+; CHECK-UNALIGNED: # %bb.0: # %entry
+; CHECK-UNALIGNED-NEXT: lw a0, 0(a0)
+; CHECK-UNALIGNED-NEXT: lw a1, 0(a1)
+; CHECK-UNALIGNED-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-NEXT: snez a0, a0
+; CHECK-UNALIGNED-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 4)
+ %ret = icmp sgt i32 %bcmp, 0
+ ret i1 %ret
+}
+
+define i1 @bcmp_le_zero(ptr %s1, ptr %s2) nounwind {
+; CHECK-ALIGNED-LABEL: bcmp_le_zero:
+; CHECK-ALIGNED: # %bb.0: # %entry
+; CHECK-ALIGNED-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-NEXT: lbu a3, 1(a0)
+; CHECK-ALIGNED-NEXT: lbu a4, 2(a0)
+; CHECK-ALIGNED-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-NEXT: lbu a5, 0(a1)
+; CHECK-ALIGNED-NEXT: lbu a6, 1(a1)
+; CHECK-ALIGNED-NEXT: lbu a7, 2(a1)
+; CHECK-ALIGNED-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-NEXT: xor a2, a2, a5
+; CHECK-ALIGNED-NEXT: xor a3, a3, a6
+; CHECK-ALIGNED-NEXT: xor a4, a4, a7
+; CHECK-ALIGNED-NEXT: xor a0, a0, a1
+; CHECK-ALIGNED-NEXT: or a2, a2, a3
+; CHECK-ALIGNED-NEXT: or a0, a4, a0
+; CHECK-ALIGNED-NEXT: or a0, a2, a0
+; CHECK-ALIGNED-NEXT: snez a0, a0
+; CHECK-ALIGNED-NEXT: slti a0, a0, 1
+; CHECK-ALIGNED-NEXT: ret
+;
+; CHECK-UNALIGNED-LABEL: bcmp_le_zero:
; CHECK-UNALIGNED: # %bb.0: # %entry
-; CHECK-UNALIGNED-NEXT: li a0, 1
+; CHECK-UNALIGNED-NEXT: lw a0, 0(a0)
+; CHECK-UNALIGNED-NEXT: lw a1, 0(a1)
+; CHECK-UNALIGNED-NEXT: xor a0, a0, a1
+; CHECK-UNALIGNED-NEXT: snez a0, a0
+; CHECK-UNALIGNED-NEXT: slti a0, a0, 1
; CHECK-UNALIGNED-NEXT: ret
+entry:
+ %bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 4)
+ %ret = icmp slt i32 %bcmp, 1
+ ret i1 %ret
+}
+
+define i1 @bcmp_ge_zero(ptr %s1, ptr %s2) nounwind {
+; CHECK-LABEL: bcmp_ge_zero:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: li a0, 1
+; CHECK-NEXT: ret
entry:
%bcmp = call signext i32 @bcmp(ptr %s1, ptr %s2, iXLen 4)
%ret = icmp sgt i32 %bcmp, -1
@@ -3635,42 +3128,30 @@ define i32 @memcmp_size_1(ptr %s1, ptr %s2) nounwind {
;
; CHECK-ALIGNED-RV32-ZBB-LABEL: memcmp_size_1:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 1
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a0, 0(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a1, 0(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBB-LABEL: memcmp_size_1:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 1
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a0, 0(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a1, 0(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV32-ZBKB-LABEL: memcmp_size_1:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 1
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a0, 0(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a1, 0(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBKB-LABEL: memcmp_size_1:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 1
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a0, 0(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a1, 0(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV32-V-LABEL: memcmp_size_1:
@@ -3787,43 +3268,63 @@ define i32 @memcmp_size_2(ptr %s1, ptr %s2) nounwind {
; CHECK-ALIGNED-RV64-NEXT: ret
;
; CHECK-ALIGNED-RV32-ZBB-LABEL: memcmp_size_2:
-; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 2
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: beqz a2, .LBB25_2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.1: # %endblock
+; CHECK-ALIGNED-RV32-ZBB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
+; CHECK-ALIGNED-RV32-ZBB-NEXT: .LBB25_2: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a0, 1(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a1, 1(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBB-LABEL: memcmp_size_2:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 2
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: beqz a2, .LBB25_2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.1: # %endblock
+; CHECK-ALIGNED-RV64-ZBB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
+; CHECK-ALIGNED-RV64-ZBB-NEXT: .LBB25_2: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a0, 1(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a1, 1(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV32-ZBKB-LABEL: memcmp_size_2:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 2
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: beqz a2, .LBB25_2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.1: # %endblock
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: .LBB25_2: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a0, 1(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a1, 1(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBKB-LABEL: memcmp_size_2:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 2
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: beqz a2, .LBB25_2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.1: # %endblock
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: .LBB25_2: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a0, 1(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a1, 1(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV32-V-LABEL: memcmp_size_2:
@@ -3957,42 +3458,82 @@ define i32 @memcmp_size_3(ptr %s1, ptr %s2) nounwind {
;
; CHECK-ALIGNED-RV32-ZBB-LABEL: memcmp_size_3:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 3
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: beqz a2, .LBB26_2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: .LBB26_1: # %endblock
+; CHECK-ALIGNED-RV32-ZBB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
+; CHECK-ALIGNED-RV32-ZBB-NEXT: .LBB26_2: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB26_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a0, 2(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a1, 2(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBB-LABEL: memcmp_size_3:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 3
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: beqz a2, .LBB26_2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: .LBB26_1: # %endblock
+; CHECK-ALIGNED-RV64-ZBB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
+; CHECK-ALIGNED-RV64-ZBB-NEXT: .LBB26_2: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB26_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a0, 2(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a1, 2(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV32-ZBKB-LABEL: memcmp_size_3:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 3
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: beqz a2, .LBB26_2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: .LBB26_1: # %endblock
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: .LBB26_2: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB26_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a0, 2(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a1, 2(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBKB-LABEL: memcmp_size_3:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 3
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: beqz a2, .LBB26_2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: .LBB26_1: # %endblock
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: .LBB26_2: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB26_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a0, 2(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a1, 2(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV32-V-LABEL: memcmp_size_3:
@@ -4152,42 +3693,102 @@ define i32 @memcmp_size_4(ptr %s1, ptr %s2) nounwind {
;
; CHECK-ALIGNED-RV32-ZBB-LABEL: memcmp_size_4:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: beqz a2, .LBB27_2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: .LBB27_1: # %endblock
+; CHECK-ALIGNED-RV32-ZBB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
+; CHECK-ALIGNED-RV32-ZBB-NEXT: .LBB27_2: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB27_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB27_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBB-LABEL: memcmp_size_4:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: beqz a2, .LBB27_2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: .LBB27_1: # %endblock
+; CHECK-ALIGNED-RV64-ZBB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
+; CHECK-ALIGNED-RV64-ZBB-NEXT: .LBB27_2: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB27_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB27_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV32-ZBKB-LABEL: memcmp_size_4:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: beqz a2, .LBB27_2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: .LBB27_1: # %endblock
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: .LBB27_2: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB27_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB27_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBKB-LABEL: memcmp_size_4:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: beqz a2, .LBB27_2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: .LBB27_1: # %endblock
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: .LBB27_2: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB27_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB27_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV32-V-LABEL: memcmp_size_4:
@@ -4325,42 +3926,122 @@ define i32 @memcmp_size_5(ptr %s1, ptr %s2) nounwind {
;
; CHECK-ALIGNED-RV32-ZBB-LABEL: memcmp_size_5:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 5
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: beqz a2, .LBB28_2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: .LBB28_1: # %endblock
+; CHECK-ALIGNED-RV32-ZBB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
+; CHECK-ALIGNED-RV32-ZBB-NEXT: .LBB28_2: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB28_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB28_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 3(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 3(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB28_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.5: # %loadbb4
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a0, 4(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a1, 4(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBB-LABEL: memcmp_size_5:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 5
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: beqz a2, .LBB28_2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: .LBB28_1: # %endblock
+; CHECK-ALIGNED-RV64-ZBB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
+; CHECK-ALIGNED-RV64-ZBB-NEXT: .LBB28_2: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB28_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB28_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 3(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 3(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB28_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.5: # %loadbb4
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a0, 4(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a1, 4(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV32-ZBKB-LABEL: memcmp_size_5:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 5
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: beqz a2, .LBB28_2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: .LBB28_1: # %endblock
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: .LBB28_2: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB28_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB28_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 3(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 3(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB28_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.5: # %loadbb4
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a0, 4(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a1, 4(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBKB-LABEL: memcmp_size_5:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 5
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: beqz a2, .LBB28_2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: .LBB28_1: # %endblock
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: .LBB28_2: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB28_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB28_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 3(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 3(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB28_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.5: # %loadbb4
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a0, 4(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a1, 4(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV32-V-LABEL: memcmp_size_5:
@@ -4518,42 +4199,142 @@ define i32 @memcmp_size_6(ptr %s1, ptr %s2) nounwind {
;
; CHECK-ALIGNED-RV32-ZBB-LABEL: memcmp_size_6:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 6
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: beqz a2, .LBB29_2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: .LBB29_1: # %endblock
+; CHECK-ALIGNED-RV32-ZBB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
+; CHECK-ALIGNED-RV32-ZBB-NEXT: .LBB29_2: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB29_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB29_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 3(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 3(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB29_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.5: # %loadbb4
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 4(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 4(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB29_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.6: # %loadbb5
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a0, 5(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a1, 5(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBB-LABEL: memcmp_size_6:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 6
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: beqz a2, .LBB29_2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: .LBB29_1: # %endblock
+; CHECK-ALIGNED-RV64-ZBB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
+; CHECK-ALIGNED-RV64-ZBB-NEXT: .LBB29_2: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB29_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB29_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 3(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 3(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB29_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.5: # %loadbb4
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 4(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 4(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB29_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.6: # %loadbb5
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a0, 5(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a1, 5(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV32-ZBKB-LABEL: memcmp_size_6:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 6
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: beqz a2, .LBB29_2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: .LBB29_1: # %endblock
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: .LBB29_2: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB29_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB29_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 3(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 3(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB29_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.5: # %loadbb4
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 4(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 4(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB29_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.6: # %loadbb5
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a0, 5(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a1, 5(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBKB-LABEL: memcmp_size_6:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 6
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: beqz a2, .LBB29_2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: .LBB29_1: # %endblock
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: .LBB29_2: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB29_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB29_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 3(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 3(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB29_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.5: # %loadbb4
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 4(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 4(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB29_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.6: # %loadbb5
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a0, 5(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a1, 5(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV32-V-LABEL: memcmp_size_6:
@@ -4723,42 +4504,162 @@ define i32 @memcmp_size_7(ptr %s1, ptr %s2) nounwind {
;
; CHECK-ALIGNED-RV32-ZBB-LABEL: memcmp_size_7:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 7
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: beqz a2, .LBB30_2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: .LBB30_1: # %endblock
+; CHECK-ALIGNED-RV32-ZBB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
+; CHECK-ALIGNED-RV32-ZBB-NEXT: .LBB30_2: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB30_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB30_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 3(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 3(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB30_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.5: # %loadbb4
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 4(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 4(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB30_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.6: # %loadbb5
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 5(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 5(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB30_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.7: # %loadbb6
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a0, 6(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a1, 6(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBB-LABEL: memcmp_size_7:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 7
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: beqz a2, .LBB30_2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: .LBB30_1: # %endblock
+; CHECK-ALIGNED-RV64-ZBB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
+; CHECK-ALIGNED-RV64-ZBB-NEXT: .LBB30_2: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB30_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB30_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 3(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 3(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB30_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.5: # %loadbb4
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 4(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 4(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB30_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.6: # %loadbb5
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 5(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 5(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB30_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.7: # %loadbb6
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a0, 6(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a1, 6(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV32-ZBKB-LABEL: memcmp_size_7:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 7
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: beqz a2, .LBB30_2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: .LBB30_1: # %endblock
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: .LBB30_2: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB30_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB30_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 3(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 3(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB30_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.5: # %loadbb4
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 4(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 4(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB30_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.6: # %loadbb5
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 5(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 5(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB30_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.7: # %loadbb6
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a0, 6(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a1, 6(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBKB-LABEL: memcmp_size_7:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 7
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: beqz a2, .LBB30_2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: .LBB30_1: # %endblock
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: .LBB30_2: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB30_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB30_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 3(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 3(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB30_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.5: # %loadbb4
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 4(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 4(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB30_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.6: # %loadbb5
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 5(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 5(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB30_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.7: # %loadbb6
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a0, 6(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a1, 6(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV32-V-LABEL: memcmp_size_7:
@@ -4944,42 +4845,182 @@ define i32 @memcmp_size_8(ptr %s1, ptr %s2) nounwind {
;
; CHECK-ALIGNED-RV32-ZBB-LABEL: memcmp_size_8:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 8
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: beqz a2, .LBB31_2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: .LBB31_1: # %endblock
+; CHECK-ALIGNED-RV32-ZBB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
+; CHECK-ALIGNED-RV32-ZBB-NEXT: .LBB31_2: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB31_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB31_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 3(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 3(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB31_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.5: # %loadbb4
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 4(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 4(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB31_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.6: # %loadbb5
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 5(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 5(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB31_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.7: # %loadbb6
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 6(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 6(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB31_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.8: # %loadbb7
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a0, 7(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a1, 7(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBB-LABEL: memcmp_size_8:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 8
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: beqz a2, .LBB31_2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: .LBB31_1: # %endblock
+; CHECK-ALIGNED-RV64-ZBB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
+; CHECK-ALIGNED-RV64-ZBB-NEXT: .LBB31_2: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB31_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB31_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 3(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 3(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB31_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.5: # %loadbb4
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 4(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 4(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB31_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.6: # %loadbb5
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 5(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 5(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB31_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.7: # %loadbb6
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 6(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 6(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB31_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.8: # %loadbb7
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a0, 7(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a1, 7(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV32-ZBKB-LABEL: memcmp_size_8:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 8
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: beqz a2, .LBB31_2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: .LBB31_1: # %endblock
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: .LBB31_2: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB31_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB31_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 3(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 3(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB31_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.5: # %loadbb4
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 4(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 4(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB31_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.6: # %loadbb5
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 5(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 5(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB31_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.7: # %loadbb6
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 6(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 6(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB31_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.8: # %loadbb7
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a0, 7(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a1, 7(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBKB-LABEL: memcmp_size_8:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 8
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: beqz a2, .LBB31_2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: .LBB31_1: # %endblock
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: mv a0, a2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: .LBB31_2: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB31_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB31_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 3(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 3(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB31_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.5: # %loadbb4
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 4(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 4(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB31_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.6: # %loadbb5
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 5(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 5(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB31_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.7: # %loadbb6
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 6(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 6(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB31_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.8: # %loadbb7
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a0, 7(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a1, 7(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a0, a0, a1
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV32-V-LABEL: memcmp_size_8:
@@ -6894,46 +6935,106 @@ define i1 @memcmp_lt_zero(ptr %s1, ptr %s2) nounwind {
;
; CHECK-ALIGNED-RV32-ZBB-LABEL: memcmp_lt_zero:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: srli a0, a0, 31
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: beqz a2, .LBB42_2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: .LBB42_1: # %endblock
+; CHECK-ALIGNED-RV32-ZBB-NEXT: srli a0, a2, 31
+; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
+; CHECK-ALIGNED-RV32-ZBB-NEXT: .LBB42_2: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB42_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB42_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: srli a0, a2, 31
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBB-LABEL: memcmp_lt_zero:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: srli a0, a0, 63
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: beqz a2, .LBB42_2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: .LBB42_1: # %endblock
+; CHECK-ALIGNED-RV64-ZBB-NEXT: srli a0, a2, 63
+; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
+; CHECK-ALIGNED-RV64-ZBB-NEXT: .LBB42_2: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB42_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB42_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: srli a0, a2, 63
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV32-ZBKB-LABEL: memcmp_lt_zero:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: srli a0, a0, 31
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: beqz a2, .LBB42_2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: .LBB42_1: # %endblock
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: srli a0, a2, 31
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: .LBB42_2: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB42_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB42_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: srli a0, a2, 31
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBKB-LABEL: memcmp_lt_zero:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: srli a0, a0, 63
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: beqz a2, .LBB42_2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: .LBB42_1: # %endblock
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: srli a0, a2, 63
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: .LBB42_2: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB42_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB42_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: srli a0, a2, 63
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV32-V-LABEL: memcmp_lt_zero:
@@ -7072,46 +7173,106 @@ define i1 @memcmp_gt_zero(ptr %s1, ptr %s2) nounwind {
;
; CHECK-ALIGNED-RV32-ZBB-LABEL: memcmp_gt_zero:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sgtz a0, a0
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: beqz a2, .LBB43_2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: .LBB43_1: # %endblock
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sgtz a0, a2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
+; CHECK-ALIGNED-RV32-ZBB-NEXT: .LBB43_2: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB43_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB43_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sgtz a0, a2
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBB-LABEL: memcmp_gt_zero:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sgtz a0, a0
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: beqz a2, .LBB43_2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: .LBB43_1: # %endblock
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sgtz a0, a2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
+; CHECK-ALIGNED-RV64-ZBB-NEXT: .LBB43_2: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB43_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB43_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sgtz a0, a2
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV32-ZBKB-LABEL: memcmp_gt_zero:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sgtz a0, a0
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: beqz a2, .LBB43_2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: .LBB43_1: # %endblock
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sgtz a0, a2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: .LBB43_2: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB43_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB43_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sgtz a0, a2
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBKB-LABEL: memcmp_gt_zero:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sgtz a0, a0
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: beqz a2, .LBB43_2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: .LBB43_1: # %endblock
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sgtz a0, a2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: .LBB43_2: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB43_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB43_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sgtz a0, a2
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV32-V-LABEL: memcmp_gt_zero:
@@ -7250,46 +7411,106 @@ define i1 @memcmp_le_zero(ptr %s1, ptr %s2) nounwind {
;
; CHECK-ALIGNED-RV32-ZBB-LABEL: memcmp_le_zero:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: slti a0, a0, 1
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: beqz a2, .LBB44_2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: .LBB44_1: # %endblock
+; CHECK-ALIGNED-RV32-ZBB-NEXT: slti a0, a2, 1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
+; CHECK-ALIGNED-RV32-ZBB-NEXT: .LBB44_2: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB44_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB44_1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: slti a0, a2, 1
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBB-LABEL: memcmp_le_zero:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: slti a0, a0, 1
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: beqz a2, .LBB44_2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: .LBB44_1: # %endblock
+; CHECK-ALIGNED-RV64-ZBB-NEXT: slti a0, a2, 1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
+; CHECK-ALIGNED-RV64-ZBB-NEXT: .LBB44_2: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB44_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB44_1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: slti a0, a2, 1
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV32-ZBKB-LABEL: memcmp_le_zero:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: slti a0, a0, 1
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: beqz a2, .LBB44_2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: .LBB44_1: # %endblock
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: slti a0, a2, 1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: .LBB44_2: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB44_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB44_1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: slti a0, a2, 1
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBKB-LABEL: memcmp_le_zero:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: slti a0, a0, 1
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: beqz a2, .LBB44_2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: .LBB44_1: # %endblock
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: slti a0, a2, 1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: .LBB44_2: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB44_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.3: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB44_1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.4: # %loadbb3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: slti a0, a2, 1
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV32-V-LABEL: memcmp_le_zero:
@@ -7434,50 +7655,102 @@ define i1 @memcmp_ge_zero(ptr %s1, ptr %s2) nounwind {
;
; CHECK-ALIGNED-RV32-ZBB-LABEL: memcmp_ge_zero:
; CHECK-ALIGNED-RV32-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBB-NEXT: srli a0, a0, 31
-; CHECK-ALIGNED-RV32-ZBB-NEXT: xori a0, a0, 1
-; CHECK-ALIGNED-RV32-ZBB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB45_4
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.1: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB45_4
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.2: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: bnez a2, .LBB45_4
+; CHECK-ALIGNED-RV32-ZBB-NEXT: # %bb.3: # %loadbb3
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV32-ZBB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV32-ZBB-NEXT: .LBB45_4: # %endblock
+; CHECK-ALIGNED-RV32-ZBB-NEXT: srli a2, a2, 31
+; CHECK-ALIGNED-RV32-ZBB-NEXT: xori a0, a2, 1
; CHECK-ALIGNED-RV32-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBB-LABEL: memcmp_ge_zero:
; CHECK-ALIGNED-RV64-ZBB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-ZBB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBB-NEXT: srli a0, a0, 63
-; CHECK-ALIGNED-RV64-ZBB-NEXT: xori a0, a0, 1
-; CHECK-ALIGNED-RV64-ZBB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB45_4
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.1: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB45_4
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.2: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: bnez a2, .LBB45_4
+; CHECK-ALIGNED-RV64-ZBB-NEXT: # %bb.3: # %loadbb3
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV64-ZBB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV64-ZBB-NEXT: .LBB45_4: # %endblock
+; CHECK-ALIGNED-RV64-ZBB-NEXT: srli a2, a2, 63
+; CHECK-ALIGNED-RV64-ZBB-NEXT: xori a0, a2, 1
; CHECK-ALIGNED-RV64-ZBB-NEXT: ret
;
; CHECK-ALIGNED-RV32-ZBKB-LABEL: memcmp_ge_zero:
; CHECK-ALIGNED-RV32-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: srli a0, a0, 31
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: xori a0, a0, 1
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB45_4
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.1: # %loadbb1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB45_4
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.2: # %loadbb2
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: bnez a2, .LBB45_4
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: # %bb.3: # %loadbb3
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: .LBB45_4: # %endblock
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: srli a2, a2, 31
+; CHECK-ALIGNED-RV32-ZBKB-NEXT: xori a0, a2, 1
; CHECK-ALIGNED-RV32-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV64-ZBKB-LABEL: memcmp_ge_zero:
; CHECK-ALIGNED-RV64-ZBKB: # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, -16
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: li a2, 4
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: call memcmp
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: srli a0, a0, 63
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: xori a0, a0, 1
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-ZBKB-NEXT: addi sp, sp, 16
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 0(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB45_4
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.1: # %loadbb1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 1(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 1(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB45_4
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.2: # %loadbb2
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a2, 2(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a3, 2(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a2, a3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: bnez a2, .LBB45_4
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: # %bb.3: # %loadbb3
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a0, 3(a0)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: lbu a1, 3(a1)
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: sub a2, a0, a1
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: .LBB45_4: # %endblock
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: srli a2, a2, 63
+; CHECK-ALIGNED-RV64-ZBKB-NEXT: xori a0, a2, 1
; CHECK-ALIGNED-RV64-ZBKB-NEXT: ret
;
; CHECK-ALIGNED-RV32-V-LABEL: memcmp_ge_zero:
@@ -7600,5 +7873,3 @@ entry:
%ret = icmp sgt i32 %memcmp, -1
ret i1 %ret
}
-;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; CHECK-ALIGNED: {{.*}}
>From 6a86bae97975dfb6b33377e69af9382b0399761c Mon Sep 17 00:00:00 2001
From: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: Thu, 16 Jul 2026 15:36:20 +0800
Subject: [PATCH 3/7] [ExpandMemCmp] Honor RequireNaturalAlignment inside
MemCmpExpansion (NFC)
Instead of clearing AllowOverlappingLoads and AllowedTailExpansions in
expandMemCmp before constructing MemCmpExpansion, make MemCmpExpansion
itself honor RequireNaturalAlignment. Overlapping loads are inherently
unaligned, and merged tail expansions produce non-power-of-two sizes that
are not naturally aligned, so both are skipped when the flag is set.
This keeps RequireNaturalAlignment the single source of truth: a target
only needs to set the flag alongside its normal LoadSizes, rather than
also having the pass mutate the target-provided options. No functional
change.
Assisted-by: TRAE CLI (DeepSeek V4 Pro)
---
llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp | 17 ++++++++++-------
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp b/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
index 667b3fc7a617e..338ffb120f5f6 100644
--- a/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
+++ b/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
@@ -220,7 +220,11 @@ void MemCmpExpansion::optimiseLoadSequence(
// subsequences into single loads of allowed sizes from
// `MemCmpExpansionOptions::AllowedTailExpansions`. If it is for zero
// comparison or if no allowed tail expansions are specified, we exit early.
- if (IsUsedForZeroCmp || Options.AllowedTailExpansions.empty())
+ // Merged tail loads have non-power-of-two sizes that are not naturally
+ // aligned, so they are also skipped when the target requires natural
+ // alignment.
+ if (IsUsedForZeroCmp || Options.AllowedTailExpansions.empty() ||
+ Options.RequireNaturalAlignment)
return;
while (LoadSequence.size() >= 2) {
@@ -274,8 +278,9 @@ MemCmpExpansion::MemCmpExpansion(
NumLoadsNonOneByte = GreedyNumLoadsNonOneByte;
assert(LoadSequence.size() <= Options.MaxNumLoads && "broken invariant");
// If we allow overlapping loads and the load sequence is not already optimal,
- // use overlapping loads.
- if (Options.AllowOverlappingLoads &&
+ // use overlapping loads. Overlapping loads are inherently unaligned, so they
+ // are not used when the target requires naturally aligned loads.
+ if (Options.AllowOverlappingLoads && !Options.RequireNaturalAlignment &&
(LoadSequence.empty() || LoadSequence.size() > 2)) {
unsigned OverlappingNumLoadsNonOneByte = 0;
auto OverlappingLoads = computeOverlappingLoadSequence(
@@ -866,10 +871,8 @@ static bool expandMemCmp(CallInst *CI, const TargetTransformInfo *TTI,
// of both pointers. Because the greedy load sequence only places a load of
// size S at an offset that is a multiple of S, a power-of-two load that
// does not exceed the base alignment is guaranteed to be naturally aligned.
- // Overlapping loads and merged tail expansions can produce unaligned or
- // non-power-of-two accesses, so they are not used in this mode.
- Options.AllowOverlappingLoads = false;
- Options.AllowedTailExpansions.clear();
+ // MemCmpExpansion additionally skips overlapping loads and merged tail
+ // expansions in this mode, as those are not naturally aligned.
const Align LhsAlign = CI->getArgOperand(0)->getPointerAlignment(*DL);
const Align RhsAlign = CI->getArgOperand(1)->getPointerAlignment(*DL);
const uint64_t MinAlign = std::min(LhsAlign.value(), RhsAlign.value());
>From 6807271d08c27a22974891d67f85faefb968172f Mon Sep 17 00:00:00 2001
From: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: Thu, 16 Jul 2026 16:17:06 +0800
Subject: [PATCH 4/7] [ExpandMemCmp] Use call-site align attributes for the
known pointer alignment
The expansion determined pointer alignment via Value::getPointerAlignment,
which only inspects the pointer value's definition and ignores align
attributes attached to the memcmp/bcmp call arguments. As a result a call
such as bcmp(ptr align 8 %a, ptr align 8 %b, 8) with otherwise unannotated
pointers was treated as fully unaligned.
Combine the value alignment with CallBase::getParamAlign for each pointer
argument, in both the load-size filter and getLoadPair, so the emitted
loads carry the correct alignment and strict-align targets can expand such
call sites.
Assisted-by: TRAE CLI (DeepSeek V4 Pro)
---
llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp | 19 +-
.../ExpandMemCmp/RISCV/memcmp-strict-align.ll | 196 ++++++++++++++++++
2 files changed, 211 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp b/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
index 338ffb120f5f6..36faf6b380e84 100644
--- a/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
+++ b/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
@@ -57,6 +57,17 @@ static cl::opt<unsigned> MaxLoadsPerMemcmpOptSize(
namespace {
+// Return the known alignment of the pointer argument \p ArgNo of \p CI,
+// combining the alignment of the underlying pointer value with any align
+// attribute on the call site itself.
+static Align getMemCmpArgAlignment(const CallInst *CI, unsigned ArgNo,
+ const DataLayout &DL) {
+ Align A = CI->getArgOperand(ArgNo)->getPointerAlignment(DL);
+ if (MaybeAlign ParamAlign = CI->getParamAlign(ArgNo))
+ A = std::max(A, *ParamAlign);
+ return A;
+}
+
// This class provides helper functions to expand a memcmp library call into an
// inline expansion.
class MemCmpExpansion {
@@ -323,8 +334,8 @@ MemCmpExpansion::LoadPair MemCmpExpansion::getLoadPair(Type *LoadSizeType,
// Get the memory source at offset `OffsetBytes`.
Value *LhsSource = CI->getArgOperand(0);
Value *RhsSource = CI->getArgOperand(1);
- Align LhsAlign = LhsSource->getPointerAlignment(DL);
- Align RhsAlign = RhsSource->getPointerAlignment(DL);
+ Align LhsAlign = getMemCmpArgAlignment(CI, 0, DL);
+ Align RhsAlign = getMemCmpArgAlignment(CI, 1, DL);
if (OffsetBytes > 0) {
auto *ByteType = Type::getInt8Ty(CI->getContext());
LhsSource = Builder.CreateConstGEP1_64(ByteType, LhsSource, OffsetBytes);
@@ -873,8 +884,8 @@ static bool expandMemCmp(CallInst *CI, const TargetTransformInfo *TTI,
// does not exceed the base alignment is guaranteed to be naturally aligned.
// MemCmpExpansion additionally skips overlapping loads and merged tail
// expansions in this mode, as those are not naturally aligned.
- const Align LhsAlign = CI->getArgOperand(0)->getPointerAlignment(*DL);
- const Align RhsAlign = CI->getArgOperand(1)->getPointerAlignment(*DL);
+ const Align LhsAlign = getMemCmpArgAlignment(CI, 0, *DL);
+ const Align RhsAlign = getMemCmpArgAlignment(CI, 1, *DL);
const uint64_t MinAlign = std::min(LhsAlign.value(), RhsAlign.value());
llvm::erase_if(Options.LoadSizes, [&](unsigned LoadSize) {
return LoadSize > MinAlign || !isPowerOf2_64(LoadSize);
diff --git a/llvm/test/Transforms/ExpandMemCmp/RISCV/memcmp-strict-align.ll b/llvm/test/Transforms/ExpandMemCmp/RISCV/memcmp-strict-align.ll
index 9181326edcd6b..e5b311504a374 100644
--- a/llvm/test/Transforms/ExpandMemCmp/RISCV/memcmp-strict-align.ll
+++ b/llvm/test/Transforms/ExpandMemCmp/RISCV/memcmp-strict-align.ll
@@ -443,3 +443,199 @@ define i1 @bcmp_size_16_align_4(ptr align 4 %a, ptr align 4 %b) {
%z = icmp eq i32 %r, 0
ret i1 %z
}
+
+; Alignment known only from the call-site argument attributes (the pointer
+; values themselves are unannotated) is enough to expand.
+define i1 @bcmp_size_8_callsite_align_8(ptr %a, ptr %b) {
+; RV32-LABEL: define i1 @bcmp_size_8_callsite_align_8(
+; RV32-SAME: ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0]] {
+; RV32-NEXT: [[TMP1:%.*]] = load i32, ptr [[A]], align 8
+; RV32-NEXT: [[TMP2:%.*]] = load i32, ptr [[B]], align 8
+; RV32-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1]], [[TMP2]]
+; RV32-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[A]], i64 4
+; RV32-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[B]], i64 4
+; RV32-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP4]], align 4
+; RV32-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP5]], align 4
+; RV32-NEXT: [[TMP8:%.*]] = xor i32 [[TMP6]], [[TMP7]]
+; RV32-NEXT: [[TMP9:%.*]] = or i32 [[TMP3]], [[TMP8]]
+; RV32-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
+; RV32-NEXT: [[TMP11:%.*]] = zext i1 [[TMP10]] to i32
+; RV32-NEXT: [[Z:%.*]] = icmp eq i32 [[TMP11]], 0
+; RV32-NEXT: ret i1 [[Z]]
+;
+; RV64-LABEL: define i1 @bcmp_size_8_callsite_align_8(
+; RV64-SAME: ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0]] {
+; RV64-NEXT: [[TMP1:%.*]] = load i64, ptr [[A]], align 8
+; RV64-NEXT: [[TMP2:%.*]] = load i64, ptr [[B]], align 8
+; RV64-NEXT: [[TMP3:%.*]] = icmp ne i64 [[TMP1]], [[TMP2]]
+; RV64-NEXT: [[TMP4:%.*]] = zext i1 [[TMP3]] to i32
+; RV64-NEXT: [[Z:%.*]] = icmp eq i32 [[TMP4]], 0
+; RV64-NEXT: ret i1 [[Z]]
+;
+; RV32-UNALIGNED-LABEL: define i1 @bcmp_size_8_callsite_align_8(
+; RV32-UNALIGNED-SAME: ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0]] {
+; RV32-UNALIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr [[A]], align 8
+; RV32-UNALIGNED-NEXT: [[TMP2:%.*]] = load i32, ptr [[B]], align 8
+; RV32-UNALIGNED-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1]], [[TMP2]]
+; RV32-UNALIGNED-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[A]], i64 4
+; RV32-UNALIGNED-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[B]], i64 4
+; RV32-UNALIGNED-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP4]], align 4
+; RV32-UNALIGNED-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP5]], align 4
+; RV32-UNALIGNED-NEXT: [[TMP8:%.*]] = xor i32 [[TMP6]], [[TMP7]]
+; RV32-UNALIGNED-NEXT: [[TMP9:%.*]] = or i32 [[TMP3]], [[TMP8]]
+; RV32-UNALIGNED-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
+; RV32-UNALIGNED-NEXT: [[TMP11:%.*]] = zext i1 [[TMP10]] to i32
+; RV32-UNALIGNED-NEXT: [[Z:%.*]] = icmp eq i32 [[TMP11]], 0
+; RV32-UNALIGNED-NEXT: ret i1 [[Z]]
+;
+; RV64-UNALIGNED-LABEL: define i1 @bcmp_size_8_callsite_align_8(
+; RV64-UNALIGNED-SAME: ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0]] {
+; RV64-UNALIGNED-NEXT: [[TMP1:%.*]] = load i64, ptr [[A]], align 8
+; RV64-UNALIGNED-NEXT: [[TMP2:%.*]] = load i64, ptr [[B]], align 8
+; RV64-UNALIGNED-NEXT: [[TMP3:%.*]] = icmp ne i64 [[TMP1]], [[TMP2]]
+; RV64-UNALIGNED-NEXT: [[TMP4:%.*]] = zext i1 [[TMP3]] to i32
+; RV64-UNALIGNED-NEXT: [[Z:%.*]] = icmp eq i32 [[TMP4]], 0
+; RV64-UNALIGNED-NEXT: ret i1 [[Z]]
+;
+ %r = call i32 @bcmp(ptr align 8 %a, ptr align 8 %b, iXLen 8)
+ %z = icmp eq i32 %r, 0
+ ret i1 %z
+}
+
+; If only one call-site argument is aligned, the common alignment is one byte,
+; so only byte loads are legal and the compare stays a libcall.
+define i1 @bcmp_size_8_callsite_align_mixed(ptr %a, ptr %b) {
+; RV32-LABEL: define i1 @bcmp_size_8_callsite_align_mixed(
+; RV32-SAME: ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0]] {
+; RV32-NEXT: [[TMP1:%.*]] = load i8, ptr [[A]], align 8
+; RV32-NEXT: [[TMP2:%.*]] = load i8, ptr [[B]], align 1
+; RV32-NEXT: [[TMP3:%.*]] = xor i8 [[TMP1]], [[TMP2]]
+; RV32-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[A]], i64 1
+; RV32-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[B]], i64 1
+; RV32-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP4]], align 1
+; RV32-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP5]], align 1
+; RV32-NEXT: [[TMP8:%.*]] = xor i8 [[TMP6]], [[TMP7]]
+; RV32-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[A]], i64 2
+; RV32-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[B]], i64 2
+; RV32-NEXT: [[TMP11:%.*]] = load i8, ptr [[TMP9]], align 2
+; RV32-NEXT: [[TMP12:%.*]] = load i8, ptr [[TMP10]], align 1
+; RV32-NEXT: [[TMP13:%.*]] = xor i8 [[TMP11]], [[TMP12]]
+; RV32-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[A]], i64 3
+; RV32-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[B]], i64 3
+; RV32-NEXT: [[TMP16:%.*]] = load i8, ptr [[TMP14]], align 1
+; RV32-NEXT: [[TMP17:%.*]] = load i8, ptr [[TMP15]], align 1
+; RV32-NEXT: [[TMP18:%.*]] = xor i8 [[TMP16]], [[TMP17]]
+; RV32-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[A]], i64 4
+; RV32-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[B]], i64 4
+; RV32-NEXT: [[TMP21:%.*]] = load i8, ptr [[TMP19]], align 4
+; RV32-NEXT: [[TMP22:%.*]] = load i8, ptr [[TMP20]], align 1
+; RV32-NEXT: [[TMP23:%.*]] = xor i8 [[TMP21]], [[TMP22]]
+; RV32-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[A]], i64 5
+; RV32-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[B]], i64 5
+; RV32-NEXT: [[TMP26:%.*]] = load i8, ptr [[TMP24]], align 1
+; RV32-NEXT: [[TMP27:%.*]] = load i8, ptr [[TMP25]], align 1
+; RV32-NEXT: [[TMP28:%.*]] = xor i8 [[TMP26]], [[TMP27]]
+; RV32-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[A]], i64 6
+; RV32-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[B]], i64 6
+; RV32-NEXT: [[TMP31:%.*]] = load i8, ptr [[TMP29]], align 2
+; RV32-NEXT: [[TMP32:%.*]] = load i8, ptr [[TMP30]], align 1
+; RV32-NEXT: [[TMP33:%.*]] = xor i8 [[TMP31]], [[TMP32]]
+; RV32-NEXT: [[TMP34:%.*]] = getelementptr i8, ptr [[A]], i64 7
+; RV32-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr [[B]], i64 7
+; RV32-NEXT: [[TMP36:%.*]] = load i8, ptr [[TMP34]], align 1
+; RV32-NEXT: [[TMP37:%.*]] = load i8, ptr [[TMP35]], align 1
+; RV32-NEXT: [[TMP38:%.*]] = xor i8 [[TMP36]], [[TMP37]]
+; RV32-NEXT: [[TMP39:%.*]] = or i8 [[TMP3]], [[TMP8]]
+; RV32-NEXT: [[TMP40:%.*]] = or i8 [[TMP13]], [[TMP18]]
+; RV32-NEXT: [[TMP41:%.*]] = or i8 [[TMP23]], [[TMP28]]
+; RV32-NEXT: [[TMP42:%.*]] = or i8 [[TMP33]], [[TMP38]]
+; RV32-NEXT: [[TMP43:%.*]] = or i8 [[TMP39]], [[TMP40]]
+; RV32-NEXT: [[TMP44:%.*]] = or i8 [[TMP41]], [[TMP42]]
+; RV32-NEXT: [[TMP45:%.*]] = or i8 [[TMP43]], [[TMP44]]
+; RV32-NEXT: [[TMP46:%.*]] = icmp ne i8 [[TMP45]], 0
+; RV32-NEXT: [[TMP47:%.*]] = zext i1 [[TMP46]] to i32
+; RV32-NEXT: [[Z:%.*]] = icmp eq i32 [[TMP47]], 0
+; RV32-NEXT: ret i1 [[Z]]
+;
+; RV64-LABEL: define i1 @bcmp_size_8_callsite_align_mixed(
+; RV64-SAME: ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0]] {
+; RV64-NEXT: [[TMP1:%.*]] = load i8, ptr [[A]], align 8
+; RV64-NEXT: [[TMP2:%.*]] = load i8, ptr [[B]], align 1
+; RV64-NEXT: [[TMP3:%.*]] = xor i8 [[TMP1]], [[TMP2]]
+; RV64-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[A]], i64 1
+; RV64-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[B]], i64 1
+; RV64-NEXT: [[TMP6:%.*]] = load i8, ptr [[TMP4]], align 1
+; RV64-NEXT: [[TMP7:%.*]] = load i8, ptr [[TMP5]], align 1
+; RV64-NEXT: [[TMP8:%.*]] = xor i8 [[TMP6]], [[TMP7]]
+; RV64-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[A]], i64 2
+; RV64-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[B]], i64 2
+; RV64-NEXT: [[TMP11:%.*]] = load i8, ptr [[TMP9]], align 2
+; RV64-NEXT: [[TMP12:%.*]] = load i8, ptr [[TMP10]], align 1
+; RV64-NEXT: [[TMP13:%.*]] = xor i8 [[TMP11]], [[TMP12]]
+; RV64-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[A]], i64 3
+; RV64-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[B]], i64 3
+; RV64-NEXT: [[TMP16:%.*]] = load i8, ptr [[TMP14]], align 1
+; RV64-NEXT: [[TMP17:%.*]] = load i8, ptr [[TMP15]], align 1
+; RV64-NEXT: [[TMP18:%.*]] = xor i8 [[TMP16]], [[TMP17]]
+; RV64-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[A]], i64 4
+; RV64-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[B]], i64 4
+; RV64-NEXT: [[TMP21:%.*]] = load i8, ptr [[TMP19]], align 4
+; RV64-NEXT: [[TMP22:%.*]] = load i8, ptr [[TMP20]], align 1
+; RV64-NEXT: [[TMP23:%.*]] = xor i8 [[TMP21]], [[TMP22]]
+; RV64-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[A]], i64 5
+; RV64-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[B]], i64 5
+; RV64-NEXT: [[TMP26:%.*]] = load i8, ptr [[TMP24]], align 1
+; RV64-NEXT: [[TMP27:%.*]] = load i8, ptr [[TMP25]], align 1
+; RV64-NEXT: [[TMP28:%.*]] = xor i8 [[TMP26]], [[TMP27]]
+; RV64-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[A]], i64 6
+; RV64-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[B]], i64 6
+; RV64-NEXT: [[TMP31:%.*]] = load i8, ptr [[TMP29]], align 2
+; RV64-NEXT: [[TMP32:%.*]] = load i8, ptr [[TMP30]], align 1
+; RV64-NEXT: [[TMP33:%.*]] = xor i8 [[TMP31]], [[TMP32]]
+; RV64-NEXT: [[TMP34:%.*]] = getelementptr i8, ptr [[A]], i64 7
+; RV64-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr [[B]], i64 7
+; RV64-NEXT: [[TMP36:%.*]] = load i8, ptr [[TMP34]], align 1
+; RV64-NEXT: [[TMP37:%.*]] = load i8, ptr [[TMP35]], align 1
+; RV64-NEXT: [[TMP38:%.*]] = xor i8 [[TMP36]], [[TMP37]]
+; RV64-NEXT: [[TMP39:%.*]] = or i8 [[TMP3]], [[TMP8]]
+; RV64-NEXT: [[TMP40:%.*]] = or i8 [[TMP13]], [[TMP18]]
+; RV64-NEXT: [[TMP41:%.*]] = or i8 [[TMP23]], [[TMP28]]
+; RV64-NEXT: [[TMP42:%.*]] = or i8 [[TMP33]], [[TMP38]]
+; RV64-NEXT: [[TMP43:%.*]] = or i8 [[TMP39]], [[TMP40]]
+; RV64-NEXT: [[TMP44:%.*]] = or i8 [[TMP41]], [[TMP42]]
+; RV64-NEXT: [[TMP45:%.*]] = or i8 [[TMP43]], [[TMP44]]
+; RV64-NEXT: [[TMP46:%.*]] = icmp ne i8 [[TMP45]], 0
+; RV64-NEXT: [[TMP47:%.*]] = zext i1 [[TMP46]] to i32
+; RV64-NEXT: [[Z:%.*]] = icmp eq i32 [[TMP47]], 0
+; RV64-NEXT: ret i1 [[Z]]
+;
+; RV32-UNALIGNED-LABEL: define i1 @bcmp_size_8_callsite_align_mixed(
+; RV32-UNALIGNED-SAME: ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0]] {
+; RV32-UNALIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr [[A]], align 8
+; RV32-UNALIGNED-NEXT: [[TMP2:%.*]] = load i32, ptr [[B]], align 1
+; RV32-UNALIGNED-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1]], [[TMP2]]
+; RV32-UNALIGNED-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[A]], i64 4
+; RV32-UNALIGNED-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[B]], i64 4
+; RV32-UNALIGNED-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP4]], align 4
+; RV32-UNALIGNED-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP5]], align 1
+; RV32-UNALIGNED-NEXT: [[TMP8:%.*]] = xor i32 [[TMP6]], [[TMP7]]
+; RV32-UNALIGNED-NEXT: [[TMP9:%.*]] = or i32 [[TMP3]], [[TMP8]]
+; RV32-UNALIGNED-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
+; RV32-UNALIGNED-NEXT: [[TMP11:%.*]] = zext i1 [[TMP10]] to i32
+; RV32-UNALIGNED-NEXT: [[Z:%.*]] = icmp eq i32 [[TMP11]], 0
+; RV32-UNALIGNED-NEXT: ret i1 [[Z]]
+;
+; RV64-UNALIGNED-LABEL: define i1 @bcmp_size_8_callsite_align_mixed(
+; RV64-UNALIGNED-SAME: ptr [[A:%.*]], ptr [[B:%.*]]) #[[ATTR0]] {
+; RV64-UNALIGNED-NEXT: [[TMP1:%.*]] = load i64, ptr [[A]], align 8
+; RV64-UNALIGNED-NEXT: [[TMP2:%.*]] = load i64, ptr [[B]], align 1
+; RV64-UNALIGNED-NEXT: [[TMP3:%.*]] = icmp ne i64 [[TMP1]], [[TMP2]]
+; RV64-UNALIGNED-NEXT: [[TMP4:%.*]] = zext i1 [[TMP3]] to i32
+; RV64-UNALIGNED-NEXT: [[Z:%.*]] = icmp eq i32 [[TMP4]], 0
+; RV64-UNALIGNED-NEXT: ret i1 [[Z]]
+;
+ %r = call i32 @bcmp(ptr align 8 %a, ptr %b, iXLen 8)
+ %z = icmp eq i32 %r, 0
+ ret i1 %z
+}
+
>From e0e64570812ff6a630260400164f621bc56a7e69 Mon Sep 17 00:00:00 2001
From: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: Thu, 16 Jul 2026 17:03:55 +0800
Subject: [PATCH 5/7] [ExpandMemCmp] Query allowsMisalignedMemoryAccesses
instead of a target flag
Replace the MemCmpExpansionOptions::RequireNaturalAlignment knob with a
direct query of TTI::allowsMisalignedMemoryAccesses in the pass. For every
candidate load size, the size is kept if the access is naturally aligned
given the statically-known common pointer alignment, or if the target
allows a misaligned access of that width. This makes the alignment
handling a property the pass derives from the target rather than an option
each strict-align target has to opt into, and it generalizes to targets
that permit some unaligned widths but not others.
The query is on whether the access is *allowed*, not whether it is *fast*,
matching the existing behavior of forming unaligned loads whenever the
target permits them; it is therefore a no-op for targets that allow
unaligned access (X86, AArch64, ...).
RISCV no longer sets the removed flag; instead it only offers overlapping
loads and merged tail expansions (which need not be naturally aligned)
when unaligned scalar access is supported, and relies on the pass to keep
the accessible load sizes otherwise.
Assisted-by: TRAE CLI (DeepSeek V4 Pro)
---
.../llvm/Analysis/TargetTransformInfo.h | 8 ---
.../Target/RISCV/RISCVTargetTransformInfo.cpp | 24 +++++---
llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp | 61 ++++++++++---------
3 files changed, 46 insertions(+), 47 deletions(-)
diff --git a/llvm/include/llvm/Analysis/TargetTransformInfo.h b/llvm/include/llvm/Analysis/TargetTransformInfo.h
index dac9e1e4238ce..10c0509460b95 100644
--- a/llvm/include/llvm/Analysis/TargetTransformInfo.h
+++ b/llvm/include/llvm/Analysis/TargetTransformInfo.h
@@ -1132,14 +1132,6 @@ class TargetTransformInfo {
// requires all loads in LoadSizes to be doable in an unaligned way.
bool AllowOverlappingLoads = false;
- // Set to true if the expansion may only emit naturally aligned loads.
- // Strict-alignment targets that cannot perform unaligned scalar loads can
- // still opt into expansion by setting this flag: MemCmpExpansion then only
- // uses load sizes covered by the statically-known alignment of both
- // pointers at the call site, falling back to the libcall when no load size
- // fits. Should not be combined with AllowOverlappingLoads.
- bool RequireNaturalAlignment = false;
-
// Sometimes, the amount of data that needs to be compared is smaller than
// the standard register size, but it cannot be loaded with just one load
// instruction. For example, if the size of the memory comparison is 6
diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index ffd397e6be478..0d392424976e3 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -3634,22 +3634,26 @@ RISCVTTIImpl::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const {
if (!ST->hasStdExtZbb() && !ST->hasStdExtZbkb() && !IsZeroCmp)
return Options;
- // If the target does not support unaligned scalar memory access, expansion is
- // still possible when both pointers are statically known to be sufficiently
- // aligned. ExpandMemCmp will restrict the load sizes below to the ones
- // covered by the known per-call-site alignment and fall back to the libcall
- // when none fits.
- Options.RequireNaturalAlignment = !ST->enableUnalignedScalarMem();
-
- Options.AllowOverlappingLoads = true;
+ // Even if the target does not support unaligned scalar memory access,
+ // expansion is still possible when both pointers are statically known to be
+ // sufficiently aligned. ExpandMemCmp queries the target for each load size
+ // and keeps only the ones the target can actually access at the known
+ // per-call-site alignment, falling back to the libcall when none fits.
+ // Overlapping loads and merged tail expansions produce accesses that need
+ // not be naturally aligned, so they are only offered when unaligned scalar
+ // access is supported.
+ bool UnalignedScalar = ST->enableUnalignedScalarMem();
+ Options.AllowOverlappingLoads = UnalignedScalar;
Options.MaxNumLoads = TLI->getMaxExpandSizeMemcmp(OptSize);
Options.NumLoadsPerBlock = Options.MaxNumLoads;
if (ST->is64Bit()) {
Options.LoadSizes = {8, 4, 2, 1};
- Options.AllowedTailExpansions = {3, 5, 6};
+ if (UnalignedScalar)
+ Options.AllowedTailExpansions = {3, 5, 6};
} else {
Options.LoadSizes = {4, 2, 1};
- Options.AllowedTailExpansions = {3};
+ if (UnalignedScalar)
+ Options.AllowedTailExpansions = {3};
}
if (IsZeroCmp && ST->hasVInstructions()) {
diff --git a/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp b/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
index 36faf6b380e84..82a3b351b1850 100644
--- a/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
+++ b/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
@@ -231,11 +231,7 @@ void MemCmpExpansion::optimiseLoadSequence(
// subsequences into single loads of allowed sizes from
// `MemCmpExpansionOptions::AllowedTailExpansions`. If it is for zero
// comparison or if no allowed tail expansions are specified, we exit early.
- // Merged tail loads have non-power-of-two sizes that are not naturally
- // aligned, so they are also skipped when the target requires natural
- // alignment.
- if (IsUsedForZeroCmp || Options.AllowedTailExpansions.empty() ||
- Options.RequireNaturalAlignment)
+ if (IsUsedForZeroCmp || Options.AllowedTailExpansions.empty())
return;
while (LoadSequence.size() >= 2) {
@@ -289,9 +285,8 @@ MemCmpExpansion::MemCmpExpansion(
NumLoadsNonOneByte = GreedyNumLoadsNonOneByte;
assert(LoadSequence.size() <= Options.MaxNumLoads && "broken invariant");
// If we allow overlapping loads and the load sequence is not already optimal,
- // use overlapping loads. Overlapping loads are inherently unaligned, so they
- // are not used when the target requires naturally aligned loads.
- if (Options.AllowOverlappingLoads && !Options.RequireNaturalAlignment &&
+ // use overlapping loads.
+ if (Options.AllowOverlappingLoads &&
(LoadSequence.empty() || LoadSequence.size() > 2)) {
unsigned OverlappingNumLoadsNonOneByte = 0;
auto OverlappingLoads = computeOverlappingLoadSequence(
@@ -876,28 +871,36 @@ static bool expandMemCmp(CallInst *CI, const TargetTransformInfo *TTI,
if (!OptForSize && MaxLoadsPerMemcmp.getNumOccurrences())
Options.MaxNumLoads = MaxLoadsPerMemcmp;
- if (Options.RequireNaturalAlignment) {
- // The target can only perform naturally aligned loads. Keep the load sizes
- // that are powers of two and no larger than the statically known alignment
- // of both pointers. Because the greedy load sequence only places a load of
- // size S at an offset that is a multiple of S, a power-of-two load that
- // does not exceed the base alignment is guaranteed to be naturally aligned.
- // MemCmpExpansion additionally skips overlapping loads and merged tail
- // expansions in this mode, as those are not naturally aligned.
- const Align LhsAlign = getMemCmpArgAlignment(CI, 0, *DL);
- const Align RhsAlign = getMemCmpArgAlignment(CI, 1, *DL);
- const uint64_t MinAlign = std::min(LhsAlign.value(), RhsAlign.value());
- llvm::erase_if(Options.LoadSizes, [&](unsigned LoadSize) {
- return LoadSize > MinAlign || !isPowerOf2_64(LoadSize);
- });
- // Bail out only if no load size fits the known alignment at all. Byte
- // loads are naturally aligned for any pointer, so they normally survive and
- // remain useful for small compares: the number of loads is bounded by
- // MaxNumLoads, and larger compares that would need too many byte loads fall
- // back to the libcall in MemCmpExpansion.
- if (Options.LoadSizes.empty())
+ // Keep only the load sizes the target can actually access given the
+ // statically known common alignment of both pointers: either the access is
+ // naturally aligned, or the target allows a misaligned access of that width.
+ // This lets strict-alignment targets expand compares whose pointers happen to
+ // be sufficiently aligned, while still falling back to the libcall when no
+ // load size fits. Because the greedy load sequence only places a load of size
+ // S at an offset that is a multiple of S, a load that does not exceed the
+ // base alignment is guaranteed to be naturally aligned.
+ //
+ // Note we query whether the access is *allowed*, not whether it is *fast*:
+ // this matches the historical behavior of forming unaligned loads whenever
+ // the target permits them, so it is a no-op for targets that allow unaligned
+ // access even when it is slow.
+ const Align LhsAlign = getMemCmpArgAlignment(CI, 0, *DL);
+ const Align RhsAlign = getMemCmpArgAlignment(CI, 1, *DL);
+ const Align MinAlign = std::min(LhsAlign, RhsAlign);
+ LLVMContext &Context = CI->getContext();
+ unsigned AS = CI->getArgOperand(0)->getType()->getPointerAddressSpace();
+ llvm::erase_if(Options.LoadSizes, [&](unsigned LoadSize) {
+ if (MinAlign >= LoadSize)
return false;
- }
+ return !TTI->allowsMisalignedMemoryAccesses(Context, LoadSize * 8, AS,
+ MinAlign);
+ });
+ // Byte loads are naturally aligned for any pointer, so at least the 1-byte
+ // size normally survives and remains useful for small compares: the number
+ // of loads is bounded by MaxNumLoads, and larger compares that would need
+ // too many byte loads fall back to the libcall in MemCmpExpansion.
+ if (Options.LoadSizes.empty())
+ return false;
MemCmpExpansion Expansion(CI, SizeVal, Options, IsUsedForZeroCmp, *DL, DTU);
>From 2e497c90da96e8acb820a9871063805e17f137e9 Mon Sep 17 00:00:00 2001
From: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: Thu, 16 Jul 2026 19:22:03 +0800
Subject: [PATCH 6/7] clang-format
---
llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp | 1 -
1 file changed, 1 deletion(-)
diff --git a/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp b/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
index 82a3b351b1850..136fef27ce846 100644
--- a/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
+++ b/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
@@ -56,7 +56,6 @@ static cl::opt<unsigned> MaxLoadsPerMemcmpOptSize(
namespace {
-
// Return the known alignment of the pointer argument \p ArgNo of \p CI,
// combining the alignment of the underlying pointer value with any align
// attribute on the call site itself.
>From dfe3d551a855349d605e9f2f27443d6425786782 Mon Sep 17 00:00:00 2001
From: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: Fri, 17 Jul 2026 11:42:19 +0800
Subject: [PATCH 7/7] [ExpandMemCmp] Clarify the empty-LoadSizes bailout
comment (NFC)
Reword the comment on the empty LoadSizes check to state its actual
purpose: it is a defensive guard so that we fall back to the libcall
rather than construct MemCmpExpansion with no load sizes, which its
constructor asserts against. In practice all in-tree targets include a
byte load size, which survives the alignment filter at any alignment.
Assisted-by: TRAE CLI (DeepSeek V4 Pro)
---
llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp b/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
index 136fef27ce846..a77da0e91ca4e 100644
--- a/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
+++ b/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
@@ -894,10 +894,10 @@ static bool expandMemCmp(CallInst *CI, const TargetTransformInfo *TTI,
return !TTI->allowsMisalignedMemoryAccesses(Context, LoadSize * 8, AS,
MinAlign);
});
- // Byte loads are naturally aligned for any pointer, so at least the 1-byte
- // size normally survives and remains useful for small compares: the number
- // of loads is bounded by MaxNumLoads, and larger compares that would need
- // too many byte loads fall back to the libcall in MemCmpExpansion.
+ // If the filter removed every load size, bail out to the libcall: the
+ // MemCmpExpansion constructor asserts that at least one load size remains.
+ // In practice all in-tree targets include a byte load size, which is
+ // accessible at any alignment and therefore always survives the filter.
if (Options.LoadSizes.empty())
return false;
More information about the llvm-commits
mailing list