[llvm] a0df86d - [RISCV] Add TuneNoDefaultUnroll to spacemit-x100 (#209069)

[via llvm-commits]

Author: Mark Zhuang
Date: 2026-07-13T18:28:21+08:00
New Revision: a0df86deb4295ff9ebebe54eb515bc49a7fb65f8

URL: https://github.com/llvm/llvm-project/commit/a0df86deb4295ff9ebebe54eb515bc49a7fb65f8
DIFF: https://github.com/llvm/llvm-project/commit/a0df86deb4295ff9ebebe54eb515bc49a7fb65f8.diff

LOG: [RISCV] Add TuneNoDefaultUnroll to spacemit-x100 (#209069)

In the spec2k6int tests, some subtests improved while others
regressed. The overall score shows a 0.7% gain. Given that
most OoO CPUs enable this feature by default, also enable
it by default for X100.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVProcessors.td

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVProcessors.td b/llvm/lib/Target/RISCV/RISCVProcessors.td
index daf7bcd0aad82..a006cea4c3157 100644
--- a/llvm/lib/Target/RISCV/RISCVProcessors.td
+++ b/llvm/lib/Target/RISCV/RISCVProcessors.td
@@ -938,6 +938,7 @@ def SPACEMIT_X100 : RISCVProcessorModel<"spacemit-x100",
                                          TuneOptimizedNF3SegmentLoadStore,
                                          TuneOptimizedNF4SegmentLoadStore,
                                          TuneVXRMPipelineFlush,
+                                         TuneNoDefaultUnroll,
                                          TuneFusionLogicRegReg,
                                          TuneFusionLogicRegImm,
                                          TuneFusionLogicImmReg,