[llvm] [AMDGPU] Select upper 16-bits for inline constants in packed BF16 (PR #209861)

[Changpeng Fang via llvm-commits]

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@@ -537,6 +537,14 @@ bool SIFoldOperandsImpl::tryFoldImmWithOpSel(MachineInstr *MI, unsigned UseOpNo,
     uint16_t Hi = static_cast<uint16_t>(Imm >> 16);
     if (Lo == Hi) {
       if (AMDGPU::isInlinableLiteralV216(Lo, OpType)) {
+        // Packed BF16 instructions using inline constant must use OPSEL to
+        // select the upper 16-bits
+        if (Opcode == AMDGPU::V_PK_ADD_BF16 ||
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changpeng wrote:

> Even if it is different I'd still make a check for operand type and then yet another target check like 'bf16 extends from top' or 'extends from bottom'. First it needs to be explicit. Second otherwise it may result in exponential explosion of checks. bf16 extending from the top is a failure of course.

Do you mean we need to introduce a target feature? Then is 'bf16 extends from upper fp32' okay? Thanks.

https://github.com/llvm/llvm-project/pull/209861