[llvm] [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (PR #208744)

[Sander de Smalen via llvm-commits]

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sdesmalen-arm wrote:

Thanks for the thorough explanation, from what you've explained the current change is sufficient.

>  found that if bf16 is added directly in the switch statement in useSVEForFixedLengthVectorVT, there would be many test failures

I tried this as well (returning `true` when `Subtarget->hasBF16()` is available) and actually found codegen to improve in several of the tests (yes this failed the tests, but those were all improvements). Is that what you saw?

https://github.com/llvm/llvm-project/pull/208744