[llvm] [RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (PR #204329)

[Fabian Ritter via llvm-commits]

ritter-x2a wrote:

> > An atomicrmw with elementwise "behaves as if it were expanded into one scalar atomicrmw per element";
> 
> We documented that sub-accesses are _unordered_ not in _arbitrary order_. So the sub-stores from an elementwise store do NOT need to be ordered in a consistent way when read by multiple independent reader threads. Which means e.g. on ARMv7 we may emit `dmb ish; str %p; str %p+4; dmb ish` for a `store ptr %p, <2 x i32> %value seq_cst`, rather than `dmb ish; str %p; dmb ish; str %p+4; dmb ish`, which permits the classic IRIW

I don't agree that the current wording for elementwise necessarily allows that. seq_cst accesses in different threads aren't intrinsically ordered either, but the seq_cst order needs to order them.
If this is the intended behavior, it needs to be said more clearly there.



https://github.com/llvm/llvm-project/pull/204329