[llvm] [AMDGPU] Model structured control-flow lane masks as i1 (PR #209158)

Christudasan Devadasan via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 13 06:08:02 PDT 2026


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@@ -339,10 +340,13 @@ define float @global_agent_atomic_fmax_ret_f32__amdgpu_no_fine_grained_memory(pt
 ; GFX942-NEXT:    buffer_inv sc1
 ; GFX942-NEXT:    v_cmp_eq_u32_e32 vcc, v3, v5
 ; GFX942-NEXT:    s_or_b64 s[0:1], vcc, s[0:1]
+; GFX942-NEXT:    s_andn2_b64 s[2:3], s[2:3], exec
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cdevadas wrote:

The use of s[2:3] could potentially corrupt the lanemask value because of the implicit def above. Should this be initialized to all ones instead?

https://github.com/llvm/llvm-project/pull/209158


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