[llvm] 0f6a60f - AMDGPU: Migrate MIR parser tests to new subarch triples (59) (#209819)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 16 01:05:37 PDT 2026
Author: Matt Arsenault
Date: 2026-07-16T10:05:32+02:00
New Revision: 0f6a60fd6a2f54e5af99bb5c7c85e794b2ff3841
URL: https://github.com/llvm/llvm-project/commit/0f6a60fd6a2f54e5af99bb5c7c85e794b2ff3841
DIFF: https://github.com/llvm/llvm-project/commit/0f6a60fd6a2f54e5af99bb5c7c85e794b2ff3841.diff
LOG: AMDGPU: Migrate MIR parser tests to new subarch triples (59) (#209819)
Mechanical migration by script.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Added:
Modified:
llvm/test/CodeGen/MIR/AMDGPU/cfi-pseudos.mir
llvm/test/CodeGen/MIR/AMDGPU/custom-pseudo-source-values.ll
llvm/test/CodeGen/MIR/AMDGPU/dead-flag-on-use-operand-parse-error.mir
llvm/test/CodeGen/MIR/AMDGPU/instr-mmra-error.mir
llvm/test/CodeGen/MIR/AMDGPU/instr-mmra.mir
llvm/test/CodeGen/MIR/AMDGPU/killed-flag-on-def-parse-error.mir
llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-after-pei.ll
llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-min-num-agprs.ll
llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
llvm/test/CodeGen/MIR/AMDGPU/machine-metadata.mir
llvm/test/CodeGen/MIR/AMDGPU/mircanon-memoperands.mir
llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-expect-id.mir
llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-parse.mir
llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-undefine-matadata.mir
llvm/test/CodeGen/MIR/AMDGPU/parse-cfi-unsigned-error.mir
llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-invalid-register-class-error.mir
llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-invalid-register-name-error.mir
llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-mfi.ll
llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-stack-type-error.mir
llvm/test/CodeGen/MIR/AMDGPU/ptradd-flags.mir
llvm/test/CodeGen/MIR/AMDGPU/s_wait_alu-errors.mir
llvm/test/CodeGen/MIR/AMDGPU/s_wait_alu.mir
llvm/test/CodeGen/MIR/AMDGPU/s_wait_loadcnt_dscnt-errors.mir
llvm/test/CodeGen/MIR/AMDGPU/s_wait_loadcnt_dscnt.mir
llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt-errors.mir
llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt.mir
llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt_soft.mir
llvm/test/CodeGen/MIR/AMDGPU/subreg-def-is-not-ssa.mir
llvm/test/CodeGen/MIR/AMDGPU/syncscopes.mir
llvm/test/CodeGen/MIR/AMDGPU/virtreg-uses-unallocatable-class.mir
llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-bad-phys.mir
llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-bad-split.mir
llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-self-split.mir
llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash.mir
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/cfi-pseudos.mir b/llvm/test/CodeGen/MIR/AMDGPU/cfi-pseudos.mir
index 65048d01b5e72..d747c097e31bc 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/cfi-pseudos.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/cfi-pseudos.mir
@@ -1,5 +1,5 @@
-# RUN: llc -mtriple=amdgcn -mcpu=gfx908 -run-pass=none -o - %s | \
-# RUN: llc -mtriple=amdgcn -mcpu=gfx908 -x=mir -run-pass=none -o - | \
+# RUN: llc -mtriple=amdgpu9.08 -run-pass=none -o - %s | \
+# RUN: llc -mtriple=amdgpu9.08 -x=mir -run-pass=none -o - | \
# RUN: FileCheck %s
# Verify we can parse and emit these CFI pseudos.
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/custom-pseudo-source-values.ll b/llvm/test/CodeGen/MIR/AMDGPU/custom-pseudo-source-values.ll
index ed57628fa721c..130e7eabf598c 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/custom-pseudo-source-values.ll
+++ b/llvm/test/CodeGen/MIR/AMDGPU/custom-pseudo-source-values.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -stop-after finalize-isel -o %t.mir %s
+; RUN: llc -mtriple=amdgpu10.10-mesa-mesa3d -stop-after finalize-isel -o %t.mir %s
; RUN: llc -run-pass=none -verify-machineinstrs %t.mir -o - | FileCheck %s
; Test that custom pseudo source values can be round trip serialized through MIR.
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/dead-flag-on-use-operand-parse-error.mir b/llvm/test/CodeGen/MIR/AMDGPU/dead-flag-on-use-operand-parse-error.mir
index f5d2aa17f267f..9b0df6fbffdaa 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/dead-flag-on-use-operand-parse-error.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/dead-flag-on-use-operand-parse-error.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -run-pass=none %s -filetype=null 2>&1 | FileCheck %s
+# RUN: not llc -mtriple=amdgpu9.08-amd-amdhsa -run-pass=none %s -filetype=null 2>&1 | FileCheck %s
---
name: foo
tracksRegLiveness: true
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/instr-mmra-error.mir b/llvm/test/CodeGen/MIR/AMDGPU/instr-mmra-error.mir
index 8d2d75136383c..851306620554c 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/instr-mmra-error.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/instr-mmra-error.mir
@@ -1,7 +1,7 @@
# RUN: split-file %s %t
-# RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -run-pass=none -filetype=null %t/expected-id.mir 2>&1 | FileCheck -check-prefix=ERR0 %s
-# RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -run-pass=none -filetype=null %t/undefined-id.mir 2>&1 | FileCheck -check-prefix=ERR1 %s
-# RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -run-pass=none -filetype=null %t/missing-comma.mir 2>&1 | FileCheck -check-prefix=ERR2 %s
+# RUN: not llc -mtriple=amdgpu10.10-amd-amdhsa -run-pass=none -filetype=null %t/expected-id.mir 2>&1 | FileCheck -check-prefix=ERR0 %s
+# RUN: not llc -mtriple=amdgpu10.10-amd-amdhsa -run-pass=none -filetype=null %t/undefined-id.mir 2>&1 | FileCheck -check-prefix=ERR1 %s
+# RUN: not llc -mtriple=amdgpu10.10-amd-amdhsa -run-pass=none -filetype=null %t/missing-comma.mir 2>&1 | FileCheck -check-prefix=ERR2 %s
;--- expected-id.mir
# ERR0: expected metadata id after '!'
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/instr-mmra.mir b/llvm/test/CodeGen/MIR/AMDGPU/instr-mmra.mir
index 433d43b69a817..62593255ea4ab 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/instr-mmra.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/instr-mmra.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -run-pass=none -o - %s | FileCheck %s
+# RUN: llc -mtriple=amdgpu10.10-amd-amdhsa -run-pass=none -o - %s | FileCheck %s
# This test ensures that the MIR parser parses mmra metadata correctly.
--- |
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/killed-flag-on-def-parse-error.mir b/llvm/test/CodeGen/MIR/AMDGPU/killed-flag-on-def-parse-error.mir
index 5645f64ef6c71..d819779421117 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/killed-flag-on-def-parse-error.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/killed-flag-on-def-parse-error.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -run-pass=none %s -filetype=null 2>&1 | FileCheck %s
+# RUN: not llc -mtriple=amdgpu9.08-amd-amdhsa -run-pass=none %s -filetype=null 2>&1 | FileCheck %s
---
name: foo
tracksRegLiveness: true
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-after-pei.ll b/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-after-pei.ll
index c76df38d34ab7..d8bb718866274 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-after-pei.ll
+++ b/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-after-pei.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -amdgpu-spill-sgpr-to-vgpr=0 -stop-after prolog-epilog -verify-machineinstrs %s -o - | FileCheck -check-prefix=AFTER-PEI %s
+; RUN: llc -mtriple=amdgpu6.00-mesa-mesa3d -amdgpu-spill-sgpr-to-vgpr=0 -stop-after prolog-epilog -verify-machineinstrs %s -o - | FileCheck -check-prefix=AFTER-PEI %s
; Test that the ScavengeFI is serialized in the SIMachineFunctionInfo.
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-min-num-agprs.ll b/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-min-num-agprs.ll
index c2c68ee30d631..cbad3034efea1 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-min-num-agprs.ll
+++ b/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-min-num-agprs.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -stop-after=finalize-isel -o %t.mir %s
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -run-pass=none %t.mir -o - | FileCheck %s
+; RUN: llc -mtriple=amdgpu9.0a-amd-amdhsa -stop-after=finalize-isel -o %t.mir %s
+; RUN: llc -mtriple=amdgpu9.0a-amd-amdhsa -run-pass=none %t.mir -o - | FileCheck %s
; minNumAGPRs is derived from the amdgpu-agpr-alloc attribute (only relevant on
; gfx90a+) and must survive the MIR round-trip.
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll b/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
index 7c978fa4e2b51..108a80950b59a 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
+++ b/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -stop-after=si-pre-allocate-wwm-regs -o %t.mir %s
+; RUN: llc -mtriple=amdgpu6.00-mesa-mesa3d -stop-after=si-pre-allocate-wwm-regs -o %t.mir %s
; RUN: llc -run-pass=none -verify-machineinstrs %t.mir -o - | FileCheck %s
; Test that SIMachineFunctionInfo can be round trip serialized through
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/machine-metadata.mir b/llvm/test/CodeGen/MIR/AMDGPU/machine-metadata.mir
index b54ae64032d42..eb0cb4fe77038 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/machine-metadata.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/machine-metadata.mir
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -run-pass=none -o - %s | FileCheck %s
+# RUN: llc -mtriple=amdgpu10.10-amd-amdhsa -run-pass=none -o - %s | FileCheck %s
--- |
; ModuleID = 'test/CodeGen/AMDGPU/memcpy-scoped-aa.ll'
source_filename = "test/CodeGen/AMDGPU/memcpy-scoped-aa.ll"
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/mircanon-memoperands.mir b/llvm/test/CodeGen/MIR/AMDGPU/mircanon-memoperands.mir
index aa30e20dd7f06..77f0a555d7b33 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/mircanon-memoperands.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/mircanon-memoperands.mir
@@ -1,5 +1,5 @@
-# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass mir-canonicalizer -verify-machineinstrs -o - %s | FileCheck %s
-# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass mir-canonicalizer -mir-vreg-namer-use-stable-hash -verify-machineinstrs -o - %s | FileCheck %s
+# RUN: llc -mtriple=amdgpu6.00 -run-pass mir-canonicalizer -verify-machineinstrs -o - %s | FileCheck %s
+# RUN: llc -mtriple=amdgpu6.00 -run-pass mir-canonicalizer -mir-vreg-namer-use-stable-hash -verify-machineinstrs -o - %s | FileCheck %s
--- |
target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-expect-id.mir b/llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-expect-id.mir
index c414bcd64d444..67f210fe29561 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-expect-id.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-expect-id.mir
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
-# RUN: not llc -mtriple=amdgcn -mcpu=gfx1200 -run-pass none -filetype=null %s 2>&1 | FileCheck %s
+# RUN: not llc -mtriple=amdgpu12.00 -run-pass none -filetype=null %s 2>&1 | FileCheck %s
--- |
define void @expect_id(ptr %ptr, float %data) #0 {
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-parse.mir b/llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-parse.mir
index 7fe6aa924cc21..18d2116788706 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-parse.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-parse.mir
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
-# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -run-pass=none -o - %s | FileCheck %s
+# RUN: llc -mtriple=amdgpu12.00 -run-pass=none -o - %s | FileCheck %s
--- |
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-undefine-matadata.mir b/llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-undefine-matadata.mir
index 50e96fa1c9101..ba1ed49609634 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-undefine-matadata.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-undefine-matadata.mir
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
-# RUN: not llc -mtriple=amdgcn -mcpu=gfx1200 -run-pass none -filetype=null %s 2>&1 | FileCheck %s
+# RUN: not llc -mtriple=amdgpu12.00 -run-pass none -filetype=null %s 2>&1 | FileCheck %s
--- |
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/parse-cfi-unsigned-error.mir b/llvm/test/CodeGen/MIR/AMDGPU/parse-cfi-unsigned-error.mir
index 18cb7c9d6c008..56f88ea255733 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/parse-cfi-unsigned-error.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/parse-cfi-unsigned-error.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -mtriple=amdgcn -mcpu=gfx908 -run-pass=none -filetype=null %s 2>&1 | FileCheck %s
+# RUN: not llc -mtriple=amdgpu9.08 -run-pass=none -filetype=null %s 2>&1 | FileCheck %s
# Test MIParser::parseCFIUnsigned
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-invalid-register-class-error.mir b/llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-invalid-register-class-error.mir
index e7c1740711952..1e8a264c49381 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-invalid-register-class-error.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-invalid-register-class-error.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx950 -run-pass=none -filetype=null %s 2>&1 | FileCheck %s
+# RUN: not llc -mtriple=amdgpu9.50-amd-amdhsa -run-pass=none -filetype=null %s 2>&1 | FileCheck %s
---
# CHECK: error: {{.*}} incorrect register class for field
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-invalid-register-name-error.mir b/llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-invalid-register-name-error.mir
index c74a437b5221c..fecb99d79f3ce 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-invalid-register-name-error.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-invalid-register-name-error.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx950 -run-pass=none -filetype=null %s 2>&1 | FileCheck %s
+# RUN: not llc -mtriple=amdgpu9.50-amd-amdhsa -run-pass=none -filetype=null %s 2>&1 | FileCheck %s
---
# CHECK: Invalid register name
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-mfi.ll b/llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-mfi.ll
index d96dcfc52e1b0..82566270e0af0 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-mfi.ll
+++ b/llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-mfi.ll
@@ -1,6 +1,6 @@
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx950 -stop-after=amdgpu-isel %s -o - | FileCheck --check-prefix=MIR %s
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx950 -stop-after=amdgpu-isel -o %t.mir %s
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx950 -start-after=amdgpu-isel -verify-machineinstrs %t.mir -o - | FileCheck --check-prefix=ASM %s
+; RUN: llc -mtriple=amdgpu9.50-amd-amdhsa -stop-after=amdgpu-isel %s -o - | FileCheck --check-prefix=MIR %s
+; RUN: llc -mtriple=amdgpu9.50-amd-amdhsa -stop-after=amdgpu-isel -o %t.mir %s
+; RUN: llc -mtriple=amdgpu9.50-amd-amdhsa -start-after=amdgpu-isel -verify-machineinstrs %t.mir -o - | FileCheck --check-prefix=ASM %s
; Test that kernarg preloading information is correctly serialized to MIR and
; can be round-tripped through MIR serialization/deserialization.
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-stack-type-error.mir b/llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-stack-type-error.mir
index 19076044170fd..54bf826c9c05c 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-stack-type-error.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-stack-type-error.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx950 -run-pass=none -filetype=null %s 2>&1 | FileCheck %s
+# RUN: not llc -mtriple=amdgpu9.50-amd-amdhsa -run-pass=none -filetype=null %s 2>&1 | FileCheck %s
---
# CHECK: error: {{.*}} firstKernArgPreloadReg must be a register, not a stack location
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/ptradd-flags.mir b/llvm/test/CodeGen/MIR/AMDGPU/ptradd-flags.mir
index 5c14cafbd7a87..50c9cdf38cbfd 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/ptradd-flags.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/ptradd-flags.mir
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
-# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=none %s -o - | FileCheck %s
+# RUN: llc -mtriple=amdgpu9.00 -run-pass=none %s -o - | FileCheck %s
---
name: nusw_ptr_add
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/s_wait_alu-errors.mir b/llvm/test/CodeGen/MIR/AMDGPU/s_wait_alu-errors.mir
index 8e375753acd7e..99071c062e3a3 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/s_wait_alu-errors.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/s_wait_alu-errors.mir
@@ -1,7 +1,7 @@
# RUN: split-file %s %t
;--- bad-expression.mir
-# RUN: not llc %t/bad-expression.mir -mtriple=amdgcn -mcpu=gfx1200 -run-pass=none -filetype=null 2>&1 | FileCheck %t/bad-expression.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/bad-expression.mir -mtriple=amdgpu12.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/bad-expression.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} expected <CounterName>_<CounterNum>
# CHECK-NEXT: S_WAITCNT_DEPCTR .BadExpression
@@ -13,7 +13,7 @@ body: |
...
;--- counter-too-large.mir
-# RUN: not llc %t/counter-too-large.mir -mtriple=amdgcn -mcpu=gfx1200 -run-pass=none -filetype=null 2>&1 | FileCheck %t/counter-too-large.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/counter-too-large.mir -mtriple=amdgpu12.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/counter-too-large.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} counter value too large
# CHECK-NEXT: S_WAITCNT_DEPCTR .VaVdst_99999
@@ -25,7 +25,7 @@ body: |
...
;--- expected-prefix.mir
-# RUN: not llc %t/expected-prefix.mir -mtriple=amdgcn -mcpu=gfx1200 -run-pass=none -filetype=null 2>&1 | FileCheck %t/expected-prefix.mir
+# RUN: not llc %t/expected-prefix.mir -mtriple=amdgpu12.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/expected-prefix.mir
---
# CHECK: error: {{.*}}
name: MissingDotPrefix
@@ -35,7 +35,7 @@ body: |
...
;--- invalid-counter-name.mir
-# RUN: not llc %t/invalid-counter-name.mir -mtriple=amdgcn -mcpu=gfx1200 -run-pass=none -filetype=null 2>&1 | FileCheck %t/invalid-counter-name.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/invalid-counter-name.mir -mtriple=amdgpu12.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/invalid-counter-name.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} invalid counter name
# CHECK-NEXT: S_WAITCNT_DEPCTR .InvalidCounterName_1
@@ -47,7 +47,7 @@ body: |
...
;--- non-integer-counter.mir
-# RUN: not llc %t/non-integer-counter.mir -mtriple=amdgcn -mcpu=gfx1200 -run-pass=none -filetype=null 2>&1 | FileCheck %t/non-integer-counter.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/non-integer-counter.mir -mtriple=amdgpu12.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/non-integer-counter.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} expected non-negative integer counter number
# CHECK-NEXT: S_WAITCNT_DEPCTR .VaVdst_BadCnt
@@ -59,7 +59,7 @@ body: |
...
;--- non-negative-integer-counter.mir
-# RUN: not llc %t/non-negative-integer-counter.mir -mtriple=amdgcn -mcpu=gfx1200 -run-pass=none -filetype=null 2>&1 | FileCheck %t/non-negative-integer-counter.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/non-negative-integer-counter.mir -mtriple=amdgpu12.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/non-negative-integer-counter.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} expected non-negative integer counter number
# CHECK-NEXT: S_WAITCNT_DEPCTR .VaVdst_-1
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/s_wait_alu.mir b/llvm/test/CodeGen/MIR/AMDGPU/s_wait_alu.mir
index e93a27ae51b84..c55280f213d4e 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/s_wait_alu.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/s_wait_alu.mir
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
-# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -run-pass=none %s -o - | FileCheck %s
+# RUN: llc -mtriple=amdgpu12.00 -run-pass=none %s -o - | FileCheck %s
---
name: va_vdst_0
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/s_wait_loadcnt_dscnt-errors.mir b/llvm/test/CodeGen/MIR/AMDGPU/s_wait_loadcnt_dscnt-errors.mir
index 71ef4caf5985c..aeebafc647ca6 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/s_wait_loadcnt_dscnt-errors.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/s_wait_loadcnt_dscnt-errors.mir
@@ -1,7 +1,7 @@
# RUN: split-file %s %t
;--- bad-expression.mir
-# RUN: not llc %t/bad-expression.mir -mtriple=amdgcn -mcpu=gfx1200 -run-pass=none -filetype=null 2>&1 | FileCheck %t/bad-expression.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/bad-expression.mir -mtriple=amdgpu12.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/bad-expression.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} expected <CounterName>_<CounterNum>
# CHECK-NEXT: S_WAIT_LOADCNT_DSCNT .BadExpression
@@ -13,7 +13,7 @@ body: |
...
;--- loadcnt-too-large.mir
-# RUN: not llc %t/loadcnt-too-large.mir -mtriple=amdgcn -mcpu=gfx1200 -run-pass=none -filetype=null 2>&1 | FileCheck %t/loadcnt-too-large.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/loadcnt-too-large.mir -mtriple=amdgpu12.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/loadcnt-too-large.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} counter value too large
# CHECK-NEXT: S_WAIT_LOADCNT_DSCNT .Loadcnt_99999
@@ -25,7 +25,7 @@ body: |
...
;--- dscnt-too-large.mir
-# RUN: not llc %t/dscnt-too-large.mir -mtriple=amdgcn -mcpu=gfx1200 -run-pass=none -filetype=null 2>&1 | FileCheck %t/dscnt-too-large.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/dscnt-too-large.mir -mtriple=amdgpu12.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/dscnt-too-large.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} counter value too large
# CHECK-NEXT: S_WAIT_LOADCNT_DSCNT .Dscnt_99999
@@ -37,7 +37,7 @@ body: |
...
;--- expected-prefix.mir
-# RUN: not llc %t/expected-prefix.mir -mtriple=amdgcn -mcpu=gfx1200 -run-pass=none -filetype=null 2>&1 | FileCheck %t/expected-prefix.mir
+# RUN: not llc %t/expected-prefix.mir -mtriple=amdgpu12.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/expected-prefix.mir
---
# CHECK: error: {{.*}}
name: MissingDotPrefix
@@ -47,7 +47,7 @@ body: |
...
;--- invalid-counter-name.mir
-# RUN: not llc %t/invalid-counter-name.mir -mtriple=amdgcn -mcpu=gfx1200 -run-pass=none -filetype=null 2>&1 | FileCheck %t/invalid-counter-name.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/invalid-counter-name.mir -mtriple=amdgpu12.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/invalid-counter-name.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} invalid counter name
# CHECK-NEXT: S_WAIT_LOADCNT_DSCNT .InvalidCounterName_1
@@ -59,7 +59,7 @@ body: |
...
;--- loadcnt-non-integer.mir
-# RUN: not llc %t/loadcnt-non-integer.mir -mtriple=amdgcn -mcpu=gfx1200 -run-pass=none -filetype=null 2>&1 | FileCheck %t/loadcnt-non-integer.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/loadcnt-non-integer.mir -mtriple=amdgpu12.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/loadcnt-non-integer.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} expected non-negative integer counter number
# CHECK-NEXT: S_WAIT_LOADCNT_DSCNT .Loadcnt_BadCnt
@@ -71,7 +71,7 @@ body: |
...
;--- dscnt-non-integer.mir
-# RUN: not llc %t/dscnt-non-integer.mir -mtriple=amdgcn -mcpu=gfx1200 -run-pass=none -filetype=null 2>&1 | FileCheck %t/dscnt-non-integer.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/dscnt-non-integer.mir -mtriple=amdgpu12.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/dscnt-non-integer.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} expected non-negative integer counter number
# CHECK-NEXT: S_WAIT_LOADCNT_DSCNT .Dscnt_BadCnt
@@ -83,7 +83,7 @@ body: |
...
;--- loadcnt-negative.mir
-# RUN: not llc %t/loadcnt-negative.mir -mtriple=amdgcn -mcpu=gfx1200 -run-pass=none -filetype=null 2>&1 | FileCheck %t/loadcnt-negative.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/loadcnt-negative.mir -mtriple=amdgpu12.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/loadcnt-negative.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} expected non-negative integer counter number
# CHECK-NEXT: S_WAIT_LOADCNT_DSCNT .Loadcnt_-1
@@ -95,7 +95,7 @@ body: |
...
;--- dscnt-negative.mir
-# RUN: not llc %t/dscnt-negative.mir -mtriple=amdgcn -mcpu=gfx1200 -run-pass=none -filetype=null 2>&1 | FileCheck %t/dscnt-negative.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/dscnt-negative.mir -mtriple=amdgpu12.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/dscnt-negative.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} expected non-negative integer counter number
# CHECK-NEXT: S_WAIT_LOADCNT_DSCNT .Dscnt_-1
@@ -107,7 +107,7 @@ body: |
...
;--- valid-loadcnt-invalid-dscnt.mir
-# RUN: not llc %t/valid-loadcnt-invalid-dscnt.mir -mtriple=amdgcn -mcpu=gfx1200 -run-pass=none -filetype=null 2>&1 | FileCheck %t/valid-loadcnt-invalid-dscnt.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/valid-loadcnt-invalid-dscnt.mir -mtriple=amdgpu12.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/valid-loadcnt-invalid-dscnt.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} counter value too large
# CHECK-NEXT: S_WAIT_LOADCNT_DSCNT .Loadcnt_0_Dscnt_99999
@@ -119,7 +119,7 @@ body: |
...
;--- valid-loadcnt-invalid-name.mir
-# RUN: not llc %t/valid-loadcnt-invalid-name.mir -mtriple=amdgcn -mcpu=gfx1200 -run-pass=none -filetype=null 2>&1 | FileCheck %t/valid-loadcnt-invalid-name.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/valid-loadcnt-invalid-name.mir -mtriple=amdgpu12.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/valid-loadcnt-invalid-name.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} invalid counter name
# CHECK-NEXT: S_WAIT_LOADCNT_DSCNT .Loadcnt_0_BadName_1
@@ -131,7 +131,7 @@ body: |
...
;--- valid-loadcnt-non-integer-dscnt.mir
-# RUN: not llc %t/valid-loadcnt-non-integer-dscnt.mir -mtriple=amdgcn -mcpu=gfx1200 -run-pass=none -filetype=null 2>&1 | FileCheck %t/valid-loadcnt-non-integer-dscnt.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/valid-loadcnt-non-integer-dscnt.mir -mtriple=amdgpu12.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/valid-loadcnt-non-integer-dscnt.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} expected non-negative integer counter number
# CHECK-NEXT: S_WAIT_LOADCNT_DSCNT .Loadcnt_0_Dscnt_abc
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/s_wait_loadcnt_dscnt.mir b/llvm/test/CodeGen/MIR/AMDGPU/s_wait_loadcnt_dscnt.mir
index 84d525b4e8164..bb526e9cf4ebd 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/s_wait_loadcnt_dscnt.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/s_wait_loadcnt_dscnt.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -run-pass=none %s -o - | FileCheck %s
+# RUN: llc -mtriple=amdgpu12.00 -run-pass=none %s -o - | FileCheck %s
---
name: loadcnt_0
body: |
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt-errors.mir b/llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt-errors.mir
index 9e36fa23c07a1..859d20ac434fe 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt-errors.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt-errors.mir
@@ -1,7 +1,7 @@
# RUN: split-file %s %t
;--- bad-expression.mir
-# RUN: not llc %t/bad-expression.mir -mtriple=amdgcn -mcpu=gfx900 -run-pass=none -filetype=null 2>&1 | FileCheck %t/bad-expression.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/bad-expression.mir -mtriple=amdgpu9.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/bad-expression.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} expected <CounterName>_<CounterNum>
# CHECK-NEXT: S_WAITCNT .BadExpression
@@ -13,7 +13,7 @@ body: |
...
;--- vmcnt-too-large.mir
-# RUN: not llc %t/vmcnt-too-large.mir -mtriple=amdgcn -mcpu=gfx900 -run-pass=none -filetype=null 2>&1 | FileCheck %t/vmcnt-too-large.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/vmcnt-too-large.mir -mtriple=amdgpu9.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/vmcnt-too-large.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} counter value too large
# CHECK-NEXT: S_WAITCNT .Vmcnt_99999
@@ -25,7 +25,7 @@ body: |
...
;--- expcnt-too-large.mir
-# RUN: not llc %t/expcnt-too-large.mir -mtriple=amdgcn -mcpu=gfx900 -run-pass=none -filetype=null 2>&1 | FileCheck %t/expcnt-too-large.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/expcnt-too-large.mir -mtriple=amdgpu9.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/expcnt-too-large.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} counter value too large
# CHECK-NEXT: S_WAITCNT .Expcnt_99999
@@ -37,7 +37,7 @@ body: |
...
;--- lgkmcnt-too-large.mir
-# RUN: not llc %t/lgkmcnt-too-large.mir -mtriple=amdgcn -mcpu=gfx900 -run-pass=none -filetype=null 2>&1 | FileCheck %t/lgkmcnt-too-large.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/lgkmcnt-too-large.mir -mtriple=amdgpu9.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/lgkmcnt-too-large.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} counter value too large
# CHECK-NEXT: S_WAITCNT .Lgkmcnt_99999
@@ -49,7 +49,7 @@ body: |
...
;--- expected-prefix.mir
-# RUN: not llc %t/expected-prefix.mir -mtriple=amdgcn -mcpu=gfx900 -run-pass=none -filetype=null 2>&1 | FileCheck %t/expected-prefix.mir
+# RUN: not llc %t/expected-prefix.mir -mtriple=amdgpu9.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/expected-prefix.mir
---
# CHECK: error: {{.*}}
name: MissingDotPrefix
@@ -59,7 +59,7 @@ body: |
...
;--- invalid-counter-name.mir
-# RUN: not llc %t/invalid-counter-name.mir -mtriple=amdgcn -mcpu=gfx900 -run-pass=none -filetype=null 2>&1 | FileCheck %t/invalid-counter-name.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/invalid-counter-name.mir -mtriple=amdgpu9.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/invalid-counter-name.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} invalid counter name
# CHECK-NEXT: S_WAITCNT .InvalidCounterName_1
@@ -71,7 +71,7 @@ body: |
...
;--- vmcnt-non-integer.mir
-# RUN: not llc %t/vmcnt-non-integer.mir -mtriple=amdgcn -mcpu=gfx900 -run-pass=none -filetype=null 2>&1 | FileCheck %t/vmcnt-non-integer.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/vmcnt-non-integer.mir -mtriple=amdgpu9.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/vmcnt-non-integer.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} expected non-negative integer counter number
# CHECK-NEXT: S_WAITCNT .Vmcnt_BadCnt
@@ -83,7 +83,7 @@ body: |
...
;--- expcnt-non-integer.mir
-# RUN: not llc %t/expcnt-non-integer.mir -mtriple=amdgcn -mcpu=gfx900 -run-pass=none -filetype=null 2>&1 | FileCheck %t/expcnt-non-integer.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/expcnt-non-integer.mir -mtriple=amdgpu9.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/expcnt-non-integer.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} expected non-negative integer counter number
# CHECK-NEXT: S_WAITCNT .Expcnt_BadCnt
@@ -95,7 +95,7 @@ body: |
...
;--- lgkmcnt-non-integer.mir
-# RUN: not llc %t/lgkmcnt-non-integer.mir -mtriple=amdgcn -mcpu=gfx900 -run-pass=none -filetype=null 2>&1 | FileCheck %t/lgkmcnt-non-integer.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/lgkmcnt-non-integer.mir -mtriple=amdgpu9.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/lgkmcnt-non-integer.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} expected non-negative integer counter number
# CHECK-NEXT: S_WAITCNT .Lgkmcnt_BadCnt
@@ -107,7 +107,7 @@ body: |
...
;--- vmcnt-negative.mir
-# RUN: not llc %t/vmcnt-negative.mir -mtriple=amdgcn -mcpu=gfx900 -run-pass=none -filetype=null 2>&1 | FileCheck %t/vmcnt-negative.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/vmcnt-negative.mir -mtriple=amdgpu9.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/vmcnt-negative.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} expected non-negative integer counter number
# CHECK-NEXT: S_WAITCNT .Vmcnt_-1
@@ -119,7 +119,7 @@ body: |
...
;--- expcnt-negative.mir
-# RUN: not llc %t/expcnt-negative.mir -mtriple=amdgcn -mcpu=gfx900 -run-pass=none -filetype=null 2>&1 | FileCheck %t/expcnt-negative.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/expcnt-negative.mir -mtriple=amdgpu9.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/expcnt-negative.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} expected non-negative integer counter number
# CHECK-NEXT: S_WAITCNT .Expcnt_-1
@@ -131,7 +131,7 @@ body: |
...
;--- lgkmcnt-negative.mir
-# RUN: not llc %t/lgkmcnt-negative.mir -mtriple=amdgcn -mcpu=gfx900 -run-pass=none -filetype=null 2>&1 | FileCheck %t/lgkmcnt-negative.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/lgkmcnt-negative.mir -mtriple=amdgpu9.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/lgkmcnt-negative.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} expected non-negative integer counter number
# CHECK-NEXT: S_WAITCNT .Lgkmcnt_-1
@@ -143,7 +143,7 @@ body: |
...
;--- valid-vmcnt-invalid-expcnt.mir
-# RUN: not llc %t/valid-vmcnt-invalid-expcnt.mir -mtriple=amdgcn -mcpu=gfx900 -run-pass=none -filetype=null 2>&1 | FileCheck %t/valid-vmcnt-invalid-expcnt.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/valid-vmcnt-invalid-expcnt.mir -mtriple=amdgpu9.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/valid-vmcnt-invalid-expcnt.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} counter value too large
# CHECK-NEXT: S_WAITCNT .Vmcnt_0_Expcnt_99999
@@ -155,7 +155,7 @@ body: |
...
;--- valid-vmcnt-expcnt-invalid-lgkmcnt.mir
-# RUN: not llc %t/valid-vmcnt-expcnt-invalid-lgkmcnt.mir -mtriple=amdgcn -mcpu=gfx900 -run-pass=none -filetype=null 2>&1 | FileCheck %t/valid-vmcnt-expcnt-invalid-lgkmcnt.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/valid-vmcnt-expcnt-invalid-lgkmcnt.mir -mtriple=amdgpu9.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/valid-vmcnt-expcnt-invalid-lgkmcnt.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} counter value too large
# CHECK-NEXT: S_WAITCNT .Vmcnt_0_Expcnt_0_Lgkmcnt_99999
@@ -167,7 +167,7 @@ body: |
...
;--- valid-vmcnt-invalid-name.mir
-# RUN: not llc %t/valid-vmcnt-invalid-name.mir -mtriple=amdgcn -mcpu=gfx900 -run-pass=none -filetype=null 2>&1 | FileCheck %t/valid-vmcnt-invalid-name.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/valid-vmcnt-invalid-name.mir -mtriple=amdgpu9.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/valid-vmcnt-invalid-name.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} invalid counter name
# CHECK-NEXT: S_WAITCNT .Vmcnt_0_BadName_1
@@ -179,7 +179,7 @@ body: |
...
;--- valid-vmcnt-expcnt-non-integer-lgkmcnt.mir
-# RUN: not llc %t/valid-vmcnt-expcnt-non-integer-lgkmcnt.mir -mtriple=amdgcn -mcpu=gfx900 -run-pass=none -filetype=null 2>&1 | FileCheck %t/valid-vmcnt-expcnt-non-integer-lgkmcnt.mir --strict-whitespace --match-full-lines
+# RUN: not llc %t/valid-vmcnt-expcnt-non-integer-lgkmcnt.mir -mtriple=amdgpu9.00 -run-pass=none -filetype=null 2>&1 | FileCheck %t/valid-vmcnt-expcnt-non-integer-lgkmcnt.mir --strict-whitespace --match-full-lines
---
# CHECK:error: {{.*}} expected non-negative integer counter number
# CHECK-NEXT: S_WAITCNT .Vmcnt_0_Expcnt_0_Lgkmcnt_abc
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt.mir b/llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt.mir
index 13ab0345e4fd8..692bfaa9a86cc 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt.mir
@@ -2,10 +2,10 @@
# Common tests that work on all targets
;--- common.mir
-# RUN: llc -mtriple=amdgcn -mcpu=gfx803 -run-pass=none %t/common.mir -o - | FileCheck %t/common.mir --check-prefix=CHECK
-# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=none %t/common.mir -o - | FileCheck %t/common.mir --check-prefix=CHECK
-# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -run-pass=none %t/common.mir -o - | FileCheck %t/common.mir --check-prefix=CHECK
-# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=none %t/common.mir -o - | FileCheck %t/common.mir --check-prefix=CHECK
+# RUN: llc -mtriple=amdgpu8.03 -run-pass=none %t/common.mir -o - | FileCheck %t/common.mir --check-prefix=CHECK
+# RUN: llc -mtriple=amdgpu9.00 -run-pass=none %t/common.mir -o - | FileCheck %t/common.mir --check-prefix=CHECK
+# RUN: llc -mtriple=amdgpu10.10 -run-pass=none %t/common.mir -o - | FileCheck %t/common.mir --check-prefix=CHECK
+# RUN: llc -mtriple=amdgpu11.00 -run-pass=none %t/common.mir -o - | FileCheck %t/common.mir --check-prefix=CHECK
---
name: vmcnt_0
body: |
@@ -113,7 +113,7 @@ body: |
# GFX8-specific: vmcnt max=15, lgkmcnt max=15
;--- gfx8.mir
-# RUN: llc -mtriple=amdgcn -mcpu=gfx803 -run-pass=none %t/gfx8.mir -o - | FileCheck %t/gfx8.mir
+# RUN: llc -mtriple=amdgpu8.03 -run-pass=none %t/gfx8.mir -o - | FileCheck %t/gfx8.mir
---
name: vmcnt_max-1
body: |
@@ -142,7 +142,7 @@ body: |
# GFX9-specific: vmcnt max=63, lgkmcnt max=15
;--- gfx9.mir
-# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=none %t/gfx9.mir -o - | FileCheck %t/gfx9.mir
+# RUN: llc -mtriple=amdgpu9.00 -run-pass=none %t/gfx9.mir -o - | FileCheck %t/gfx9.mir
---
name: vmcnt_max-1
body: |
@@ -171,7 +171,7 @@ body: |
# GFX10-specific: vmcnt max=63, lgkmcnt max=63
;--- gfx10.mir
-# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -run-pass=none %t/gfx10.mir -o - | FileCheck %t/gfx10.mir
+# RUN: llc -mtriple=amdgpu10.10 -run-pass=none %t/gfx10.mir -o - | FileCheck %t/gfx10.mir
---
name: vmcnt_max-1
body: |
@@ -200,7 +200,7 @@ body: |
# GFX11-specific: vmcnt max=63, lgkmcnt max=63 (
diff erent encoding than GFX10)
;--- gfx11.mir
-# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=none %t/gfx11.mir -o - | FileCheck %t/gfx11.mir
+# RUN: llc -mtriple=amdgpu11.00 -run-pass=none %t/gfx11.mir -o - | FileCheck %t/gfx11.mir
---
name: vmcnt_max-1
body: |
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt_soft.mir b/llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt_soft.mir
index 1067c872f4def..052e6cd855b9f 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt_soft.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt_soft.mir
@@ -2,10 +2,10 @@
# Common tests that work on all targets
;--- common.mir
-# RUN: llc -mtriple=amdgcn -mcpu=gfx803 -run-pass=none %t/common.mir -o - | FileCheck %t/common.mir --check-prefix=CHECK
-# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=none %t/common.mir -o - | FileCheck %t/common.mir --check-prefix=CHECK
-# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -run-pass=none %t/common.mir -o - | FileCheck %t/common.mir --check-prefix=CHECK
-# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=none %t/common.mir -o - | FileCheck %t/common.mir --check-prefix=CHECK
+# RUN: llc -mtriple=amdgpu8.03 -run-pass=none %t/common.mir -o - | FileCheck %t/common.mir --check-prefix=CHECK
+# RUN: llc -mtriple=amdgpu9.00 -run-pass=none %t/common.mir -o - | FileCheck %t/common.mir --check-prefix=CHECK
+# RUN: llc -mtriple=amdgpu10.10 -run-pass=none %t/common.mir -o - | FileCheck %t/common.mir --check-prefix=CHECK
+# RUN: llc -mtriple=amdgpu11.00 -run-pass=none %t/common.mir -o - | FileCheck %t/common.mir --check-prefix=CHECK
---
name: vmcnt_0
body: |
@@ -113,7 +113,7 @@ body: |
# GFX8-specific: vmcnt max=15, lgkmcnt max=15
;--- gfx8.mir
-# RUN: llc -mtriple=amdgcn -mcpu=gfx803 -run-pass=none %t/gfx8.mir -o - | FileCheck %t/gfx8.mir
+# RUN: llc -mtriple=amdgpu8.03 -run-pass=none %t/gfx8.mir -o - | FileCheck %t/gfx8.mir
---
name: vmcnt_max-1
body: |
@@ -142,7 +142,7 @@ body: |
# GFX9-specific: vmcnt max=63, lgkmcnt max=15
;--- gfx9.mir
-# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=none %t/gfx9.mir -o - | FileCheck %t/gfx9.mir
+# RUN: llc -mtriple=amdgpu9.00 -run-pass=none %t/gfx9.mir -o - | FileCheck %t/gfx9.mir
---
name: vmcnt_max-1
body: |
@@ -171,7 +171,7 @@ body: |
# GFX10-specific: vmcnt max=63, lgkmcnt max=63
;--- gfx10.mir
-# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -run-pass=none %t/gfx10.mir -o - | FileCheck %t/gfx10.mir
+# RUN: llc -mtriple=amdgpu10.10 -run-pass=none %t/gfx10.mir -o - | FileCheck %t/gfx10.mir
---
name: vmcnt_max-1
body: |
@@ -200,7 +200,7 @@ body: |
# GFX11-specific: vmcnt max=63, lgkmcnt max=63 (
diff erent encoding than GFX10)
;--- gfx11.mir
-# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=none %t/gfx11.mir -o - | FileCheck %t/gfx11.mir
+# RUN: llc -mtriple=amdgpu11.00 -run-pass=none %t/gfx11.mir -o - | FileCheck %t/gfx11.mir
---
name: vmcnt_max-1
body: |
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/subreg-def-is-not-ssa.mir b/llvm/test/CodeGen/MIR/AMDGPU/subreg-def-is-not-ssa.mir
index 4ea513bf4b32f..f572b2a898e8d 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/subreg-def-is-not-ssa.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/subreg-def-is-not-ssa.mir
@@ -1,5 +1,5 @@
# REQUIRES: asserts
-# RUN: not llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -filetype=null %s 2>&1 | FileCheck %s
+# RUN: not llc -mtriple=amdgpu9.00 -run-pass=instruction-select -verify-machineinstrs -filetype=null %s 2>&1 | FileCheck %s
# CHECK: MachineFunctionProperties required by InstructionSelect pass are not met by function subreg_def_is_not_ssa.
# CHECK-NEXT: Required properties: IsSSA
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/syncscopes.mir b/llvm/test/CodeGen/MIR/AMDGPU/syncscopes.mir
index c465d7fc77bed..603acd3e3efa6 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/syncscopes.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/syncscopes.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 -run-pass=none %s -o - | FileCheck --check-prefix=GCN %s
+# RUN: llc -mtriple=amdgpu8.03-amd-amdhsa -run-pass=none %s -o - | FileCheck --check-prefix=GCN %s
--- |
; ModuleID = '<stdin>'
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/virtreg-uses-unallocatable-class.mir b/llvm/test/CodeGen/MIR/AMDGPU/virtreg-uses-unallocatable-class.mir
index 8a0e7a3d1e2b0..0e028870c8361 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/virtreg-uses-unallocatable-class.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/virtreg-uses-unallocatable-class.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -mtriple=amdgcn-- -mcpu=gfx900 -run-pass=none -o - %s 2>&1 | FileCheck %s
+# RUN: not llc -mtriple=amdgpu9.00-- -run-pass=none -o - %s 2>&1 | FileCheck %s
# Check a diagnostic is emitted if non-allocatable classes are used
# with virtual registers, and there's no assert.
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-bad-phys.mir b/llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-bad-phys.mir
index 9dddfbf4fb6ca..ed1a4360b9d31 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-bad-phys.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-bad-phys.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=virtregmap \
+# RUN: not llc -mtriple=amdgpu11.00 -run-pass=virtregmap \
# RUN: -filetype=null %s 2>&1 | FileCheck %s
#
# 'assigned-phys' must be a physical register; passing a vreg should error.
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-bad-split.mir b/llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-bad-split.mir
index 494677f23f7d1..04a4b530b4004 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-bad-split.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-bad-split.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=virtregmap \
+# RUN: not llc -mtriple=amdgpu11.00 -run-pass=virtregmap \
# RUN: -filetype=null %s 2>&1 | FileCheck %s
#
# 'split-from' must reference a virtual register; physregs are rejected.
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-self-split.mir b/llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-self-split.mir
index a14c37e01b2e7..4ffbcb5830d7e 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-self-split.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-self-split.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=virtregmap \
+# RUN: not llc -mtriple=amdgpu11.00 -run-pass=virtregmap \
# RUN: -filetype=null %s 2>&1 | FileCheck %s
#
# 'split-from' must reference a
diff erent vreg than 'id'.
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash.mir b/llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash.mir
index a9272c92775a6..e33ae3e055663 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash.mir
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=virtregmap \
+# RUN: llc -mtriple=amdgpu11.00 -run-pass=virtregmap \
# RUN: -o - %s | FileCheck %s
#
# Verify that VirtRegMap state (split-from, assigned-phys) round-trips through
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