[llvm] [VPlan] Relax address constraints during stride analysis (PR #209168)
Luke Lau via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 14 02:43:55 PDT 2026
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@@ -7772,9 +7769,11 @@ void VPlanTransforms::convertToStridedAccesses(VPlan &Plan,
: GEPNoWrapFlags::none());
// Create a new vector pointer for strided access.
+ auto *PtrR = dyn_cast<VPRecipeWithIRFlags>(Ptr);
VPValue *NewPtr = Builder.createVectorPointer(
BasePtr, Type::getInt8Ty(Plan.getContext()), StrideInBytes,
- Ptr->getGEPNoWrapFlags(), Ptr->getDebugLoc());
+ PtrR ? PtrR->getGEPNoWrapFlagsOrNone() : GEPNoWrapFlags::none(),
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lukel97 wrote:
Yeah good point. Although I think this is a pre-existing issue. Might be cleanest to fix this in a separate PR
https://github.com/llvm/llvm-project/pull/209168
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