[llvm] [LoongArch] Add DAG combines for vector widening extends (PR #207316)

[via llvm-commits]

tangaac wrote:

LLVM ERROR: Cannot select: 0x55558b87f230: v8i32 = LoongArchISD::VEXTH_U 0x55558b87d440
  0x55558b87d440: v16i8,ch = load<(load (s128) from %ir.19, align 1, !tbaa !27)> 0x55558b8430a0, 0x55558b878380, undef:i64
    0x55558b878380: i64 = add 0x55558b87f460, Constant:i64<1>
      0x55558b87f460: i64,ch = CopyFromReg 0x55558b8430a0, Register:i64 %42



~~~llvm-ir
target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128"
target triple = "loongarch64-unknown-linux-gnu"

define fastcc void @_QFPcheck2() #0 {
.preheader49.1:
  %0 = shufflevector <16 x i8> zeroinitializer, <16 x i8> zeroinitializer, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
  %1 = zext <8 x i8> %0 to <8 x i32>
  store <8 x i32> %1, ptr null, align 4
  ret void
}

attributes #0 = { "target-features"="+relax,+64bit,+f,+d,+ual,+lsx,+lasx" }

~~~

https://github.com/llvm/llvm-project/pull/207316