[llvm] [RISCV] computeKnownBits - add support for RISCVISD::VECREDUCE_ADD_VL (PR #210493)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sun Jul 19 16:18:17 PDT 2026
================
@@ -24096,6 +24108,28 @@ void RISCVTargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
Known.Zero.setBitsFrom(Known2.countMaxActiveBits());
break;
}
+ case RISCVISD::VECREDUCE_ADD_VL: {
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topperc wrote:
VECREDUCE_ADD_VL result is a vector and the KnownBits result must be accurate for all elements. The result here is only accurate for element 0.
Maybe we need to handle VECREDUCE_ADD_VL+VMV_S_X together so we know only element 0 is used?
https://github.com/llvm/llvm-project/pull/210493
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