[llvm] [SelectionDAG] Fold VECREDUCE_MUL of a constant BUILD_VECTOR (PR #210126)

[Simon Pilgrim via llvm-commits]

RKSimon wrote:

> Also, do we need a similar test for ARM and X86 architectures

For constant folding there's less need for multi target testing - if RISCV has good VECREDUCE_MUL support I'd just focus there like VECREDUCE_ADD 

https://github.com/llvm/llvm-project/pull/210126