[llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)

[Lucas Ramirez via llvm-commits]

lucas-rami wrote:

> What is the motivation of doing this?

AFAIU on gfx1250 a `S_SET_VGPR_MSB` that immediately follows a `S_SETREG_IMM32_B32(MODE)` is silently dropped, so we have to insert a `S_NOP` in between in such cases, even when the two instructions are part of different blocks.
  

https://github.com/llvm/llvm-project/pull/209620