[llvm] [CodeGen] Expand unsupported (de)interleave intrinsics (PR #207439)

Paul Walker via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 17 04:03:30 PDT 2026


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@@ -13027,34 +12976,44 @@ void SelectionDAGBuilder::visitVectorReverse(const CallInst &I) {
 void SelectionDAGBuilder::visitVectorDeinterleave(const CallInst &I,
                                                   unsigned Factor) {
   auto DL = getCurSDLoc();
+  const TargetLowering &TLI = DAG.getTargetLoweringInfo();
   SDValue InVec = getValue(I.getOperand(0));
+  EVT InVT = InVec.getValueType();
 
   SmallVector<EVT, 4> ValueVTs;
-  ComputeValueVTs(DAG.getTargetLoweringInfo(), DAG.getDataLayout(), I.getType(),
-                  ValueVTs);
+  ComputeValueVTs(TLI, DAG.getDataLayout(), I.getType(), ValueVTs);
 
   EVT OutVT = ValueVTs[0];
   unsigned OutNumElts = OutVT.getVectorMinNumElements();
 
-  SmallVector<SDValue, 4> SubVecs(Factor);
-  for (unsigned i = 0; i != Factor; ++i) {
-    assert(ValueVTs[i] == OutVT && "Expected VTs to be the same");
-    SubVecs[i] = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, OutVT, InVec,
-                             DAG.getVectorIdxConstant(OutNumElts * i, DL));
-  }
-
-  // Use VECTOR_SHUFFLE for fixed-length vectors with factor of 2 to benefit
-  // from existing legalisation and combines.
-  if (OutVT.isFixedLengthVector() && Factor == 2) {
-    SDValue Even = DAG.getVectorShuffle(OutVT, DL, SubVecs[0], SubVecs[1],
-                                        createStrideMask(0, 2, OutNumElts));
-    SDValue Odd = DAG.getVectorShuffle(OutVT, DL, SubVecs[0], SubVecs[1],
-                                       createStrideMask(1, 2, OutNumElts));
-    SDValue Res = DAG.getMergeValues({Even, Odd}, getCurSDLoc());
-    setValue(&I, Res);
+  // Use VECTOR_SHUFFLE for fixed-length vectors that the target does not lower
----------------
paulwalker-arm wrote:

Can you put up a PR that shows the regressions? We're essentially talking about the same operation that can be written in two ways.  Perhaps a naive view but I'm not ready to believe we're not just missing some combines somewhere, be they post vector legalisation shuffle vector combines, or pre vector legalisation vector.(de)interleave combines.

https://github.com/llvm/llvm-project/pull/207439


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