[llvm] [X86][APX] Add EVEX BMI opcodes to isDefConvertible (PR #209699)

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git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/Target/X86/X86InstrInfo.cpp --diff_from_common_commit
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``````````diff
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 277755b51..21b956fc1 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -5227,10 +5227,10 @@ inline static bool isDefConvertible(const MachineInstr &MI, bool &NoSignFlag,
   case X86::BLSIC32rm:
   case X86::BLSIC64rr:
   case X86::BLSIC64rm:
-  CASE_EVEX(BZHI32rr)
-  CASE_EVEX(BZHI32rm)
-  CASE_EVEX(BZHI64rr)
-  CASE_EVEX(BZHI64rm)
+    CASE_EVEX(BZHI32rr)
+    CASE_EVEX(BZHI32rm)
+    CASE_EVEX(BZHI64rr)
+    CASE_EVEX(BZHI64rm)
   case X86::T1MSKC32rr:
   case X86::T1MSKC32rm:
   case X86::T1MSKC64rr:
@@ -5244,10 +5244,10 @@ inline static bool isDefConvertible(const MachineInstr &MI, bool &NoSignFlag,
     // overflow flag.
     ClearsOverflowFlag = true;
     return true;
-  CASE_EVEX(BEXTR32rr)
-  CASE_EVEX(BEXTR64rr)
-  CASE_EVEX(BEXTR32rm)
-  CASE_EVEX(BEXTR64rm)
+    CASE_EVEX(BEXTR32rr)
+    CASE_EVEX(BEXTR64rr)
+    CASE_EVEX(BEXTR32rm)
+    CASE_EVEX(BEXTR64rm)
   case X86::BEXTRI32ri:
   case X86::BEXTRI32mi:
   case X86::BEXTRI64ri:
@@ -5289,13 +5289,13 @@ static std::pair<X86::CondCode, unsigned> isUseDefConvertible(const MachineInstr
   case X86::BSR32rr:
   case X86::BSR64rr:
     return std::make_pair(X86::COND_E, 2U);
-  CASE_EVEX(BLSI32rr)
-  CASE_EVEX(BLSI64rr)
+    CASE_EVEX(BLSI32rr)
+    CASE_EVEX(BLSI64rr)
     return std::make_pair(X86::COND_AE, 1U);
-  CASE_EVEX(BLSR32rr)
-  CASE_EVEX(BLSR64rr)
-  CASE_EVEX(BLSMSK32rr)
-  CASE_EVEX(BLSMSK64rr)
+    CASE_EVEX(BLSR32rr)
+    CASE_EVEX(BLSR64rr)
+    CASE_EVEX(BLSMSK32rr)
+    CASE_EVEX(BLSMSK64rr)
     return std::make_pair(X86::COND_B, 1U);
     // TODO: TBM instructions.
   }

``````````

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https://github.com/llvm/llvm-project/pull/209699