[llvm] a64f741 - [SPIR-V][NewPM] Register SPIRVStructurizer with the new pass manager (#209965)
via llvm-commits
llvm-commits at lists.llvm.org
Sun Jul 19 22:23:01 PDT 2026
Author: Arseniy Obolenskiy
Date: 2026-07-20T07:22:56+02:00
New Revision: a64f7412551ae63a49dd8617f93ab89878288879
URL: https://github.com/llvm/llvm-project/commit/a64f7412551ae63a49dd8617f93ab89878288879
DIFF: https://github.com/llvm/llvm-project/commit/a64f7412551ae63a49dd8617f93ab89878288879.diff
LOG: [SPIR-V][NewPM] Register SPIRVStructurizer with the new pass manager (#209965)
Added:
Modified:
llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
llvm/test/CodeGen/SPIRV/structurizer/HLSLControlFlowHint-pass-check.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp b/llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
index f02bd261244aa..0e6f5ecab1437 100644
--- a/llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
@@ -23,7 +23,6 @@
#include "llvm/IR/IntrinsicInst.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/IR/IntrinsicsSPIRV.h"
-#include "llvm/IR/LegacyPassManager.h"
#include "llvm/InitializePasses.h"
#include "llvm/Transforms/Utils.h"
#include "llvm/Transforms/Utils/Cloning.h"
@@ -282,7 +281,10 @@ static void replaceBranchTargets(BasicBlock *BB, BasicBlock *OldTarget,
namespace {
// Given a reducible CFG, produces a structurized CFG in the SPIR-V sense,
// adding merge instructions when required.
-class SPIRVStructurizer : public FunctionPass {
+class SPIRVStructurizerImpl {
+ LoopInfo &LI;
+ ConvergenceRegionInfo &RegionInfo;
+
struct DivergentConstruct;
// Represents a list of condition/loops/switch constructs.
// See SPIR-V 2.11.2. Structured Control-flow Constructs for the list of
@@ -514,11 +516,7 @@ class SPIRVStructurizer : public FunctionPass {
// Add OpLoopMerge instruction on cycles.
bool addMergeForLoops(Function &F) {
- LoopInfo &LI = getAnalysis<LoopInfoWrapperPass>().getLoopInfo();
- auto *TopLevelRegion =
- getAnalysis<SPIRVConvergenceRegionAnalysisWrapperPass>()
- .getRegionInfo()
- .getTopLevelRegion();
+ auto *TopLevelRegion = RegionInfo.getTopLevelRegion();
bool Modified = false;
for (auto &BB : F) {
@@ -875,7 +873,6 @@ class SPIRVStructurizer : public FunctionPass {
}
bool splitCriticalEdges(Function &F) {
- LoopInfo &LI = getAnalysis<LoopInfoWrapperPass>().getLoopInfo();
Splitter S(F, LI);
DivergentConstruct Root;
@@ -1070,11 +1067,10 @@ class SPIRVStructurizer : public FunctionPass {
}
public:
- static char ID;
+ SPIRVStructurizerImpl(LoopInfo &LI, ConvergenceRegionInfo &RegionInfo)
+ : LI(LI), RegionInfo(RegionInfo) {}
- SPIRVStructurizer() : FunctionPass(ID) {}
-
- bool runOnFunction(Function &F) override {
+ bool run(Function &F) {
bool Modified = false;
// In LLVM, Switches are allowed to have several cases branching to the same
@@ -1140,15 +1136,6 @@ class SPIRVStructurizer : public FunctionPass {
return Modified;
}
- void getAnalysisUsage(AnalysisUsage &AU) const override {
- AU.addRequired<DominatorTreeWrapperPass>();
- AU.addRequired<LoopInfoWrapperPass>();
- AU.addRequired<SPIRVConvergenceRegionAnalysisWrapperPass>();
-
- AU.addPreserved<SPIRVConvergenceRegionAnalysisWrapperPass>();
- FunctionPass::getAnalysisUsage(AU);
- }
-
void createOpSelectMerge(IRBuilder<> *Builder, BlockAddress *MergeAddress) {
Instruction *BBTerminatorInst = Builder->GetInsertBlock()->getTerminator();
@@ -1168,6 +1155,30 @@ class SPIRVStructurizer : public FunctionPass {
{MergeAddress->getType()}, Args);
}
};
+
+class SPIRVStructurizer : public FunctionPass {
+public:
+ static char ID;
+
+ SPIRVStructurizer() : FunctionPass(ID) {}
+
+ bool runOnFunction(Function &F) override {
+ LoopInfo &LI = getAnalysis<LoopInfoWrapperPass>().getLoopInfo();
+ ConvergenceRegionInfo &RegionInfo =
+ getAnalysis<SPIRVConvergenceRegionAnalysisWrapperPass>()
+ .getRegionInfo();
+ return SPIRVStructurizerImpl(LI, RegionInfo).run(F);
+ }
+
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
+ AU.addRequired<DominatorTreeWrapperPass>();
+ AU.addRequired<LoopInfoWrapperPass>();
+ AU.addRequired<SPIRVConvergenceRegionAnalysisWrapperPass>();
+
+ AU.addPreserved<SPIRVConvergenceRegionAnalysisWrapperPass>();
+ FunctionPass::getAnalysisUsage(AU);
+ }
+};
} // anonymous namespace
char SPIRVStructurizer::ID = 0;
@@ -1187,14 +1198,11 @@ FunctionPass *llvm::createSPIRVStructurizerPass() {
}
PreservedAnalyses SPIRVStructurizerWrapper::run(Function &F,
- FunctionAnalysisManager &AF) {
-
- auto FPM = legacy::FunctionPassManager(F.getParent());
- FPM.add(createSPIRVStructurizerPass());
-
- if (!FPM.run(F))
- return PreservedAnalyses::all();
- PreservedAnalyses PA;
- PA.preserveSet<CFGAnalyses>();
- return PA;
+ FunctionAnalysisManager &AM) {
+ LoopInfo &LI = AM.getResult<LoopAnalysis>(F);
+ ConvergenceRegionInfo &RegionInfo =
+ AM.getResult<SPIRVConvergenceRegionAnalysis>(F);
+ return SPIRVStructurizerImpl(LI, RegionInfo).run(F)
+ ? PreservedAnalyses::none()
+ : PreservedAnalyses::all();
}
diff --git a/llvm/test/CodeGen/SPIRV/structurizer/HLSLControlFlowHint-pass-check.ll b/llvm/test/CodeGen/SPIRV/structurizer/HLSLControlFlowHint-pass-check.ll
index 9911b3119ce52..07a31b6c26f52 100644
--- a/llvm/test/CodeGen/SPIRV/structurizer/HLSLControlFlowHint-pass-check.ll
+++ b/llvm/test/CodeGen/SPIRV/structurizer/HLSLControlFlowHint-pass-check.ll
@@ -1,5 +1,14 @@
; RUN: opt -passes='spirv-structurizer' -S -mtriple=spirv-unknown-unknown %s | FileCheck %s
+; The structurizer modifies the CFG, so it must not claim to preserve
+; CFG-dependent analyses in the new pass manager.
+; RUN: opt -passes='spirv-structurizer' -disable-output -debug-pass-manager \
+; RUN: -mtriple=spirv-unknown-unknown %s 2>&1 | FileCheck %s --check-prefix=INVALIDATE
+; INVALIDATE: Running pass: SPIRVStructurizerWrapper on test_branch
+; INVALIDATE: Invalidating analysis: DominatorTreeAnalysis on test_branch
+; INVALIDATE: Invalidating analysis: LoopAnalysis on test_branch
+; INVALIDATE: Invalidating analysis: SPIRVConvergenceRegionAnalysis on test_branch
+
; CHECK-LABEL: define spir_func noundef i32 @test_branch
; CHECK: call void @llvm.spv.selection.merge.p0(ptr blockaddress(@test_branch, %if.end), i32 1)
; CHECK-NEXT: br i1 %cmp, label %if.then, label %if.else, !hlsl.controlflow.hint !{{[0-9]+}}
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