[llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)

[Lucas Ramirez via llvm-commits]

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@@ -432,23 +433,68 @@ AMDGPULowerVGPREncoding::handleCoissue(MachineBasicBlock::instr_iterator I) {
   return I;
 }
 
+/// Returns whether \p MI is a S_SETREG_IMM32_B32(MODE).
+static bool isSetregMode(const MachineInstr &MI, const SIInstrInfo &TII) {
+  if (MI.getOpcode() != AMDGPU::S_SETREG_IMM32_B32)
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lucas-rami wrote:

I understood that the need for a `S_NOP` only arises after a `S_SETREG_IMM32_B32` targeting MODE. This is at least what the pass does/implies everywhere at this point. Is that not true?

https://github.com/llvm/llvm-project/pull/209620