[llvm] [AMDGPU] Using feature to define vmem cacheline size (PR #207884)
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Mon Jul 13 02:32:37 PDT 2026
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@@ -2149,6 +2158,7 @@ def FeatureISAVersion12 : FeatureSet<
FeatureRealTrue16Insts,
FeatureMTBUFInsts,
FeatureFormattedMUBUFInsts,
+ FeatureDataCacheLineSize128
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Shoreshen wrote:
Hi @arsenm , I think the semantic match for this llvm.prefetch is vmem data cache instruction. Which is actually matching feature `VmemPrefInsts`.
If function returns 0, then no prefetch intrinsic will be created.
https://github.com/llvm/llvm-project/pull/207884
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