[llvm] [AMDGPU] Improve codegen for copysign(x, fneg(y)) (PR #207178)
Madhur Kumar via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 16 03:16:32 PDT 2026
================
@@ -2553,6 +2564,11 @@ def : GCNPat <
(V_AND_B32_e32 (S_MOV_B32 (i32 0x80008000)), VGPR_32:$src1)
>;
+def : GCNPat <
+ (DivergentBinFrag<fcopysign> build_vector_fpimm_pos_zero_v2<fp16vt> , (fneg fp16vt:$src1)),
----------------
MadhurKumar004 wrote:
There is no neg zero predicate, i used this to follow the other examples. Later i can fix all these cases in a separate PR(as you suggested)
https://github.com/llvm/llvm-project/pull/207178
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