[llvm] [VPlan] Introduce vputils::doesGeneratePerAllLanes (NFC) (PR #199047)
Ramkumar Ramachandra via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 17 10:32:41 PDT 2026
https://github.com/artagnon updated https://github.com/llvm/llvm-project/pull/199047
>From c2404a49a4495fb9d1cd962ff1b4fd9793cfc5ee Mon Sep 17 00:00:00 2001
From: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: Thu, 21 May 2026 10:42:46 -0400
Subject: [PATCH] [VPlan] Introduce vputils::doesGeneratePerAllLanes (NFC)
Introduce a query for recipes that must replicate for each part,
that returns true for non-single-scalar replicates, SIVSteps, and a
couple of VPInstructions.
---
llvm/lib/Transforms/Vectorize/VPlan.h | 17 ++++---
.../lib/Transforms/Vectorize/VPlanRecipes.cpp | 7 ++-
.../Transforms/Vectorize/VPlanTransforms.cpp | 9 +---
llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp | 7 +--
llvm/lib/Transforms/Vectorize/VPlanUtils.cpp | 10 ++++
llvm/lib/Transforms/Vectorize/VPlanUtils.h | 3 ++
.../LoopVectorize/VPlan/RISCV/expand-scev.ll | 42 ++++++++--------
.../VPlan/dissolve-replicate-regions.ll | 49 +++++++++----------
8 files changed, 75 insertions(+), 69 deletions(-)
diff --git a/llvm/lib/Transforms/Vectorize/VPlan.h b/llvm/lib/Transforms/Vectorize/VPlan.h
index b67d1a1281c14..13f47d72c5aef 100644
--- a/llvm/lib/Transforms/Vectorize/VPlan.h
+++ b/llvm/lib/Transforms/Vectorize/VPlan.h
@@ -1348,12 +1348,7 @@ class LLVM_ABI_FOR_TEST VPInstruction : public VPRecipeWithIRFlags,
OpsEnd = Intrinsic,
};
- /// Returns true if this VPInstruction generates scalar values for all lanes.
- /// Most VPInstructions generate a single value per part, either vector or
- /// scalar. VPReplicateRecipe takes care of generating multiple (scalar)
- /// values per all lanes, stemming from an original ingredient. This method
- /// identifies the (rare) cases of VPInstructions that do so as well, w/o an
- /// underlying ingredient.
+ /// Returns true if this recipe produces scalar values for all VF lanes.
bool doesGeneratePerAllLanes() const;
/// Return the number of operands determined by the opcode of the
@@ -1510,8 +1505,7 @@ class LLVM_ABI_FOR_TEST VPInstruction : public VPRecipeWithIRFlags,
/// e.g. by performing a reduction or extracting a lane.
bool isVectorToScalar() const;
- /// Returns true if this VPInstruction's operands are single scalars and the
- /// result is also a single scalar.
+ /// Returns true if the recipe produces a single scalar value.
bool isSingleScalar() const;
/// Returns the symbolic name assigned to the VPInstruction.
@@ -3432,8 +3426,12 @@ class LLVM_ABI_FOR_TEST VPReplicateRecipe : public VPRecipeWithIRFlags,
bool IsSingleScalar, ElementCount VF,
VPCostContext &Ctx);
+ /// Returns true if the recipe produces a single scalar value.
bool isSingleScalar() const { return IsSingleScalar; }
+ /// Returns true if the recipe produces scalar values for all VF lanes.
+ bool doesGeneratePerAllLanes() const { return !IsSingleScalar; }
+
bool isPredicated() const { return IsPredicated; }
/// Returns true if the recipe only uses the first lane of operand \p Op.
@@ -4267,6 +4265,9 @@ class LLVM_ABI_FOR_TEST VPScalarIVStepsRecipe : public VPRecipeWithIRFlags {
addOperand(StartIndex);
}
+ /// Returns true if this recipe produces scalar values for all VF lanes.
+ bool doesGeneratePerAllLanes() const;
+
/// Returns true if the recipe only uses the first lane of operand \p Op.
bool usesFirstLaneOnly(const VPValue *Op) const override {
assert(is_contained(operands(), Op) &&
diff --git a/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp b/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
index c62c4a082b95e..e51d8d7958f03 100644
--- a/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+++ b/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
@@ -690,7 +690,8 @@ unsigned VPInstruction::getNumOperandsForOpcode() const {
}
bool VPInstruction::doesGeneratePerAllLanes() const {
- return Opcode == VPInstruction::PtrAdd && !vputils::onlyFirstLaneUsed(this);
+ return Opcode == VPInstruction::Unpack ||
+ (Opcode == VPInstruction::PtrAdd && !vputils::onlyFirstLaneUsed(this));
}
bool VPInstruction::canGenerateScalarForFirstLane() const {
@@ -3047,6 +3048,10 @@ void VPDerivedIVRecipe::printRecipe(raw_ostream &O, const Twine &Indent,
}
#endif
+bool VPScalarIVStepsRecipe::doesGeneratePerAllLanes() const {
+ return !vputils::onlyFirstLaneUsed(this);
+}
+
InstructionCost VPScalarIVStepsRecipe::computeCost(ElementCount VF,
VPCostContext &Ctx) const {
// TODO: Add costs for floating point.
diff --git a/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp b/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
index 1dc13889af4d6..9421fd3637182 100644
--- a/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+++ b/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
@@ -5498,19 +5498,14 @@ void VPlanTransforms::materializePacksAndUnpacks(VPlan &Plan) {
for (VPBasicBlock *VPBB :
concat<VPBasicBlock *>(VPBBsOutsideLoopRegion, VPBBsInsideLoopRegion)) {
for (VPRecipeBase &R : make_early_inc_range(*VPBB)) {
- if (!isa<VPScalarIVStepsRecipe, VPReplicateRecipe, VPInstruction>(&R))
+ if (!vputils::doesGeneratePerAllLanes(&R))
continue;
auto *DefR = cast<VPSingleDefRecipe>(&R);
auto UsesVectorOrInsideReplicateRegion = [DefR, LoopRegion](VPUser *U) {
VPRegionBlock *ParentRegion = cast<VPRecipeBase>(U)->getRegion();
return !U->usesScalars(DefR) || ParentRegion != LoopRegion;
};
- if ((isa<VPReplicateRecipe>(DefR) &&
- cast<VPReplicateRecipe>(DefR)->isSingleScalar()) ||
- (isa<VPInstruction>(DefR) &&
- (vputils::onlyFirstLaneUsed(DefR) ||
- !cast<VPInstruction>(DefR)->doesGeneratePerAllLanes())) ||
- none_of(DefR->users(), UsesVectorOrInsideReplicateRegion))
+ if (none_of(DefR->users(), UsesVectorOrInsideReplicateRegion))
continue;
Type *ScalarTy = DefR->getScalarType();
diff --git a/llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp b/llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
index 4b63a212b808c..09acc1a605341 100644
--- a/llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
+++ b/llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
@@ -935,12 +935,7 @@ void VPlanTransforms::replicateByVF(VPlan &Plan, ElementCount VF) {
SmallVector<VPRecipeBase *> ToRemove;
for (VPBasicBlock *VPBB : VPBBsToUnroll) {
for (VPRecipeBase &R : make_early_inc_range(*VPBB)) {
- if (!isa<VPInstruction, VPReplicateRecipe, VPScalarIVStepsRecipe>(&R) ||
- (isa<VPReplicateRecipe>(&R) &&
- cast<VPReplicateRecipe>(&R)->isSingleScalar()) ||
- (isa<VPInstruction>(&R) &&
- !cast<VPInstruction>(&R)->doesGeneratePerAllLanes() &&
- cast<VPInstruction>(&R)->getOpcode() != VPInstruction::Unpack))
+ if (!vputils::doesGeneratePerAllLanes(&R))
continue;
auto *DefR = cast<VPSingleDefRecipe>(&R);
diff --git a/llvm/lib/Transforms/Vectorize/VPlanUtils.cpp b/llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
index 03e1ead89c169..553e28077e1ed 100644
--- a/llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
+++ b/llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
@@ -483,6 +483,16 @@ bool vputils::isUniformAcrossVFsAndUFs(const VPValue *V) {
});
}
+bool vputils::doesGeneratePerAllLanes(const VPRecipeBase *R) {
+ if (auto *RepR = dyn_cast<VPReplicateRecipe>(R))
+ return RepR->doesGeneratePerAllLanes();
+ if (auto *VPI = dyn_cast<VPInstruction>(R))
+ return VPI->doesGeneratePerAllLanes();
+ if (auto *SIVSteps = dyn_cast<VPScalarIVStepsRecipe>(R))
+ return SIVSteps->doesGeneratePerAllLanes();
+ return false;
+}
+
VPBasicBlock *vputils::getFirstLoopHeader(VPlan &Plan, VPDominatorTree &VPDT) {
auto DepthFirst = vp_depth_first_shallow(Plan.getEntry());
auto I = find_if(DepthFirst, [&VPDT](VPBlockBase *VPB) {
diff --git a/llvm/lib/Transforms/Vectorize/VPlanUtils.h b/llvm/lib/Transforms/Vectorize/VPlanUtils.h
index 2980b704ec8da..9f89abc717d66 100644
--- a/llvm/lib/Transforms/Vectorize/VPlanUtils.h
+++ b/llvm/lib/Transforms/Vectorize/VPlanUtils.h
@@ -64,6 +64,9 @@ bool isUniformAcrossVFsAndUFs(const VPValue *V);
/// Return true if \p V is elementwise, i.e. none of the lanes are permuted.
bool isElementwise(const VPValue *V);
+/// Returns true if \p R produces scalar values for all VF lanes.
+bool doesGeneratePerAllLanes(const VPRecipeBase *R);
+
/// Returns the header block of the first, top-level loop, or null if none
/// exist.
VPBasicBlock *getFirstLoopHeader(VPlan &Plan, VPDominatorTree &VPDT);
diff --git a/llvm/test/Transforms/LoopVectorize/VPlan/RISCV/expand-scev.ll b/llvm/test/Transforms/LoopVectorize/VPlan/RISCV/expand-scev.ll
index b41fb63c66677..b9494f6fdcf28 100644
--- a/llvm/test/Transforms/LoopVectorize/VPlan/RISCV/expand-scev.ll
+++ b/llvm/test/Transforms/LoopVectorize/VPlan/RISCV/expand-scev.ll
@@ -19,17 +19,16 @@ define void @scev_ptradd_strided(ptr noalias %a, ptr noalias %dst, i64 %n) {
; CHECK-NEXT: EMIT-SCALAR vp<%index> = phi [ ir<0>, vector.ph ], [ vp<%current.iteration.next>, vector.body ]
; CHECK-NEXT: EMIT-SCALAR vp<%avl> = phi [ ir<%n>, vector.ph ], [ vp<%avl.next>, vector.body ]
; CHECK-NEXT: EMIT-SCALAR vp<%evl> = EXPLICIT-VECTOR-LENGTH vp<%avl>
-; CHECK-NEXT: EMIT vp<[[VP3:%[0-9]+]]> = extractelement vp<%index>, ir<0>
-; CHECK-NEXT: EMIT vp<[[VP4:%[0-9]+]]> = shl nuw vp<%index>, ir<4>
-; CHECK-NEXT: EMIT vp<[[VP5:%[0-9]+]]> = ptradd nuw vp<[[VP2]]>, vp<[[VP4]]>
-; CHECK-NEXT: WIDEN-INTRINSIC vp<[[VP6:%[0-9]+]]> = call llvm.experimental.vp.strided.load(vp<[[VP5]]>, ir<16>, ir<true>, vp<%evl>)
-; CHECK-NEXT: CLONE ir<%gd> = getelementptr inbounds ir<%dst>, vp<[[VP3]]>
-; CHECK-NEXT: WIDEN vp.store ir<%gd>, vp<[[VP6]]>, vp<%evl>
-; CHECK-NEXT: EMIT-SCALAR vp<[[VP7:%[0-9]+]]> = zext vp<%evl> to i64
-; CHECK-NEXT: EMIT vp<%current.iteration.next> = add vp<[[VP7]]>, vp<%index>
-; CHECK-NEXT: EMIT vp<%avl.next> = sub nuw vp<%avl>, vp<[[VP7]]>
-; CHECK-NEXT: EMIT vp<[[VP8:%[0-9]+]]> = icmp eq vp<%avl.next>, ir<0>
-; CHECK-NEXT: EMIT branch-on-cond vp<[[VP8]]>
+; CHECK-NEXT: EMIT vp<[[VP3:%[0-9]+]]> = shl nuw vp<%index>, ir<4>
+; CHECK-NEXT: EMIT vp<[[VP4:%[0-9]+]]> = ptradd nuw vp<[[VP2]]>, vp<[[VP3]]>
+; CHECK-NEXT: WIDEN-INTRINSIC vp<[[VP5:%[0-9]+]]> = call llvm.experimental.vp.strided.load(vp<[[VP4]]>, ir<16>, ir<true>, vp<%evl>)
+; CHECK-NEXT: CLONE ir<%gd> = getelementptr inbounds ir<%dst>, vp<%index>
+; CHECK-NEXT: WIDEN vp.store ir<%gd>, vp<[[VP5]]>, vp<%evl>
+; CHECK-NEXT: EMIT-SCALAR vp<[[VP6:%[0-9]+]]> = zext vp<%evl> to i64
+; CHECK-NEXT: EMIT vp<%current.iteration.next> = add vp<[[VP6]]>, vp<%index>
+; CHECK-NEXT: EMIT vp<%avl.next> = sub nuw vp<%avl>, vp<[[VP6]]>
+; CHECK-NEXT: EMIT vp<[[VP7:%[0-9]+]]> = icmp eq vp<%avl.next>, ir<0>
+; CHECK-NEXT: EMIT branch-on-cond vp<[[VP7]]>
; CHECK-NEXT: Successor(s): middle.block, vector.body
; CHECK-EMPTY:
; CHECK-NEXT: middle.block:
@@ -74,17 +73,16 @@ define void @scev_ptradd_strided_var_offset(ptr noalias %a, ptr noalias %dst, i6
; CHECK-NEXT: EMIT-SCALAR vp<%index> = phi [ ir<0>, vector.ph ], [ vp<%current.iteration.next>, vector.body ]
; CHECK-NEXT: EMIT-SCALAR vp<%avl> = phi [ ir<%n>, vector.ph ], [ vp<%avl.next>, vector.body ]
; CHECK-NEXT: EMIT-SCALAR vp<%evl> = EXPLICIT-VECTOR-LENGTH vp<%avl>
-; CHECK-NEXT: EMIT vp<[[VP5:%[0-9]+]]> = extractelement vp<%index>, ir<0>
-; CHECK-NEXT: EMIT vp<[[VP6:%[0-9]+]]> = shl vp<%index>, ir<4>
-; CHECK-NEXT: EMIT vp<[[VP7:%[0-9]+]]> = ptradd vp<[[VP4]]>, vp<[[VP6]]>
-; CHECK-NEXT: WIDEN-INTRINSIC vp<[[VP8:%[0-9]+]]> = call llvm.experimental.vp.strided.load(vp<[[VP7]]>, ir<16>, ir<true>, vp<%evl>)
-; CHECK-NEXT: CLONE ir<%gd> = getelementptr inbounds ir<%dst>, vp<[[VP5]]>
-; CHECK-NEXT: WIDEN vp.store ir<%gd>, vp<[[VP8]]>, vp<%evl>
-; CHECK-NEXT: EMIT-SCALAR vp<[[VP9:%[0-9]+]]> = zext vp<%evl> to i64
-; CHECK-NEXT: EMIT vp<%current.iteration.next> = add vp<[[VP9]]>, vp<%index>
-; CHECK-NEXT: EMIT vp<%avl.next> = sub nuw vp<%avl>, vp<[[VP9]]>
-; CHECK-NEXT: EMIT vp<[[VP10:%[0-9]+]]> = icmp eq vp<%avl.next>, ir<0>
-; CHECK-NEXT: EMIT branch-on-cond vp<[[VP10]]>
+; CHECK-NEXT: EMIT vp<[[VP5:%[0-9]+]]> = shl vp<%index>, ir<4>
+; CHECK-NEXT: EMIT vp<[[VP6:%[0-9]+]]> = ptradd vp<[[VP4]]>, vp<[[VP5]]>
+; CHECK-NEXT: WIDEN-INTRINSIC vp<[[VP7:%[0-9]+]]> = call llvm.experimental.vp.strided.load(vp<[[VP6]]>, ir<16>, ir<true>, vp<%evl>)
+; CHECK-NEXT: CLONE ir<%gd> = getelementptr inbounds ir<%dst>, vp<%index>
+; CHECK-NEXT: WIDEN vp.store ir<%gd>, vp<[[VP7]]>, vp<%evl>
+; CHECK-NEXT: EMIT-SCALAR vp<[[VP8:%[0-9]+]]> = zext vp<%evl> to i64
+; CHECK-NEXT: EMIT vp<%current.iteration.next> = add vp<[[VP8]]>, vp<%index>
+; CHECK-NEXT: EMIT vp<%avl.next> = sub nuw vp<%avl>, vp<[[VP8]]>
+; CHECK-NEXT: EMIT vp<[[VP9:%[0-9]+]]> = icmp eq vp<%avl.next>, ir<0>
+; CHECK-NEXT: EMIT branch-on-cond vp<[[VP9]]>
; CHECK-NEXT: Successor(s): middle.block, vector.body
; CHECK-EMPTY:
; CHECK-NEXT: middle.block:
diff --git a/llvm/test/Transforms/LoopVectorize/VPlan/dissolve-replicate-regions.ll b/llvm/test/Transforms/LoopVectorize/VPlan/dissolve-replicate-regions.ll
index 13a62e0ffd49c..bb7e7af001f83 100644
--- a/llvm/test/Transforms/LoopVectorize/VPlan/dissolve-replicate-regions.ll
+++ b/llvm/test/Transforms/LoopVectorize/VPlan/dissolve-replicate-regions.ll
@@ -108,64 +108,63 @@ define void @predicated_load(i1 %c, ptr %ptr, ptr %dst) {
; VECTOR-EMPTY:
; VECTOR-NEXT: vector.body:
; VECTOR-NEXT: vp<[[VP7:%[0-9]+]]> = SCALAR-STEPS vp<[[VP6]]>, ir<1>, vp<[[VP0]]>
-; VECTOR-NEXT: vp<[[VP8:%[0-9]+]]> = SCALAR-STEPS vp<[[VP6]]>, ir<1>, vp<[[VP0]]>, ir<1>
; VECTOR-NEXT: EMIT branch-on-cond ir<%c>
; VECTOR-NEXT: Successor(s): pred.load.if, pred.load.continue
; VECTOR-EMPTY:
; VECTOR-NEXT: pred.load.if:
-; VECTOR-NEXT: vp<[[VP10:%[0-9]+]]> = SCALAR-STEPS vp<[[VP6]]>, ir<1>, vp<[[VP0]]>
-; VECTOR-NEXT: CLONE ir<%gep> = getelementptr ir<%ptr>, vp<[[VP10]]>
+; VECTOR-NEXT: vp<[[VP9:%[0-9]+]]> = SCALAR-STEPS vp<[[VP6]]>, ir<1>, vp<[[VP0]]>
+; VECTOR-NEXT: CLONE ir<%gep> = getelementptr ir<%ptr>, vp<[[VP9]]>
; VECTOR-NEXT: CLONE ir<%lv> = load ir<%gep>
-; VECTOR-NEXT: EMIT vp<[[VP11:%[0-9]+]]> = insertelement ir<poison>, ir<%lv>, ir<0>
+; VECTOR-NEXT: EMIT vp<[[VP10:%[0-9]+]]> = insertelement ir<poison>, ir<%lv>, ir<0>
; VECTOR-NEXT: Successor(s): pred.load.continue
; VECTOR-EMPTY:
; VECTOR-NEXT: pred.load.continue:
-; VECTOR-NEXT: WIDEN-PHI vp<[[VP12:%[0-9]+]]> = phi [ ir<poison>, vector.body ], [ vp<[[VP11]]>, pred.load.if ]
+; VECTOR-NEXT: WIDEN-PHI vp<[[VP11:%[0-9]+]]> = phi [ ir<poison>, vector.body ], [ vp<[[VP10]]>, pred.load.if ]
; VECTOR-NEXT: EMIT branch-on-cond ir<%c>
; VECTOR-NEXT: Successor(s): pred.load.if, pred.load.continue
; VECTOR-EMPTY:
; VECTOR-NEXT: pred.load.if:
-; VECTOR-NEXT: vp<[[VP14:%[0-9]+]]> = SCALAR-STEPS vp<[[VP6]]>, ir<1>, vp<[[VP0]]>, ir<1>
-; VECTOR-NEXT: CLONE ir<%gep>.1 = getelementptr ir<%ptr>, vp<[[VP14]]>
+; VECTOR-NEXT: vp<[[VP13:%[0-9]+]]> = SCALAR-STEPS vp<[[VP6]]>, ir<1>, vp<[[VP0]]>, ir<1>
+; VECTOR-NEXT: CLONE ir<%gep>.1 = getelementptr ir<%ptr>, vp<[[VP13]]>
; VECTOR-NEXT: CLONE ir<%lv>.1 = load ir<%gep>.1
-; VECTOR-NEXT: EMIT vp<[[VP15:%[0-9]+]]> = insertelement vp<[[VP12]]>, ir<%lv>.1, ir<1>
+; VECTOR-NEXT: EMIT vp<[[VP14:%[0-9]+]]> = insertelement vp<[[VP11]]>, ir<%lv>.1, ir<1>
; VECTOR-NEXT: Successor(s): pred.load.continue
; VECTOR-EMPTY:
; VECTOR-NEXT: pred.load.continue:
-; VECTOR-NEXT: WIDEN-PHI vp<[[VP16:%[0-9]+]]> = phi [ vp<[[VP12]]>, pred.load.continue ], [ vp<[[VP15]]>, pred.load.if ]
+; VECTOR-NEXT: WIDEN-PHI vp<[[VP15:%[0-9]+]]> = phi [ vp<[[VP11]]>, pred.load.continue ], [ vp<[[VP14]]>, pred.load.if ]
; VECTOR-NEXT: EMIT branch-on-cond ir<%c>
; VECTOR-NEXT: Successor(s): pred.load.if, pred.load.continue
; VECTOR-EMPTY:
; VECTOR-NEXT: pred.load.if:
-; VECTOR-NEXT: vp<[[VP18:%[0-9]+]]> = SCALAR-STEPS vp<[[VP6]]>, ir<1>, vp<[[VP0]]>, vp<[[VP0]]>
-; VECTOR-NEXT: CLONE ir<%gep>.2 = getelementptr ir<%ptr>, vp<[[VP18]]>
+; VECTOR-NEXT: vp<[[VP17:%[0-9]+]]> = SCALAR-STEPS vp<[[VP6]]>, ir<1>, vp<[[VP0]]>, vp<[[VP0]]>
+; VECTOR-NEXT: CLONE ir<%gep>.2 = getelementptr ir<%ptr>, vp<[[VP17]]>
; VECTOR-NEXT: CLONE ir<%lv>.2 = load ir<%gep>.2
-; VECTOR-NEXT: EMIT vp<[[VP19:%[0-9]+]]> = insertelement ir<poison>, ir<%lv>.2, ir<0>
+; VECTOR-NEXT: EMIT vp<[[VP18:%[0-9]+]]> = insertelement ir<poison>, ir<%lv>.2, ir<0>
; VECTOR-NEXT: Successor(s): pred.load.continue
; VECTOR-EMPTY:
; VECTOR-NEXT: pred.load.continue:
-; VECTOR-NEXT: WIDEN-PHI vp<[[VP20:%[0-9]+]]> = phi [ ir<poison>, pred.load.continue ], [ vp<[[VP19]]>, pred.load.if ]
+; VECTOR-NEXT: WIDEN-PHI vp<[[VP19:%[0-9]+]]> = phi [ ir<poison>, pred.load.continue ], [ vp<[[VP18]]>, pred.load.if ]
; VECTOR-NEXT: EMIT branch-on-cond ir<%c>
; VECTOR-NEXT: Successor(s): pred.load.if, pred.load.continue
; VECTOR-EMPTY:
; VECTOR-NEXT: pred.load.if:
-; VECTOR-NEXT: EMIT vp<[[VP22:%[0-9]+]]> = add vp<[[VP0]]>, ir<1>
-; VECTOR-NEXT: vp<[[VP23:%[0-9]+]]> = SCALAR-STEPS vp<[[VP6]]>, ir<1>, vp<[[VP0]]>, vp<[[VP22]]>
-; VECTOR-NEXT: CLONE ir<%gep>.3 = getelementptr ir<%ptr>, vp<[[VP23]]>
+; VECTOR-NEXT: EMIT vp<[[VP21:%[0-9]+]]> = add vp<[[VP0]]>, ir<1>
+; VECTOR-NEXT: vp<[[VP22:%[0-9]+]]> = SCALAR-STEPS vp<[[VP6]]>, ir<1>, vp<[[VP0]]>, vp<[[VP21]]>
+; VECTOR-NEXT: CLONE ir<%gep>.3 = getelementptr ir<%ptr>, vp<[[VP22]]>
; VECTOR-NEXT: CLONE ir<%lv>.3 = load ir<%gep>.3
-; VECTOR-NEXT: EMIT vp<[[VP24:%[0-9]+]]> = insertelement vp<[[VP20]]>, ir<%lv>.3, ir<1>
+; VECTOR-NEXT: EMIT vp<[[VP23:%[0-9]+]]> = insertelement vp<[[VP19]]>, ir<%lv>.3, ir<1>
; VECTOR-NEXT: Successor(s): pred.load.continue
; VECTOR-EMPTY:
; VECTOR-NEXT: pred.load.continue:
-; VECTOR-NEXT: WIDEN-PHI vp<[[VP25:%[0-9]+]]> = phi [ vp<[[VP20]]>, pred.load.continue ], [ vp<[[VP24]]>, pred.load.if ]
-; VECTOR-NEXT: BLEND ir<%pred.val> = ir<0> vp<%16>/vp<[[VP5]]>
-; VECTOR-NEXT: BLEND ir<%pred.val>.1 = ir<0> vp<%25>/vp<[[VP5]]>
+; VECTOR-NEXT: WIDEN-PHI vp<[[VP24:%[0-9]+]]> = phi [ vp<[[VP19]]>, pred.load.continue ], [ vp<[[VP23]]>, pred.load.if ]
+; VECTOR-NEXT: BLEND ir<%pred.val> = ir<0> vp<%15>/vp<[[VP5]]>
+; VECTOR-NEXT: BLEND ir<%pred.val>.1 = ir<0> vp<%24>/vp<[[VP5]]>
; VECTOR-NEXT: CLONE ir<%gep.dst> = getelementptr ir<%dst>, vp<[[VP7]]>
-; VECTOR-NEXT: EMIT vp<[[VP26:%[0-9]+]]> = mul nuw nsw vp<[[VP0]]>, ir<1>
-; VECTOR-NEXT: vp<[[VP27:%[0-9]+]]> = vector-pointer ir<%gep.dst>, ir<1>
-; VECTOR-NEXT: vp<[[VP28:%[0-9]+]]> = vector-pointer ir<%gep.dst>, ir<1>, vp<[[VP26]]>
-; VECTOR-NEXT: WIDEN store vp<[[VP27]]>, ir<%pred.val>
-; VECTOR-NEXT: WIDEN store vp<[[VP28]]>, ir<%pred.val>.1
+; VECTOR-NEXT: EMIT vp<[[VP25:%[0-9]+]]> = mul nuw nsw vp<[[VP0]]>, ir<1>
+; VECTOR-NEXT: vp<[[VP26:%[0-9]+]]> = vector-pointer ir<%gep.dst>, ir<1>
+; VECTOR-NEXT: vp<[[VP27:%[0-9]+]]> = vector-pointer ir<%gep.dst>, ir<1>, vp<[[VP25]]>
+; VECTOR-NEXT: WIDEN store vp<[[VP26]]>, ir<%pred.val>
+; VECTOR-NEXT: WIDEN store vp<[[VP27]]>, ir<%pred.val>.1
; VECTOR-NEXT: EMIT vp<%index.next> = add nuw vp<[[VP6]]>, vp<[[VP1]]>
; VECTOR-NEXT: EMIT branch-on-count vp<%index.next>, vp<[[VP2]]>
; VECTOR-NEXT: No successors
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