[llvm] [X86] Select i8 ANDN via i32 promotion (PR #205050)
Phoebe Wang via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 15 04:23:53 PDT 2026
================
@@ -51954,6 +51954,52 @@ static SDValue combineAndNotIntoANDNP(SDNode *N, const SDLoc &DL,
return DAG.getNode(X86ISD::ANDNP, DL, VT, X, Y);
}
+static SDValue combineI8AndNotIntoI32AndNot(SDNode *N, const SDLoc &DL,
+ SelectionDAG &DAG,
+ const X86Subtarget &Subtarget) {
+ assert(N->getOpcode() == ISD::AND && "Unexpected opcode combine into ANDN");
+
+ if (!Subtarget.hasBMI() || N->getValueType(0) != MVT::i8)
+ return SDValue();
+
+ // Keep compare and mask-lowering idioms in their existing byte forms.
+ for (SDUse &Use : N->uses()) {
+ if (Use.getResNo() != 0)
+ continue;
+ SDNode *User = Use.getUser();
+ if (User->getOpcode() == ISD::SETCC)
----------------
phoebewang wrote:
Do we have test case for it?
https://github.com/llvm/llvm-project/pull/205050
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