[llvm] [BPF] Select atomic_fetch_add for i64 monotonic atomicrmw with used result (PR #210371)
Gustas JanuĊĦonis via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 17 09:43:18 PDT 2026
https://github.com/LeGusto created https://github.com/llvm/llvm-project/pull/210371
A monotonic atomicrmw add on i64 for BPF would always convert to a non-FETCH instruction, even if the return value is used. Fixed by splitting the monotonic i64 add mapping depending on the outcome of binop_no_use / binop_has_use, which was already being used for and/or/xor i64 ops.
Fixes #210280
Assisted-by: Claude (Anthropic)
>From 6a2c3189ce2a7d4fcd9b27deb104f18f7774e480 Mon Sep 17 00:00:00 2001
From: LeGusto <janusonis.gustas at gmail.com>
Date: Fri, 17 Jul 2026 19:41:59 +0300
Subject: [PATCH] [BPF] Select atomic_fetch_add for i64 monotonic atomicrmw
with used result
A monotonic atomicrmw add on i64 for BPF would always convert to a non-FETCH instruction, even if the return value is used. Fixed by splitting the monotonic i64 add mapping depending on the outcome of binop_no_use / binop_has_use, which was already being used for and/or/xor i64 ops.
Fixes #210280
Assisted-by: Claude (Anthropic)
---
llvm/lib/Target/BPF/BPFInstrInfo.td | 23 +++++++++++--------
llvm/test/CodeGen/BPF/atomics_mem_order_v3.ll | 2 +-
2 files changed, 14 insertions(+), 11 deletions(-)
diff --git a/llvm/lib/Target/BPF/BPFInstrInfo.td b/llvm/lib/Target/BPF/BPFInstrInfo.td
index c86b45ee93cc6..9f821954c254b 100644
--- a/llvm/lib/Target/BPF/BPFInstrInfo.td
+++ b/llvm/lib/Target/BPF/BPFInstrInfo.td
@@ -1047,16 +1047,6 @@ let Predicates = [BPFHasALU32] in {
] in {
def : Pat<(P[0] ADDRri:$addr, GPR32:$val), (P[1] ADDRri:$addr, (NEG_32 GPR32:$val))>;
}
-
- foreach P = [// add
- [atomic_load_add_i64_monotonic, XADDD],
- [atomic_load_add_i64_acquire, XFADDD],
- [atomic_load_add_i64_release, XFADDD],
- [atomic_load_add_i64_acq_rel, XFADDD],
- [atomic_load_add_i64_seq_cst, XFADDD],
- ] in {
- def : Pat<(P[0] ADDRri:$addr, GPR:$val), (P[1] ADDRri:$addr, GPR:$val)>;
- }
}
foreach P = [[atomic_load_sub_i64_monotonic, XADDD],
@@ -1086,6 +1076,19 @@ def atomic_load_ # op # _i64_monotonic_hu:
binop_has_use<!cast<SDPatternOperator>("atomic_load_"#op# _i64_monotonic)>;
}
+let Predicates = [BPFHasALU32] in {
+ foreach P = [// add
+ [atomic_load_add_i64_monotonic_nu, XADDD],
+ [atomic_load_add_i64_monotonic_hu, XFADDD],
+ [atomic_load_add_i64_acquire, XFADDD],
+ [atomic_load_add_i64_release, XFADDD],
+ [atomic_load_add_i64_acq_rel, XFADDD],
+ [atomic_load_add_i64_seq_cst, XFADDD],
+ ] in {
+ def : Pat<(P[0] ADDRri:$addr, GPR:$val), (P[1] ADDRri:$addr, GPR:$val)>;
+ }
+}
+
foreach P = [// and
[atomic_load_and_i64_monotonic_nu, XANDD],
[atomic_load_and_i64_monotonic_hu, XFANDD],
diff --git a/llvm/test/CodeGen/BPF/atomics_mem_order_v3.ll b/llvm/test/CodeGen/BPF/atomics_mem_order_v3.ll
index 76475ac124986..ed6cd7f215d37 100644
--- a/llvm/test/CodeGen/BPF/atomics_mem_order_v3.ll
+++ b/llvm/test/CodeGen/BPF/atomics_mem_order_v3.ll
@@ -261,7 +261,7 @@ define dso_local i64 @test_fetch_add_64_ret(ptr nocapture noundef %i) local_unna
; CHECK-NEXT: # %bb.0: # %entry
; CHECK-NEXT: r2 = 10
; CHECK-NEXT: r3 = 10
-; CHECK-NEXT: lock *(u64 *)(r1 + 0) += r3
+; CHECK-NEXT: r3 = atomic_fetch_add((u64 *)(r1 + 0), r3)
; CHECK-NEXT: r0 = 10
; CHECK-NEXT: r0 = atomic_fetch_add((u64 *)(r1 + 0), r0)
; CHECK-NEXT: r0 += r3
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