[llvm] [AMDGPU] Emit format opcodes for i8 buffer.{load, store}.format in SDAG (PR #209703)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions h,cpp -- llvm/lib/Target/AMDGPU/SIISelLowering.cpp llvm/lib/Target/AMDGPU/SIISelLowering.h --diff_from_common_commit
``````````

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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 38acddfd7..9d1043f93 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -13018,12 +13018,9 @@ SDValue SITargetLowering::lowerPointerAsRsrcIntrin(SDNode *Op,
 }
 
 // Handle 8 bit and 16 bit buffer loads
-SDValue SITargetLowering::handleByteShortBufferLoads(SelectionDAG &DAG,
-                                                     EVT LoadVT, SDLoc DL,
-                                                     ArrayRef<SDValue> Ops,
-                                                     MachineMemOperand *MMO,
-                                                     bool IsTFE,
-                                                     bool IsFormat) const {
+SDValue SITargetLowering::handleByteShortBufferLoads(
+    SelectionDAG &DAG, EVT LoadVT, SDLoc DL, ArrayRef<SDValue> Ops,
+    MachineMemOperand *MMO, bool IsTFE, bool IsFormat) const {
   EVT IntVT = LoadVT.changeTypeToInteger();
 
   if (IsTFE) {
@@ -13069,7 +13066,7 @@ SDValue SITargetLowering::handleByteShortBufferStores(SelectionDAG &DAG,
 
   SDValue BufferStoreExt = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, Ops[1]);
   Ops[1] = BufferStoreExt;
-  unsigned Opc = IsFormat ? AMDGPUISD::BUFFER_STORE_FORMAT
+  unsigned Opc = IsFormat                 ? AMDGPUISD::BUFFER_STORE_FORMAT
                  : (VDataType == MVT::i8) ? AMDGPUISD::BUFFER_STORE_BYTE
                                           : AMDGPUISD::BUFFER_STORE_SHORT;
   ArrayRef<SDValue> OpsRef = ArrayRef(&Ops[0], 9);

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https://github.com/llvm/llvm-project/pull/209703