[llvm] [RISCV][P-ext] Fold packed insert-into-zero to zero-extend (PR #208006)

[via llvm-commits]

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@@ -709,6 +712,9 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
           {ISD::SETGE, ISD::SETUGT, ISD::SETUGE, ISD::SETULE, ISD::SETLE},
           P64VecVTs, Expand);
       setCondCodeAction({ISD::SETNE, ISD::SETGT}, P64VecVTs, Custom);
+      // Operation legalization queries the action using the result type.
+      setOperationAction(ISD::INSERT_SUBVECTOR, {MVT::v4i16, MVT::v8i8},
+                         Custom);
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sihuan wrote:

Yes, inserting `v1i32` into `v2i32` is also an `INSERT_SUBVECTOR`. I intentionally left `v2i32` out of the custom legalization because the existing lowering already handles it efficiently: RV32 materializes zero in the high GPR with `li a1, 0`, while RV64 emits `pack a0, a0, zero`. Even though RV64 uses `pack` instead of `zext.w`, it is still a single P-extension instruction and does not suffer from the scalarized byte/halfword repacking this change addresses. I have added RV32 and RV64 test coverage for this case to make the expected behavior explicit.

https://github.com/llvm/llvm-project/pull/208006