[llvm] f8b0713 - [NFC][SPIR-V] Add emitSimpleExecutionMode helper to dedup single imm OpExecutionMode emission (#208674)
via llvm-commits
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Mon Jul 13 02:38:10 PDT 2026
Author: Arseniy Obolenskiy
Date: 2026-07-13T11:38:06+02:00
New Revision: f8b07132c195ce2823f6a54cd978301af8c6d551
URL: https://github.com/llvm/llvm-project/commit/f8b07132c195ce2823f6a54cd978301af8c6d551
DIFF: https://github.com/llvm/llvm-project/commit/f8b07132c195ce2823f6a54cd978301af8c6d551.diff
LOG: [NFC][SPIR-V] Add emitSimpleExecutionMode helper to dedup single imm OpExecutionMode emission (#208674)
Added:
Modified:
llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp b/llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
index 22d0d97090746..0d03ff70ffd71 100644
--- a/llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
@@ -97,6 +97,8 @@ class SPIRVAsmPrinter : public AsmPrinter {
SPIRV::ExecutionMode::ExecutionMode EM);
void outputExecutionModeFromEnableMaximalReconvergenceAttr(
const MCRegister &Reg, const SPIRVSubtarget &ST);
+ void emitSimpleExecutionMode(MCRegister Reg,
+ SPIRV::ExecutionMode::ExecutionMode EM);
void outputExecutionMode(const Module &M);
void outputAnnotations(const Module &M);
void outputModuleSections();
@@ -545,18 +547,21 @@ void SPIRVAsmPrinter::outputExecutionModeFromNumthreadsAttribute(
outputMCInst(Inst);
}
+void SPIRVAsmPrinter::emitSimpleExecutionMode(
+ MCRegister Reg, SPIRV::ExecutionMode::ExecutionMode EM) {
+ MCInst Inst;
+ Inst.setOpcode(SPIRV::OpExecutionMode);
+ Inst.addOperand(MCOperand::createReg(Reg));
+ Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(EM)));
+ outputMCInst(Inst);
+}
+
void SPIRVAsmPrinter::outputExecutionModeFromEnableMaximalReconvergenceAttr(
const MCRegister &Reg, const SPIRVSubtarget &ST) {
assert(ST.canUseExtension(SPIRV::Extension::SPV_KHR_maximal_reconvergence) &&
"Function called when SPV_KHR_maximal_reconvergence is not enabled.");
- MCInst Inst;
- Inst.setOpcode(SPIRV::OpExecutionMode);
- Inst.addOperand(MCOperand::createReg(Reg));
- unsigned EM =
- static_cast<unsigned>(SPIRV::ExecutionMode::MaximallyReconvergesKHR);
- Inst.addOperand(MCOperand::createImm(EM));
- outputMCInst(Inst);
+ emitSimpleExecutionMode(Reg, SPIRV::ExecutionMode::MaximallyReconvergesKHR);
}
void SPIRVAsmPrinter::outputExecutionMode(const Module &M) {
@@ -603,13 +608,7 @@ void SPIRVAsmPrinter::outputExecutionMode(const Module &M) {
// VUID-StandaloneSpirv-OriginLowerLeft-04653: Fragment must declare
// OriginUpperLeft.
if (Attr.getValueAsString() == "pixel") {
- MCInst Inst;
- Inst.setOpcode(SPIRV::OpExecutionMode);
- Inst.addOperand(MCOperand::createReg(FReg));
- unsigned EM =
- static_cast<unsigned>(SPIRV::ExecutionMode::OriginUpperLeft);
- Inst.addOperand(MCOperand::createImm(EM));
- outputMCInst(Inst);
+ emitSimpleExecutionMode(FReg, SPIRV::ExecutionMode::OriginUpperLeft);
}
}
if (MDNode *Node = F.getMetadata("reqd_work_group_size"))
@@ -650,13 +649,7 @@ void SPIRVAsmPrinter::outputExecutionMode(const Module &M) {
// all entry points must use the ArithmeticPoisonKHR execution mode".
if (llvm::is_contained(MAI->Reqs.getMinimalCapabilities(),
SPIRV::Capability::PoisonFreezeKHR)) {
- MCInst Inst;
- Inst.setOpcode(SPIRV::OpExecutionMode);
- Inst.addOperand(MCOperand::createReg(FReg));
- unsigned EM =
- static_cast<unsigned>(SPIRV::ExecutionMode::ArithmeticPoisonKHR);
- Inst.addOperand(MCOperand::createImm(EM));
- outputMCInst(Inst);
+ emitSimpleExecutionMode(FReg, SPIRV::ExecutionMode::ArithmeticPoisonKHR);
}
// --spirv-fp-contract=off forces to emit ContractionOff for this kernel
// entry point, --spirv-fp-contract=fast suppresses it.
@@ -737,13 +730,7 @@ void SPIRVAsmPrinter::outputExecutionMode(const Module &M) {
outputMCInst(Inst);
}
} else {
- MCInst Inst;
- Inst.setOpcode(SPIRV::OpExecutionMode);
- Inst.addOperand(MCOperand::createReg(FReg));
- unsigned EM =
- static_cast<unsigned>(SPIRV::ExecutionMode::ContractionOff);
- Inst.addOperand(MCOperand::createImm(EM));
- outputMCInst(Inst);
+ emitSimpleExecutionMode(FReg, SPIRV::ExecutionMode::ContractionOff);
}
}
}
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