[llvm] [InstCombine] Teach takeLog2 log2(X + 1) IIF X[0, 1] -> X (PR #209741)
Andreas Jonson via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 15 05:06:37 PDT 2026
https://github.com/andjo403 created https://github.com/llvm/llvm-project/pull/209741
Regression found in https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/575/changes/9f2fe142026db9275a9022abcb92dabbb2c9ac32#r3586735395
proof: https://alive2.llvm.org/ce/z/B7WjCg
>From 27f6029f9a25a06ad0d2a0dbf2bef3e6bb4fa9f6 Mon Sep 17 00:00:00 2001
From: Andreas Jonson <andjo403 at hotmail.com>
Date: Wed, 15 Jul 2026 13:20:03 +0200
Subject: [PATCH 1/2] [InstCombine] Pre commit tests (NFC)
---
llvm/test/Transforms/InstCombine/mul.ll | 67 +++++++++++++++++++++++--
1 file changed, 62 insertions(+), 5 deletions(-)
diff --git a/llvm/test/Transforms/InstCombine/mul.ll b/llvm/test/Transforms/InstCombine/mul.ll
index 0d47ce09a8c3c..f319f57f25f69 100644
--- a/llvm/test/Transforms/InstCombine/mul.ll
+++ b/llvm/test/Transforms/InstCombine/mul.ll
@@ -323,7 +323,7 @@ define <2 x i8> @shl1_decrement_vec(<2 x i8> %x) {
define i32 @mul_bool(i32 %x, i1 %y) !prof !0 {
; CHECK-LABEL: @mul_bool(
-; CHECK-NEXT: [[M:%.*]] = select i1 [[Y:%.*]], i32 [[X:%.*]], i32 0
+; CHECK-NEXT: [[M:%.*]] = select i1 [[Y:%.*]], i32 [[X:%.*]], i32 0, !prof [[PROF1]]
; CHECK-NEXT: ret i32 [[M]]
;
%z = zext i1 %y to i32
@@ -357,7 +357,7 @@ define <2 x i32> @mul_bool_vec_commute(<2 x i32> %px, <2 x i1> %y) {
define i32 @mul_sext_bool(i1 %x) !prof !0 {
; CHECK-LABEL: @mul_sext_bool(
-; CHECK-NEXT: [[M:%.*]] = select i1 [[X:%.*]], i32 -42, i32 0
+; CHECK-NEXT: [[M:%.*]] = select i1 [[X:%.*]], i32 -42, i32 0, !prof [[PROF1]]
; CHECK-NEXT: ret i32 [[M]]
;
%s = sext i1 %x to i32
@@ -369,7 +369,7 @@ define i32 @mul_sext_bool_use(i1 %x) !prof !0 {
; CHECK-LABEL: @mul_sext_bool_use(
; CHECK-NEXT: [[S:%.*]] = sext i1 [[X:%.*]] to i32
; CHECK-NEXT: call void @use32(i32 [[S]])
-; CHECK-NEXT: [[M:%.*]] = select i1 [[X]], i32 -42, i32 0
+; CHECK-NEXT: [[M:%.*]] = select i1 [[X]], i32 -42, i32 0, !prof [[PROF1]]
; CHECK-NEXT: ret i32 [[M]]
;
%s = sext i1 %x to i32
@@ -436,7 +436,7 @@ define i32 @mul_bools_use3(i1 %x, i1 %y) !prof !0 {
; CHECK-NEXT: call void @use32(i32 [[ZX]])
; CHECK-NEXT: [[ZY:%.*]] = zext i1 [[Y:%.*]] to i32
; CHECK-NEXT: call void @use32(i32 [[ZY]])
-; CHECK-NEXT: [[R:%.*]] = select i1 [[X]], i32 [[ZY]], i32 0
+; CHECK-NEXT: [[R:%.*]] = select i1 [[X]], i32 [[ZY]], i32 0, !prof [[PROF1]]
; CHECK-NEXT: ret i32 [[R]]
;
%zx = zext i1 %x to i32
@@ -745,7 +745,7 @@ define i32 @not_lowbit_mul(i32 %a, i32 %b) {
define i32 @signsplat_mul(i32 %x) !prof !0 {
; CHECK-LABEL: @signsplat_mul(
; CHECK-NEXT: [[ISNEG:%.*]] = icmp slt i32 [[X:%.*]], 0
-; CHECK-NEXT: [[MUL:%.*]] = select i1 [[ISNEG]], i32 -42, i32 0
+; CHECK-NEXT: [[MUL:%.*]] = select i1 [[ISNEG]], i32 -42, i32 0, !prof [[PROF1]]
; CHECK-NEXT: ret i32 [[MUL]]
;
%ash = ashr i32 %x, 31
@@ -2453,6 +2453,63 @@ define i16 @mul_select_extra_use_mul(i16 %x, i1 %cond) {
ret i16 %mul
}
+define i16 @mul_add_one(i16 range(i16 0, 2) %x, i16 %y) {
+; CHECK-LABEL: @mul_add_one(
+; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i16 [[X:%.*]], 1
+; CHECK-NEXT: [[RET:%.*]] = mul i16 [[ADD]], [[Y:%.*]]
+; CHECK-NEXT: ret i16 [[RET]]
+;
+ %add = add i16 %x, 1
+ %ret = mul i16 %add, %y
+ ret i16 %ret
+}
+
+define i16 @mul_add_one_extra_use(i16 range(i16 0, 2) %x, i16 %y) {
+; CHECK-LABEL: @mul_add_one_extra_use(
+; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i16 [[X:%.*]], 1
+; CHECK-NEXT: call void @use16(i16 [[ADD]])
+; CHECK-NEXT: [[RET:%.*]] = mul i16 [[ADD]], [[Y:%.*]]
+; CHECK-NEXT: ret i16 [[RET]]
+;
+ %add = add i16 %x, 1
+ call void @use16(i16 %add)
+ %ret = mul i16 %add, %y
+ ret i16 %ret
+}
+
+define <4 x i16> @mul_add_one_vec(<4 x i16> range(i16 0, 2) %x, <4 x i16> %y) {
+; CHECK-LABEL: @mul_add_one_vec(
+; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw <4 x i16> [[X:%.*]], splat (i16 1)
+; CHECK-NEXT: [[MUL:%.*]] = mul <4 x i16> [[Y:%.*]], [[ADD]]
+; CHECK-NEXT: ret <4 x i16> [[MUL]]
+;
+ %add = add <4 x i16> %x, splat (i16 1)
+ %mul = mul <4 x i16> %y, %add
+ ret <4 x i16> %mul
+}
+
+define i16 @neg_mul_add_one_no_range(i16 %x, i16 %y) {
+; CHECK-LABEL: @neg_mul_add_one_no_range(
+; CHECK-NEXT: [[ADD:%.*]] = add i16 [[X:%.*]], 1
+; CHECK-NEXT: [[RET:%.*]] = mul i16 [[ADD]], [[Y:%.*]]
+; CHECK-NEXT: ret i16 [[RET]]
+;
+ %add = add i16 %x, 1
+ %ret = mul i16 %add, %y
+ ret i16 %ret
+}
+
+define i16 @neg_mul_add_two(i16 range(i16 0, 2) %x, i16 %y) {
+; CHECK-LABEL: @neg_mul_add_two(
+; CHECK-NEXT: [[ADD:%.*]] = or disjoint i16 [[X:%.*]], 2
+; CHECK-NEXT: [[RET:%.*]] = mul i16 [[ADD]], [[Y:%.*]]
+; CHECK-NEXT: ret i16 [[RET]]
+;
+ %add = add i16 %x, 2
+ %ret = mul i16 %add, %y
+ ret i16 %ret
+}
+
!0 = !{!"function_entry_count", i64 1000}
;.
; CHECK: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
>From a839e3a48c3cd2f80e1d5fc9c2271c1e31f9592c Mon Sep 17 00:00:00 2001
From: Andreas Jonson <andjo403 at hotmail.com>
Date: Wed, 15 Jul 2026 13:29:23 +0200
Subject: [PATCH 2/2] [InstCombine] Teach takeLog2 log2(X + 1) IIF X[0,1] -> X
---
llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp | 6 ++++++
llvm/test/Transforms/InstCombine/mul.ll | 8 +++-----
2 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
index 39598dbbf6c67..dc892e06260b5 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
@@ -1698,6 +1698,12 @@ Value *InstCombinerImpl::takeLog2(Value *Op, unsigned Depth, bool AssumeNonZero,
});
}
+ // log2(X + 1) IIF X[0,1] -> X
+ if (match(Op, m_Add(m_Value(X), m_One())) &&
+ computeKnownBits(X, cast<Instruction>(Op)).countMaxActiveBits() == 1) {
+ return IfFold([&]() { return X; });
+ }
+
return nullptr;
}
diff --git a/llvm/test/Transforms/InstCombine/mul.ll b/llvm/test/Transforms/InstCombine/mul.ll
index f319f57f25f69..72f97e159dccf 100644
--- a/llvm/test/Transforms/InstCombine/mul.ll
+++ b/llvm/test/Transforms/InstCombine/mul.ll
@@ -2455,8 +2455,7 @@ define i16 @mul_select_extra_use_mul(i16 %x, i1 %cond) {
define i16 @mul_add_one(i16 range(i16 0, 2) %x, i16 %y) {
; CHECK-LABEL: @mul_add_one(
-; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i16 [[X:%.*]], 1
-; CHECK-NEXT: [[RET:%.*]] = mul i16 [[ADD]], [[Y:%.*]]
+; CHECK-NEXT: [[RET:%.*]] = shl i16 [[Y:%.*]], [[X:%.*]]
; CHECK-NEXT: ret i16 [[RET]]
;
%add = add i16 %x, 1
@@ -2468,7 +2467,7 @@ define i16 @mul_add_one_extra_use(i16 range(i16 0, 2) %x, i16 %y) {
; CHECK-LABEL: @mul_add_one_extra_use(
; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i16 [[X:%.*]], 1
; CHECK-NEXT: call void @use16(i16 [[ADD]])
-; CHECK-NEXT: [[RET:%.*]] = mul i16 [[ADD]], [[Y:%.*]]
+; CHECK-NEXT: [[RET:%.*]] = shl i16 [[Y:%.*]], [[X]]
; CHECK-NEXT: ret i16 [[RET]]
;
%add = add i16 %x, 1
@@ -2479,8 +2478,7 @@ define i16 @mul_add_one_extra_use(i16 range(i16 0, 2) %x, i16 %y) {
define <4 x i16> @mul_add_one_vec(<4 x i16> range(i16 0, 2) %x, <4 x i16> %y) {
; CHECK-LABEL: @mul_add_one_vec(
-; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw <4 x i16> [[X:%.*]], splat (i16 1)
-; CHECK-NEXT: [[MUL:%.*]] = mul <4 x i16> [[Y:%.*]], [[ADD]]
+; CHECK-NEXT: [[MUL:%.*]] = shl <4 x i16> [[Y:%.*]], [[X:%.*]]
; CHECK-NEXT: ret <4 x i16> [[MUL]]
;
%add = add <4 x i16> %x, splat (i16 1)
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