[llvm] [AMDGPU] Select upper 16-bits for inline constants in packed BF16 (PR #209861)

[Stanislav Mekhanoshin via llvm-commits]

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@@ -537,6 +537,14 @@ bool SIFoldOperandsImpl::tryFoldImmWithOpSel(MachineInstr *MI, unsigned UseOpNo,
     uint16_t Hi = static_cast<uint16_t>(Imm >> 16);
     if (Lo == Hi) {
       if (AMDGPU::isInlinableLiteralV216(Lo, OpType)) {
+        // Packed BF16 instructions using inline constant must use OPSEL to
+        // select the upper 16-bits
+        if (Opcode == AMDGPU::V_PK_ADD_BF16 ||
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rampitec wrote:

Yes, I think that's right. Not just by reading spec, but also because it is like that in the ticket, and submitter verified it.

https://github.com/llvm/llvm-project/pull/209861