[llvm] f25b3f6 - [LAA, LV] Add tests for non-affine monotonic pointer bounds (NFC). (#210544)
via llvm-commits
llvm-commits at lists.llvm.org
Sun Jul 19 05:34:17 PDT 2026
Author: Florian Hahn
Date: 2026-07-19T13:34:12+01:00
New Revision: f25b3f62cee27d11d1491bdb10dfa955213b2064
URL: https://github.com/llvm/llvm-project/commit/f25b3f62cee27d11d1491bdb10dfa955213b2064
DIFF: https://github.com/llvm/llvm-project/commit/f25b3f62cee27d11d1491bdb10dfa955213b2064.diff
LOG: [LAA,LV] Add tests for non-affine monotonic pointer bounds (NFC). (#210544)
Add test cases with non-affine monotonic pointer bounds, like for
example when using std::bitset.
Initial sets of tests for
https://github.com/llvm/llvm-project/issues/207882.
Added:
llvm/test/Analysis/LoopAccessAnalysis/non-affine-monotonic-bounds.ll
llvm/test/Transforms/LoopVectorize/AArch64/non-affine-monotonic-bounds.ll
llvm/test/Transforms/LoopVectorize/non-affine-monotonic-bounds.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/Analysis/LoopAccessAnalysis/non-affine-monotonic-bounds.ll b/llvm/test/Analysis/LoopAccessAnalysis/non-affine-monotonic-bounds.ll
new file mode 100644
index 0000000000000..1b52d94cb1955
--- /dev/null
+++ b/llvm/test/Analysis/LoopAccessAnalysis/non-affine-monotonic-bounds.ll
@@ -0,0 +1,391 @@
+; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 6
+; RUN: opt -passes='print<access-info>' -disable-output %s 2>&1 | FileCheck %s
+
+; Test with non-affine but monotonic accesses.
+define void @bitset_udiv64_const_tc(ptr %words, ptr %out) {
+; CHECK-LABEL: 'bitset_udiv64_const_tc'
+; CHECK-NEXT: loop:
+; CHECK-NEXT: Report: cannot identify array bounds
+; CHECK-NEXT: Dependences:
+; CHECK-NEXT: Run-time memory checks:
+; CHECK-NEXT: Grouped accesses:
+; CHECK-EMPTY:
+; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop.
+; CHECK-NEXT: SCEV assumptions:
+; CHECK-EMPTY:
+; CHECK-NEXT: Expressions re-written:
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %div = lshr i64 %iv, 6
+ %gep.words = getelementptr inbounds i8, ptr %words, i64 %div
+ %w = load i8, ptr %gep.words, align 1
+ %gep.out = getelementptr inbounds i8, ptr %out, i64 %iv
+ %v = load i8, ptr %gep.out, align 1
+ %inc = add i8 %v, %w
+ store i8 %inc, ptr %gep.out, align 1
+ %iv.next = add nuw nsw i64 %iv, 1
+ %ec = icmp eq i64 %iv.next, 441
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+; Same shape as above but with a symbolic trip count %N.
+define void @bitset_udiv64_symbolic_tc(ptr %words, ptr %out, i64 %N) {
+; CHECK-LABEL: 'bitset_udiv64_symbolic_tc'
+; CHECK-NEXT: loop:
+; CHECK-NEXT: Report: cannot identify array bounds
+; CHECK-NEXT: Dependences:
+; CHECK-NEXT: Run-time memory checks:
+; CHECK-NEXT: Grouped accesses:
+; CHECK-EMPTY:
+; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop.
+; CHECK-NEXT: SCEV assumptions:
+; CHECK-EMPTY:
+; CHECK-NEXT: Expressions re-written:
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %div = lshr i64 %iv, 6
+ %gep.words = getelementptr inbounds i8, ptr %words, i64 %div
+ %w = load i8, ptr %gep.words, align 1
+ %gep.out = getelementptr inbounds i8, ptr %out, i64 %iv
+ %v = load i8, ptr %gep.out, align 1
+ %inc = add i8 %v, %w
+ store i8 %inc, ptr %gep.out, align 1
+ %iv.next = add nuw nsw i64 %iv, 1
+ %ec = icmp eq i64 %iv.next, %N
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+; A
diff erent, non-power-of-two divisor (i / 3).
+define void @udiv3_symbolic_tc(ptr %a, ptr %b, i64 %N) {
+; CHECK-LABEL: 'udiv3_symbolic_tc'
+; CHECK-NEXT: loop:
+; CHECK-NEXT: Report: cannot identify array bounds
+; CHECK-NEXT: Dependences:
+; CHECK-NEXT: Run-time memory checks:
+; CHECK-NEXT: Grouped accesses:
+; CHECK-EMPTY:
+; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop.
+; CHECK-NEXT: SCEV assumptions:
+; CHECK-EMPTY:
+; CHECK-NEXT: Expressions re-written:
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %div = udiv i64 %iv, 3
+ %gep.a = getelementptr inbounds i8, ptr %a, i64 %div
+ %la = load i8, ptr %gep.a, align 1
+ %gep.b = getelementptr inbounds i8, ptr %b, i64 %iv
+ store i8 %la, ptr %gep.b, align 1
+ %iv.next = add nuw nsw i64 %iv, 1
+ %ec = icmp eq i64 %iv.next, %N
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+; The divisor is a loop-invariant value rather than a constant.
+define void @udiv_invariant_divisor(ptr %a, ptr %b, i64 %N, i64 %d) {
+; CHECK-LABEL: 'udiv_invariant_divisor'
+; CHECK-NEXT: loop:
+; CHECK-NEXT: Report: cannot identify array bounds
+; CHECK-NEXT: Dependences:
+; CHECK-NEXT: Run-time memory checks:
+; CHECK-NEXT: Grouped accesses:
+; CHECK-EMPTY:
+; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop.
+; CHECK-NEXT: SCEV assumptions:
+; CHECK-EMPTY:
+; CHECK-NEXT: Expressions re-written:
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %div = udiv i64 %iv, %d
+ %gep.a = getelementptr inbounds i8, ptr %a, i64 %div
+ %la = load i8, ptr %gep.a, align 1
+ %gep.b = getelementptr inbounds i8, ptr %b, i64 %iv
+ store i8 %la, ptr %gep.b, align 1
+ %iv.next = add nuw nsw i64 %iv, 1
+ %ec = icmp eq i64 %iv.next, %N
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @noinbounds_udiv_may_wrap(ptr %base, ptr %out, i64 %N) {
+; CHECK-LABEL: 'noinbounds_udiv_may_wrap'
+; CHECK-NEXT: loop:
+; CHECK-NEXT: Report: cannot identify array bounds
+; CHECK-NEXT: Dependences:
+; CHECK-NEXT: Run-time memory checks:
+; CHECK-NEXT: Grouped accesses:
+; CHECK-EMPTY:
+; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop.
+; CHECK-NEXT: SCEV assumptions:
+; CHECK-EMPTY:
+; CHECK-NEXT: Expressions re-written:
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %div = udiv i64 %iv, 3
+ %gep = getelementptr i8, ptr %base, i64 %div
+ %v = load i8, ptr %gep, align 1
+ %gep.out = getelementptr inbounds i8, ptr %out, i64 %iv
+ store i8 %v, ptr %gep.out, align 1
+ %iv.next = add nuw nsw i64 %iv, 1
+ %ec = icmp eq i64 %iv.next, %N
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @urem5_not_monotonic(ptr %a, ptr %b, i64 %N) {
+; CHECK-LABEL: 'urem5_not_monotonic'
+; CHECK-NEXT: loop:
+; CHECK-NEXT: Report: cannot identify array bounds
+; CHECK-NEXT: Dependences:
+; CHECK-NEXT: Run-time memory checks:
+; CHECK-NEXT: Grouped accesses:
+; CHECK-EMPTY:
+; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop.
+; CHECK-NEXT: SCEV assumptions:
+; CHECK-EMPTY:
+; CHECK-NEXT: Expressions re-written:
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %rem = urem i64 %iv, 5
+ %gep.a = getelementptr inbounds i8, ptr %a, i64 %rem
+ %la = load i8, ptr %gep.a, align 1
+ %gep.b = getelementptr inbounds i8, ptr %b, i64 %iv
+ store i8 %la, ptr %gep.b, align 1
+ %iv.next = add nuw nsw i64 %iv, 1
+ %ec = icmp eq i64 %iv.next, %N
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @decreasing_udiv(ptr %a, ptr %b, i64 %N, i64 %M) {
+; CHECK-LABEL: 'decreasing_udiv'
+; CHECK-NEXT: loop:
+; CHECK-NEXT: Report: cannot identify array bounds
+; CHECK-NEXT: Dependences:
+; CHECK-NEXT: Run-time memory checks:
+; CHECK-NEXT: Grouped accesses:
+; CHECK-EMPTY:
+; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop.
+; CHECK-NEXT: SCEV assumptions:
+; CHECK-EMPTY:
+; CHECK-NEXT: Expressions re-written:
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %sub = sub nuw i64 %M, %iv
+ %div = lshr i64 %sub, 6
+ %gep.a = getelementptr inbounds i8, ptr %a, i64 %div
+ %la = load i8, ptr %gep.a, align 1
+ %gep.b = getelementptr inbounds i8, ptr %b, i64 %iv
+ store i8 %la, ptr %gep.b, align 1
+ %iv.next = add nuw nsw i64 %iv, 1
+ %ec = icmp eq i64 %iv.next, %N
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @staircase_self_dependence(ptr %a) {
+; CHECK-LABEL: 'staircase_self_dependence'
+; CHECK-NEXT: loop:
+; CHECK-NEXT: Report: unsafe dependent memory operations in loop. Use #pragma clang loop distribute(enable) to allow loop distribution to attempt to isolate the offending operations into a separate loop
+; CHECK-NEXT: Unsafe indirect dependence.
+; CHECK-NEXT: Dependences:
+; CHECK-NEXT: IndirectUnsafe:
+; CHECK-NEXT: %v = load i8, ptr %gep, align 1 ->
+; CHECK-NEXT: store i8 %inc, ptr %gep, align 1
+; CHECK-EMPTY:
+; CHECK-NEXT: Run-time memory checks:
+; CHECK-NEXT: Grouped accesses:
+; CHECK-EMPTY:
+; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop.
+; CHECK-NEXT: SCEV assumptions:
+; CHECK-EMPTY:
+; CHECK-NEXT: Expressions re-written:
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %div = lshr i64 %iv, 1
+ %gep = getelementptr inbounds i8, ptr %a, i64 %div
+ %v = load i8, ptr %gep, align 1
+ %inc = add i8 %v, 1
+ store i8 %inc, ptr %gep, align 1
+ %iv.next = add nuw nsw i64 %iv, 1
+ %ec = icmp eq i64 %iv.next, 256
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @bitset_i64_word(ptr %words, ptr %out, i64 %N) {
+; CHECK-LABEL: 'bitset_i64_word'
+; CHECK-NEXT: loop:
+; CHECK-NEXT: Report: cannot identify array bounds
+; CHECK-NEXT: Dependences:
+; CHECK-NEXT: Run-time memory checks:
+; CHECK-NEXT: Grouped accesses:
+; CHECK-EMPTY:
+; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop.
+; CHECK-NEXT: SCEV assumptions:
+; CHECK-EMPTY:
+; CHECK-NEXT: Expressions re-written:
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %div = lshr i64 %iv, 6
+ %gep.words = getelementptr inbounds i64, ptr %words, i64 %div
+ %w = load i64, ptr %gep.words, align 8
+ %gep.out = getelementptr inbounds i64, ptr %out, i64 %iv
+ store i64 %w, ptr %gep.out, align 8
+ %iv.next = add nuw nsw i64 %iv, 1
+ %ec = icmp eq i64 %iv.next, %N
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @scaled_const_udiv(ptr %a, ptr %b, i64 %N) {
+; CHECK-LABEL: 'scaled_const_udiv'
+; CHECK-NEXT: loop:
+; CHECK-NEXT: Report: cannot identify array bounds
+; CHECK-NEXT: Dependences:
+; CHECK-NEXT: Run-time memory checks:
+; CHECK-NEXT: Grouped accesses:
+; CHECK-EMPTY:
+; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop.
+; CHECK-NEXT: SCEV assumptions:
+; CHECK-EMPTY:
+; CHECK-NEXT: Expressions re-written:
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %div = lshr i64 %iv, 6
+ %scaled = mul nuw nsw i64 %div, 3
+ %gep.a = getelementptr inbounds i32, ptr %a, i64 %scaled
+ %la = load i32, ptr %gep.a, align 4
+ %gep.b = getelementptr inbounds i32, ptr %b, i64 %iv
+ store i32 %la, ptr %gep.b, align 4
+ %iv.next = add nuw nsw i64 %iv, 1
+ %ec = icmp eq i64 %iv.next, %N
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @scaled_unconstrained_may_wrap(ptr %a, ptr %b, i64 %N, i64 %k) {
+; CHECK-LABEL: 'scaled_unconstrained_may_wrap'
+; CHECK-NEXT: loop:
+; CHECK-NEXT: Report: cannot identify array bounds
+; CHECK-NEXT: Dependences:
+; CHECK-NEXT: Run-time memory checks:
+; CHECK-NEXT: Grouped accesses:
+; CHECK-EMPTY:
+; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop.
+; CHECK-NEXT: SCEV assumptions:
+; CHECK-EMPTY:
+; CHECK-NEXT: Expressions re-written:
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %div = lshr i64 %iv, 6
+ %scaled = mul i64 %div, %k
+ %gep.a = getelementptr inbounds i8, ptr %a, i64 %scaled
+ %la = load i8, ptr %gep.a, align 1
+ %gep.b = getelementptr inbounds i8, ptr %b, i64 %iv
+ store i8 %la, ptr %gep.b, align 1
+ %iv.next = add nuw nsw i64 %iv, 1
+ %ec = icmp eq i64 %iv.next, %N
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @offset_const_udiv(ptr %a, ptr %b, i64 %N) {
+; CHECK-LABEL: 'offset_const_udiv'
+; CHECK-NEXT: loop:
+; CHECK-NEXT: Report: cannot identify array bounds
+; CHECK-NEXT: Dependences:
+; CHECK-NEXT: Run-time memory checks:
+; CHECK-NEXT: Grouped accesses:
+; CHECK-EMPTY:
+; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop.
+; CHECK-NEXT: SCEV assumptions:
+; CHECK-EMPTY:
+; CHECK-NEXT: Expressions re-written:
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %div = lshr i64 %iv, 6
+ %off = add nuw nsw i64 %div, 7
+ %gep.a = getelementptr inbounds i8, ptr %a, i64 %off
+ %la = load i8, ptr %gep.a, align 1
+ %gep.b = getelementptr inbounds i8, ptr %b, i64 %iv
+ store i8 %la, ptr %gep.b, align 1
+ %iv.next = add nuw nsw i64 %iv, 1
+ %ec = icmp eq i64 %iv.next, %N
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/non-affine-monotonic-bounds.ll b/llvm/test/Transforms/LoopVectorize/AArch64/non-affine-monotonic-bounds.ll
new file mode 100644
index 0000000000000..7ccd5da926c21
--- /dev/null
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/non-affine-monotonic-bounds.ll
@@ -0,0 +1,150 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 6
+; RUN: opt -passes=loop-vectorize -S %s | FileCheck %s
+
+target triple = "arm64-apple-macosx"
+
+; Constant trip count of 4.
+define void @bitset_tc4(ptr %words, ptr %out) {
+; CHECK-LABEL: define void @bitset_tc4(
+; CHECK-SAME: ptr [[WORDS:%.*]], ptr [[OUT:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[LOOP:.*]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[DIV:%.*]] = lshr i64 [[IV]], 6
+; CHECK-NEXT: [[GEP_WORDS:%.*]] = getelementptr inbounds i8, ptr [[WORDS]], i64 [[DIV]]
+; CHECK-NEXT: [[W:%.*]] = load i8, ptr [[GEP_WORDS]], align 1
+; CHECK-NEXT: [[GEP_OUT:%.*]] = getelementptr inbounds i8, ptr [[OUT]], i64 [[IV]]
+; CHECK-NEXT: store i8 [[W]], ptr [[GEP_OUT]], align 1
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 4
+; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %div = lshr i64 %iv, 6
+ %gep.words = getelementptr inbounds i8, ptr %words, i64 %div
+ %w = load i8, ptr %gep.words, align 1
+ %gep.out = getelementptr inbounds i8, ptr %out, i64 %iv
+ store i8 %w, ptr %gep.out, align 1
+ %iv.next = add nuw nsw i64 %iv, 1
+ %ec = icmp eq i64 %iv.next, 4
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+; Constant trip count of 8.
+define void @bitset_tc8(ptr %words, ptr %out) {
+; CHECK-LABEL: define void @bitset_tc8(
+; CHECK-SAME: ptr [[WORDS:%.*]], ptr [[OUT:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[LOOP:.*]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[DIV:%.*]] = lshr i64 [[IV]], 6
+; CHECK-NEXT: [[GEP_WORDS:%.*]] = getelementptr inbounds i8, ptr [[WORDS]], i64 [[DIV]]
+; CHECK-NEXT: [[W:%.*]] = load i8, ptr [[GEP_WORDS]], align 1
+; CHECK-NEXT: [[GEP_OUT:%.*]] = getelementptr inbounds i8, ptr [[OUT]], i64 [[IV]]
+; CHECK-NEXT: store i8 [[W]], ptr [[GEP_OUT]], align 1
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 8
+; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %div = lshr i64 %iv, 6
+ %gep.words = getelementptr inbounds i8, ptr %words, i64 %div
+ %w = load i8, ptr %gep.words, align 1
+ %gep.out = getelementptr inbounds i8, ptr %out, i64 %iv
+ store i8 %w, ptr %gep.out, align 1
+ %iv.next = add nuw nsw i64 %iv, 1
+ %ec = icmp eq i64 %iv.next, 8
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @udiv3_copy(ptr %a, ptr %b, i64 %N) {
+; CHECK-LABEL: define void @udiv3_copy(
+; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) {
+; CHECK-NEXT: [[SCALAR_PH:.*]]:
+; CHECK-NEXT: br label %[[LOOP:.*]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[DIV:%.*]] = udiv i64 [[IV]], 3
+; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[DIV]]
+; CHECK-NEXT: [[LA:%.*]] = load i8, ptr [[GEP_A]], align 1
+; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[IV]]
+; CHECK-NEXT: store i8 [[LA]], ptr [[GEP_B]], align 1
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %div = udiv i64 %iv, 3
+ %gep.a = getelementptr inbounds i8, ptr %a, i64 %div
+ %la = load i8, ptr %gep.a, align 1
+ %gep.b = getelementptr inbounds i8, ptr %b, i64 %iv
+ store i8 %la, ptr %gep.b, align 1
+ %iv.next = add nuw nsw i64 %iv, 1
+ %ec = icmp eq i64 %iv.next, %N
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @bitset_copy_i64_word(ptr %src, ptr %out, i64 %N) {
+; CHECK-LABEL: define void @bitset_copy_i64_word(
+; CHECK-SAME: ptr [[SRC:%.*]], ptr [[OUT:%.*]], i64 [[N:%.*]]) {
+; CHECK-NEXT: [[SCALAR_PH:.*]]:
+; CHECK-NEXT: br label %[[LOOP:.*]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[DIV:%.*]] = lshr i64 [[IV]], 6
+; CHECK-NEXT: [[GEP_WORDS:%.*]] = getelementptr inbounds i64, ptr [[SRC]], i64 [[DIV]]
+; CHECK-NEXT: [[W:%.*]] = load i64, ptr [[GEP_WORDS]], align 8
+; CHECK-NEXT: [[GEP_OUT:%.*]] = getelementptr inbounds i64, ptr [[OUT]], i64 [[IV]]
+; CHECK-NEXT: store i64 [[W]], ptr [[GEP_OUT]], align 8
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %div = lshr i64 %iv, 6
+ %gep.src = getelementptr inbounds i64, ptr %src, i64 %div
+ %w = load i64, ptr %gep.src, align 8
+ %gep.out = getelementptr inbounds i64, ptr %out, i64 %iv
+ store i64 %w, ptr %gep.out, align 8
+ %iv.next = add nuw nsw i64 %iv, 1
+ %ec = icmp eq i64 %iv.next, %N
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
diff --git a/llvm/test/Transforms/LoopVectorize/non-affine-monotonic-bounds.ll b/llvm/test/Transforms/LoopVectorize/non-affine-monotonic-bounds.ll
new file mode 100644
index 0000000000000..545f10b457ec1
--- /dev/null
+++ b/llvm/test/Transforms/LoopVectorize/non-affine-monotonic-bounds.ll
@@ -0,0 +1,226 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 6
+; RUN: opt -passes=loop-vectorize -force-vector-width=4 -S %s | FileCheck %s
+
+; A copy loop with non-affine access pattern %iv / 64.
+define void @bitset_copy_symbolic_tc(ptr %src, ptr %out, i64 %N) {
+; CHECK-LABEL: define void @bitset_copy_symbolic_tc(
+; CHECK-SAME: ptr [[SRC:%.*]], ptr [[OUT:%.*]], i64 [[N:%.*]]) {
+; CHECK-NEXT: [[SCALAR_PH:.*]]:
+; CHECK-NEXT: br label %[[LOOP:.*]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[DIV:%.*]] = lshr i64 [[IV]], 6
+; CHECK-NEXT: [[GEP_WORDS:%.*]] = getelementptr inbounds i8, ptr [[SRC]], i64 [[DIV]]
+; CHECK-NEXT: [[W:%.*]] = load i8, ptr [[GEP_WORDS]], align 1
+; CHECK-NEXT: [[GEP_OUT:%.*]] = getelementptr inbounds i8, ptr [[OUT]], i64 [[IV]]
+; CHECK-NEXT: store i8 [[W]], ptr [[GEP_OUT]], align 1
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %div = lshr i64 %iv, 6
+ %gep.src = getelementptr inbounds i8, ptr %src, i64 %div
+ %w = load i8, ptr %gep.src, align 1
+ %gep.out = getelementptr inbounds i8, ptr %out, i64 %iv
+ store i8 %w, ptr %gep.out, align 1
+ %iv.next = add nuw nsw i64 %iv, 1
+ %ec = icmp eq i64 %iv.next, %N
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+; Constant trip count variant.
+define void @bitset_copy_const_tc(ptr %src, ptr %out) {
+; CHECK-LABEL: define void @bitset_copy_const_tc(
+; CHECK-SAME: ptr [[SRC:%.*]], ptr [[OUT:%.*]]) {
+; CHECK-NEXT: [[SCALAR_PH:.*]]:
+; CHECK-NEXT: br label %[[LOOP:.*]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[DIV:%.*]] = lshr i64 [[IV]], 6
+; CHECK-NEXT: [[GEP_WORDS:%.*]] = getelementptr inbounds i8, ptr [[SRC]], i64 [[DIV]]
+; CHECK-NEXT: [[W:%.*]] = load i8, ptr [[GEP_WORDS]], align 1
+; CHECK-NEXT: [[GEP_OUT:%.*]] = getelementptr inbounds i8, ptr [[OUT]], i64 [[IV]]
+; CHECK-NEXT: store i8 [[W]], ptr [[GEP_OUT]], align 1
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 441
+; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %div = lshr i64 %iv, 6
+ %gep.src = getelementptr inbounds i8, ptr %src, i64 %div
+ %w = load i8, ptr %gep.src, align 1
+ %gep.out = getelementptr inbounds i8, ptr %out, i64 %iv
+ store i8 %w, ptr %gep.out, align 1
+ %iv.next = add nuw nsw i64 %iv, 1
+ %ec = icmp eq i64 %iv.next, 441
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+; Negative: the sawtooth index i % 5 is not monotonic, so no bounds can be
+; formed and the loop stays scalar even with the feature enabled.
+define void @urem5_stays_scalar(ptr %a, ptr %b, i64 %N) {
+; CHECK-LABEL: define void @urem5_stays_scalar(
+; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[LOOP:.*]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[REM:%.*]] = urem i64 [[IV]], 5
+; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[REM]]
+; CHECK-NEXT: [[LA:%.*]] = load i8, ptr [[GEP_A]], align 1
+; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[IV]]
+; CHECK-NEXT: store i8 [[LA]], ptr [[GEP_B]], align 1
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %rem = urem i64 %iv, 5
+ %gep.a = getelementptr inbounds i8, ptr %a, i64 %rem
+ %la = load i8, ptr %gep.a, align 1
+ %gep.b = getelementptr inbounds i8, ptr %b, i64 %iv
+ store i8 %la, ptr %gep.b, align 1
+ %iv.next = add nuw nsw i64 %iv, 1
+ %ec = icmp eq i64 %iv.next, %N
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @bitset_copy_i64_word(ptr %src, ptr %out, i64 %N) {
+; CHECK-LABEL: define void @bitset_copy_i64_word(
+; CHECK-SAME: ptr [[SRC:%.*]], ptr [[OUT:%.*]], i64 [[N:%.*]]) {
+; CHECK-NEXT: [[SCALAR_PH:.*]]:
+; CHECK-NEXT: br label %[[LOOP:.*]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[DIV:%.*]] = lshr i64 [[IV]], 6
+; CHECK-NEXT: [[GEP_WORDS:%.*]] = getelementptr inbounds i64, ptr [[SRC]], i64 [[DIV]]
+; CHECK-NEXT: [[W:%.*]] = load i64, ptr [[GEP_WORDS]], align 8
+; CHECK-NEXT: [[GEP_OUT:%.*]] = getelementptr inbounds i64, ptr [[OUT]], i64 [[IV]]
+; CHECK-NEXT: store i64 [[W]], ptr [[GEP_OUT]], align 8
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %div = lshr i64 %iv, 6
+ %gep.src = getelementptr inbounds i64, ptr %src, i64 %div
+ %w = load i64, ptr %gep.src, align 8
+ %gep.out = getelementptr inbounds i64, ptr %out, i64 %iv
+ store i64 %w, ptr %gep.out, align 8
+ %iv.next = add nuw nsw i64 %iv, 1
+ %ec = icmp eq i64 %iv.next, %N
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+; Loop with access pattern 7 + %iv/64.
+define void @bitset_copy_offset(ptr %a, ptr %b, i64 %N) {
+; CHECK-LABEL: define void @bitset_copy_offset(
+; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) {
+; CHECK-NEXT: [[SCALAR_PH:.*]]:
+; CHECK-NEXT: br label %[[LOOP:.*]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[DIV:%.*]] = lshr i64 [[IV]], 6
+; CHECK-NEXT: [[STAIR_IDX:%.*]] = add nuw nsw i64 [[DIV]], 7
+; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[STAIR_IDX]]
+; CHECK-NEXT: [[LA:%.*]] = load i8, ptr [[GEP_A]], align 1
+; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[IV]]
+; CHECK-NEXT: store i8 [[LA]], ptr [[GEP_B]], align 1
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %div = lshr i64 %iv, 6
+ %stair_idx = add nuw nsw i64 %div, 7
+ %gep.a = getelementptr inbounds i8, ptr %a, i64 %stair_idx
+ %la = load i8, ptr %gep.a, align 1
+ %gep.b = getelementptr inbounds i8, ptr %b, i64 %iv
+ store i8 %la, ptr %gep.b, align 1
+ %iv.next = add nuw nsw i64 %iv, 1
+ %ec = icmp eq i64 %iv.next, %N
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+; Access with a non-power-of-two divisor %iv/3.
+define void @udiv3_copy(ptr %a, ptr %b, i64 %N) {
+; CHECK-LABEL: define void @udiv3_copy(
+; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[N:%.*]]) {
+; CHECK-NEXT: [[SCALAR_PH:.*]]:
+; CHECK-NEXT: br label %[[LOOP:.*]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[DIV:%.*]] = udiv i64 [[IV]], 3
+; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[DIV]]
+; CHECK-NEXT: [[LA:%.*]] = load i8, ptr [[GEP_A]], align 1
+; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr inbounds i8, ptr [[B]], i64 [[IV]]
+; CHECK-NEXT: store i8 [[LA]], ptr [[GEP_B]], align 1
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]
+; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %div = udiv i64 %iv, 3
+ %gep.a = getelementptr inbounds i8, ptr %a, i64 %div
+ %la = load i8, ptr %gep.a, align 1
+ %gep.b = getelementptr inbounds i8, ptr %b, i64 %iv
+ store i8 %la, ptr %gep.b, align 1
+ %iv.next = add nuw nsw i64 %iv, 1
+ %ec = icmp eq i64 %iv.next, %N
+ br i1 %ec, label %exit, label %loop
+
+exit:
+ ret void
+}
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