[llvm] 32f3f9d - [SLP][NFC] Pre-commit tests for select IR-flag/metadata propagation (#208150)
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Mon Jul 13 00:14:04 PDT 2026
Author: ayrai-gb
Date: 2026-07-13T12:43:59+05:30
New Revision: 32f3f9dfce7ba9042ebfe7b42e72139454d29672
URL: https://github.com/llvm/llvm-project/commit/32f3f9dfce7ba9042ebfe7b42e72139454d29672
DIFF: https://github.com/llvm/llvm-project/commit/32f3f9dfce7ba9042ebfe7b42e72139454d29672.diff
LOG: [SLP][NFC] Pre-commit tests for select IR-flag/metadata propagation (#208150)
Pre-commits regression tests for an upcoming SLPVectorizer fix (see
#207982). These IR shapes are currently vectorized by SLP, and the
vectorization is functionally correct but when a bundle of
scalar`select` instructions is vectorized, the resulting vector `select`
drops the fast-math flags (and other IR flags/metadata such as
`!unpredictable`) that were common to every scalar lane.
This NFC patch records the current (buggy) behavior so that the
follow-up fix's diff is limited to the behavioural change: `select_nnan`
currently loses `nnan` on the vectorized select, while
`select_not_all_nnan` (one lane missing `nnan`) correctly has none.
Co-authored-by: Ayush Rai <Ayush.Rai at amd.com>
Added:
Modified:
llvm/test/Transforms/SLPVectorizer/X86/propagate_ir_flags.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/propagate_ir_flags.ll b/llvm/test/Transforms/SLPVectorizer/X86/propagate_ir_flags.ll
index 49d39d6408149..afbbf8e4b05b2 100644
--- a/llvm/test/Transforms/SLPVectorizer/X86/propagate_ir_flags.ll
+++ b/llvm/test/Transforms/SLPVectorizer/X86/propagate_ir_flags.ll
@@ -574,4 +574,74 @@ define void @call_no_fast(ptr %x) {
ret void
}
+; All lanes have 'nnan', so the vectorized select must keep it.
+define void @select_nnan(ptr %d, <4 x i1> %m, <4 x float> %x, <4 x float> %y) {
+; CHECK-LABEL: @select_nnan(
+; CHECK-NEXT: [[P1:%.*]] = getelementptr float, ptr [[D:%.*]], i32 0
+; CHECK-NEXT: [[TMP1:%.*]] = select <4 x i1> [[M:%.*]], <4 x float> [[X:%.*]], <4 x float> [[Y:%.*]]
+; CHECK-NEXT: store <4 x float> [[TMP1]], ptr [[P1]], align 4
+; CHECK-NEXT: ret void
+;
+ %e1 = extractelement <4 x i1> %m, i32 0
+ %x1 = extractelement <4 x float> %x, i32 0
+ %y1 = extractelement <4 x float> %y, i32 0
+ %s1 = select nnan i1 %e1, float %x1, float %y1
+ %p1 = getelementptr float, ptr %d, i32 0
+ store float %s1, ptr %p1, align 4
+ %e2 = extractelement <4 x i1> %m, i32 1
+ %x2 = extractelement <4 x float> %x, i32 1
+ %y2 = extractelement <4 x float> %y, i32 1
+ %s2 = select nnan i1 %e2, float %x2, float %y2
+ %p2 = getelementptr float, ptr %d, i32 1
+ store float %s2, ptr %p2, align 4
+ %e3 = extractelement <4 x i1> %m, i32 2
+ %x3 = extractelement <4 x float> %x, i32 2
+ %y3 = extractelement <4 x float> %y, i32 2
+ %s3 = select nnan i1 %e3, float %x3, float %y3
+ %p3 = getelementptr float, ptr %d, i32 2
+ store float %s3, ptr %p3, align 4
+ %e4 = extractelement <4 x i1> %m, i32 3
+ %x4 = extractelement <4 x float> %x, i32 3
+ %y4 = extractelement <4 x float> %y, i32 3
+ %s4 = select nnan i1 %e4, float %x4, float %y4
+ %p4 = getelementptr float, ptr %d, i32 3
+ store float %s4, ptr %p4, align 4
+ ret void
+}
+
+; One lane lacks 'nnan', so the vectorized select must NOT have it.
+define void @select_not_all_nnan(ptr %d, <4 x i1> %m, <4 x float> %x, <4 x float> %y) {
+; CHECK-LABEL: @select_not_all_nnan(
+; CHECK-NEXT: [[P1:%.*]] = getelementptr float, ptr [[D:%.*]], i32 0
+; CHECK-NEXT: [[TMP1:%.*]] = select <4 x i1> [[M:%.*]], <4 x float> [[X:%.*]], <4 x float> [[Y:%.*]]
+; CHECK-NEXT: store <4 x float> [[TMP1]], ptr [[P1]], align 4
+; CHECK-NEXT: ret void
+;
+ %e1 = extractelement <4 x i1> %m, i32 0
+ %x1 = extractelement <4 x float> %x, i32 0
+ %y1 = extractelement <4 x float> %y, i32 0
+ %s1 = select nnan i1 %e1, float %x1, float %y1
+ %p1 = getelementptr float, ptr %d, i32 0
+ store float %s1, ptr %p1, align 4
+ %e2 = extractelement <4 x i1> %m, i32 1
+ %x2 = extractelement <4 x float> %x, i32 1
+ %y2 = extractelement <4 x float> %y, i32 1
+ %s2 = select nnan i1 %e2, float %x2, float %y2
+ %p2 = getelementptr float, ptr %d, i32 1
+ store float %s2, ptr %p2, align 4
+ %e3 = extractelement <4 x i1> %m, i32 2
+ %x3 = extractelement <4 x float> %x, i32 2
+ %y3 = extractelement <4 x float> %y, i32 2
+ %s3 = select nnan i1 %e3, float %x3, float %y3
+ %p3 = getelementptr float, ptr %d, i32 2
+ store float %s3, ptr %p3, align 4
+ %e4 = extractelement <4 x i1> %m, i32 3
+ %x4 = extractelement <4 x float> %x, i32 3
+ %y4 = extractelement <4 x float> %y, i32 3
+ %s4 = select i1 %e4, float %x4, float %y4
+ %p4 = getelementptr float, ptr %d, i32 3
+ store float %s4, ptr %p4, align 4
+ ret void
+}
+
attributes #1 = { "target-features"="+avx" }
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