[llvm] [AArch64][SelectionDAG] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)

[via llvm-commits]

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@@ -9121,6 +9121,49 @@ defm FCVTZS : SIMDFPScalarRShift<0, 0b11111, "fcvtzs">;
 defm FCVTZU : SIMDFPScalarRShift<1, 0b11111, "fcvtzu">;
 defm SCVTF  : SIMDFPScalarRShift<0, 0b11100, "scvtf">;
 defm UCVTF  : SIMDFPScalarRShift<1, 0b11100, "ucvtf">;
+
+// Transformation for SIMD shift imm to fixed point imm for FPR-to-GPR result
+def fixedpoint_scalar_xform : SDNodeXForm<timm, [{
+  (void)N;
+  return V;
+}]>;
+
+multiclass FPToFixedScalarPats<SDPatternOperator OpN, string INST > {
+// Allow integer result to remain in GPR registers
+// SelectionDAG-only as GIsel doesn't import fixedpoint_scalar_xform
+// Give priority over generic FPR fallback
+let AddedComplexity = 1 in {
+  def : Pat<(i32 (OpN FPR32:$Rn, vecshiftR32:$imm)),
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Lukacma wrote:

You are missing patterns for f32 -> i64 and f64 -> i32 conversions here.

https://github.com/llvm/llvm-project/pull/210275