[llvm] 6375064 - [SLP][NFC]Add a test with potential masked revec udiv, NFC

[via llvm-commits]

Author: Alexey Bataev
Date: 2026-07-19T10:10:03-04:00
New Revision: 637506427c2062fdbbd52fe1ef6c701f799a4228

URL: https://github.com/llvm/llvm-project/commit/637506427c2062fdbbd52fe1ef6c701f799a4228
DIFF: https://github.com/llvm/llvm-project/commit/637506427c2062fdbbd52fe1ef6c701f799a4228.diff

LOG: [SLP][NFC]Add a test with potential masked revec udiv, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/210596

Added: 
    llvm/test/Transforms/SLPVectorizer/AArch64/masked-div-rem-non-pow2-revec.ll

Modified: 
    

Removed: 
    


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diff  --git a/llvm/test/Transforms/SLPVectorizer/AArch64/masked-div-rem-non-pow2-revec.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/masked-div-rem-non-pow2-revec.ll
new file mode 100644
index 0000000000000..ee831842f825f
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/AArch64/masked-div-rem-non-pow2-revec.ll
@@ -0,0 +1,34 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt -S --passes=slp-vectorizer -mtriple=aarch64-unknown-linux-gnu -mcpu=neoverse-512tvb -slp-vectorize-non-power-of-2 -slp-revec < %s | FileCheck %s
+
+define void @udiv_v3v2i32(ptr noalias %dst, ptr noalias %x, ptr noalias %y) vscale_range(2,2) {
+; CHECK-LABEL: define void @udiv_v3v2i32(
+; CHECK-SAME: ptr noalias [[DST:%.*]], ptr noalias [[X:%.*]], ptr noalias [[Y:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT:  [[ENTRY:.*:]]
+; CHECK-NEXT:    [[TMP0:%.*]] = load <6 x i32>, ptr [[X]], align 8
+; CHECK-NEXT:    [[TMP1:%.*]] = load <6 x i32>, ptr [[Y]], align 8
+; CHECK-NEXT:    [[TMP2:%.*]] = udiv <6 x i32> [[TMP0]], [[TMP1]]
+; CHECK-NEXT:    store <6 x i32> [[TMP2]], ptr [[DST]], align 8
+; CHECK-NEXT:    ret void
+;
+entry:
+  %x0 = load <2 x i32>, ptr %x, align 8
+  %gep.x.1 = getelementptr inbounds <2 x i32>, ptr %x, i64 1
+  %x1 = load <2 x i32>, ptr %gep.x.1, align 8
+  %gep.x.2 = getelementptr inbounds <2 x i32>, ptr %x, i64 2
+  %x2 = load <2 x i32>, ptr %gep.x.2, align 8
+  %y0 = load <2 x i32>, ptr %y, align 8
+  %gep.y.1 = getelementptr inbounds <2 x i32>, ptr %y, i64 1
+  %y1 = load <2 x i32>, ptr %gep.y.1, align 8
+  %gep.y.2 = getelementptr inbounds <2 x i32>, ptr %y, i64 2
+  %y2 = load <2 x i32>, ptr %gep.y.2, align 8
+  %d0 = udiv <2 x i32> %x0, %y0
+  %d1 = udiv <2 x i32> %x1, %y1
+  %d2 = udiv <2 x i32> %x2, %y2
+  store <2 x i32> %d0, ptr %dst, align 8
+  %gep.dst.1 = getelementptr inbounds <2 x i32>, ptr %dst, i64 1
+  store <2 x i32> %d1, ptr %gep.dst.1, align 8
+  %gep.dst.2 = getelementptr inbounds <2 x i32>, ptr %dst, i64 2
+  store <2 x i32> %d2, ptr %gep.dst.2, align 8
+  ret void
+}