[llvm] [AMDGPU] Reject illegal image atomic data widths in SelectionDAG (PR #210366)

[via llvm-commits]

llvmorg-github-actions[bot] wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-amdgpu

Author: Arseniy Obolenskiy (aobolensk)

<details>
<summary>Changes</summary>



---
Full diff: https://github.com/llvm/llvm-project/pull/210366.diff


2 Files Affected:

- (modified) llvm/lib/Target/AMDGPU/SIISelLowering.cpp (+18) 
- (added) llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.illegal-data-type.xfail.ll (+45) 


``````````diff
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 87e951e489ba5..4258911cb8792 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -10373,6 +10373,24 @@ SDValue SITargetLowering::lowerImage(SDValue Op,
          IntrOpcode == AMDGPU::IMAGE_ATOMIC_PK_ADD_BF16 ||
          IntrOpcode == AMDGPU::IMAGE_ATOMIC_PK_ADD_BF16_NORTN);
 
+    if (!IsAtomicPacked16Bit && VData.getValueSizeInBits() != 32 &&
+        VData.getValueSizeInBits() != 64) {
+      DAG.getContext()->diagnose(DiagnosticInfoUnsupported(
+          DAG.getMachineFunction().getFunction(),
+          "unsupported image atomic data type", DL.getDebugLoc()));
+
+      unsigned Idx = 0;
+      SmallVector<SDValue, 3> RetValues(OrigResultTypes.size());
+      for (EVT VT : OrigResultTypes) {
+        if (VT == MVT::Other)
+          RetValues[Idx++] = Op.getOperand(0); // Chain
+        else
+          RetValues[Idx++] = DAG.getPOISON(VT);
+      }
+
+      return DAG.getMergeValues(RetValues, DL);
+    }
+
     bool Is64Bit = VData.getValueSizeInBits() == 64;
     if (BaseOpcode->AtomicX2) {
       SDValue VData2 = Op.getOperand(3);
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.illegal-data-type.xfail.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.illegal-data-type.xfail.ll
new file mode 100644
index 0000000000000..59bdeb71b8a18
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.illegal-data-type.xfail.ll
@@ -0,0 +1,45 @@
+; RUN: not llc -mtriple=amdgcn -mcpu=gfx90a -filetype=null %s 2>&1 | FileCheck %s
+
+; llvm.amdgcn.image.atomic.<op> only supports 32-bit, 64-bit, and packed
+; f16/bf16 data.
+
+; CHECK: error: {{.*}}unsupported image atomic data type
+define amdgpu_kernel void @swap_v3i32(<8 x i32> inreg %rsrc, i32 %s, <3 x i32> %data, ptr addrspace(1) %out) {
+  %v = call <3 x i32> @llvm.amdgcn.image.atomic.swap.1d.v3i32.i32(<3 x i32> %data, i32 %s, <8 x i32> %rsrc, i32 0, i32 0)
+  store <3 x i32> %v, ptr addrspace(1) %out
+  ret void
+}
+
+; CHECK: error: {{.*}}unsupported image atomic data type
+define amdgpu_kernel void @swap_v3i16(<8 x i32> inreg %rsrc, i32 %s, <3 x i16> %data, ptr addrspace(1) %out) {
+  %v = call <3 x i16> @llvm.amdgcn.image.atomic.swap.1d.v3i16.i32(<3 x i16> %data, i32 %s, <8 x i32> %rsrc, i32 0, i32 0)
+  store <3 x i16> %v, ptr addrspace(1) %out
+  ret void
+}
+
+; CHECK: error: {{.*}}unsupported image atomic data type
+define amdgpu_kernel void @swap_bf16(<8 x i32> inreg %rsrc, i32 %s, bfloat %data, ptr addrspace(1) %out) {
+  %v = call bfloat @llvm.amdgcn.image.atomic.swap.1d.bf16.i32(bfloat %data, i32 %s, <8 x i32> %rsrc, i32 0, i32 0)
+  store bfloat %v, ptr addrspace(1) %out
+  ret void
+}
+
+; CHECK: error: {{.*}}unsupported image atomic data type
+define amdgpu_kernel void @swap_i128(<8 x i32> inreg %rsrc, i32 %s, i128 %data, ptr addrspace(1) %out) {
+  %v = call i128 @llvm.amdgcn.image.atomic.swap.1d.i128.i32(i128 %data, i32 %s, <8 x i32> %rsrc, i32 0, i32 0)
+  store i128 %v, ptr addrspace(1) %out
+  ret void
+}
+
+; CHECK: error: {{.*}}unsupported image atomic data type
+define amdgpu_kernel void @cmpswap_i128(<8 x i32> inreg %rsrc, i32 %s, i128 %cmp, i128 %data, ptr addrspace(1) %out) {
+  %v = call i128 @llvm.amdgcn.image.atomic.cmpswap.1d.i128.i32(i128 %cmp, i128 %data, i32 %s, <8 x i32> %rsrc, i32 0, i32 0)
+  store i128 %v, ptr addrspace(1) %out
+  ret void
+}
+
+declare <3 x i32> @llvm.amdgcn.image.atomic.swap.1d.v3i32.i32(<3 x i32>, i32, <8 x i32>, i32, i32)
+declare <3 x i16> @llvm.amdgcn.image.atomic.swap.1d.v3i16.i32(<3 x i16>, i32, <8 x i32>, i32, i32)
+declare bfloat @llvm.amdgcn.image.atomic.swap.1d.bf16.i32(bfloat, i32, <8 x i32>, i32, i32)
+declare i128 @llvm.amdgcn.image.atomic.swap.1d.i128.i32(i128, i32, <8 x i32>, i32, i32)
+declare i128 @llvm.amdgcn.image.atomic.cmpswap.1d.i128.i32(i128, i128, i32, <8 x i32>, i32, i32)

``````````

</details>


https://github.com/llvm/llvm-project/pull/210366