[llvm] [AMDGPU] Fix type of SIlds / AMDGPUISD::LDS node (PR #210340)

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llvmorg-github-actions[bot] wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-amdgpu

Author: Jay Foad (jayfoad)

<details>
<summary>Changes</summary>

iPTR means i64 here, but this node operates on 32-bit LDS addresses.


---
Full diff: https://github.com/llvm/llvm-project/pull/210340.diff


2 Files Affected:

- (modified) llvm/lib/Target/AMDGPU/AMDGPUSelectionDAGInfo.cpp (-2) 
- (modified) llvm/lib/Target/AMDGPU/SIInstrInfo.td (+1-1) 


``````````diff
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSelectionDAGInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPUSelectionDAGInfo.cpp
index 5b8ee5fbcf9dc..814cc811331b1 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUSelectionDAGInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUSelectionDAGInfo.cpp
@@ -51,8 +51,6 @@ void AMDGPUSelectionDAGInfo::verifyTargetNode(const SelectionDAG &DAG,
   case AMDGPUISD::ELSE:
   case AMDGPUISD::LOOP:
     // operand #1 must have type i1, but has type i32/i64
-  case AMDGPUISD::LDS:
-    // result #0 must have type i64 (iPTR), but has type i32
     return;
   }
   SelectionDAGGenTargetInfo::verifyTargetNode(DAG, N);
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td b/llvm/lib/Target/AMDGPU/SIInstrInfo.td
index 7be067c085b5f..714627bee2a2c 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td
@@ -275,7 +275,7 @@ def SIpc_add_rel_offset64 : SDNode<"AMDGPUISD::PC_ADD_REL_OFFSET64",
 >;
 
 def SIlds : SDNode<"AMDGPUISD::LDS",
-  SDTypeProfile<1, 1, [SDTCisVT<0, iPTR>, SDTCisSameAs<0,1>]>
+  SDTypeProfile<1, 1, [SDTCisVT<0, i32>, SDTCisSameAs<0,1>]>
 >;
 
 def SIload_d16_lo : SDNode<"AMDGPUISD::LOAD_D16_LO",

``````````

</details>


https://github.com/llvm/llvm-project/pull/210340