[llvm] [LV] Add additional SCEV expansion tests with AddRecs. (NFC) (PR #210159)

Florian Hahn via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 17 03:42:51 PDT 2026


================
@@ -357,6 +357,212 @@ exit:
   ret void
 }
 
+define void @addrec_outer_iv_narrow(ptr %dst) {
+; CHECK-LABEL: VPlan for loop in 'addrec_outer_iv_narrow'
+; CHECK:  VPlan 'Final VPlan for VF={4},UF={1}' {
+; CHECK-NEXT:  Live-in ir<%0> = original trip-count
+; CHECK-EMPTY:
+; CHECK-NEXT:  ir-bb<outer>:
+; CHECK-NEXT:    IR   %indvar = phi i64 [ %indvar.next, %outer.latch ], [ 0, %entry ]
+; CHECK-NEXT:    IR   %outer.iv = phi i32 [ 0, %entry ], [ %outer.iv.next, %outer.latch ]
+; CHECK-NEXT:    IR   %0 = add i64 %indvar, 5
+; CHECK-NEXT:    IR   %ext = zext i32 %outer.iv to i64
+; CHECK-NEXT:  Successor(s): vector.ph
+;
+entry:
+  br label %outer
+
+outer:
+  %outer.iv = phi i32 [ 0, %entry ], [ %outer.iv.next, %outer.latch ]
+  %ext = zext i32 %outer.iv to i64
+  br label %inner
+
+inner:
+  %iv = phi i64 [ 0, %outer ], [ %iv.next, %inner ]
+  %gep = getelementptr i8, ptr %dst, i64 %iv
+  store i8 0, ptr %gep
+  %iv.next = add nuw i64 %iv, 1
+  %bound = add i64 %ext, 5
----------------
fhahn wrote:

it is not needed, bu avoids having an extra, unrelated instruction in the checks

https://github.com/llvm/llvm-project/pull/210159


More information about the llvm-commits mailing list