[llvm] [AMDGPU] Improve codegen for copysign(x, fneg(y)) (PR #207178)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 13 04:54:07 PDT 2026


================
@@ -18090,6 +18090,12 @@ SDValue DAGCombiner::visitBITCAST(SDNode *N) {
   //                     (xor (bitcast cst), (bitcast x)), 0),
   //                    signbit)
   //     (xor (bitcast cst) (build_pair flipbit, flipbit))
+  if (N0.getOpcode() == ISD::FCOPYSIGN && N0->hasOneUse() &&
+      isa<ConstantFPSDNode>(N0.getOperand(0)) && VT.isInteger() &&
+      !VT.isVector() && N0.getOperand(1).getOpcode() == ISD::FNEG &&
----------------
arsenm wrote:

Don't restrict to scalars 

https://github.com/llvm/llvm-project/pull/207178


More information about the llvm-commits mailing list