[llvm] [X86] combineINSERT_SUBVECTOR - use peekThroughBitcastsAndExtracts helper to match target shuffles as well. NFC. (PR #209803)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 15 08:51:14 PDT 2026
https://github.com/RKSimon created https://github.com/llvm/llvm-project/pull/209803
We were always checking if the result of peekThroughBitcastsAndExtracts was a target shuffle - so let the helper do it for us.
Makes it easier for future handling of faux shuffles as well.
>From d56f72f31ab3d448a18ba965906762d58bc1a2c7 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: Wed, 15 Jul 2026 16:49:06 +0100
Subject: [PATCH] [X86] combineINSERT_SUBVECTOR - use
peekThroughBitcastsAndExtracts helper to match target shuffles as well. NFC.
We were always checking if the result of peekThroughBitcastsAndExtracts was a target shuffle - so let the helper do it for us.
Makes it easier for future handling of faux shuffles as well.
---
llvm/lib/Target/X86/X86ISelLowering.cpp | 12 ++++--------
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index e02129525dd00..bb4b13e4feca4 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -61527,11 +61527,11 @@ static SDValue combineINSERT_SUBVECTOR(SDNode *N, SelectionDAG &DAG,
}
}
- auto peekThroughBitcastsAndExtracts = [](SDValue V) {
+ auto isFoldableAsShuffle = [](SDValue V) {
while (V.getOpcode() == ISD::BITCAST ||
V.getOpcode() == ISD::EXTRACT_SUBVECTOR)
V = V.getOperand(0);
- return V;
+ return isTargetShuffle(V.getOpcode());
};
// Match concat_vector style patterns.
@@ -61553,10 +61553,7 @@ static SDValue combineINSERT_SUBVECTOR(SDNode *N, SelectionDAG &DAG,
SubVectorOps[0], DAG.getVectorIdxConstant(0, dl));
// Attempt to recursively combine to a shuffle.
- if (all_of(SubVectorOps, [&](SDValue SubOp) {
- SubOp = peekThroughBitcastsAndExtracts(SubOp);
- return isTargetShuffle(SubOp.getOpcode());
- })) {
+ if (all_of(SubVectorOps, isFoldableAsShuffle)) {
SDValue Op(N, 0);
if (SDValue Res = combineX86ShufflesRecursively(Op, DAG, Subtarget))
return Res;
@@ -61610,8 +61607,7 @@ static SDValue combineINSERT_SUBVECTOR(SDNode *N, SelectionDAG &DAG,
}
// Attempt to recursively combine to a shuffle.
- if (isTargetShuffle(peekThroughBitcastsAndExtracts(Vec).getOpcode()) &&
- isTargetShuffle(peekThroughBitcastsAndExtracts(SubVec).getOpcode())) {
+ if (isFoldableAsShuffle(Vec) && isFoldableAsShuffle(SubVec)) {
SDValue Op(N, 0);
if (SDValue Res = combineX86ShufflesRecursively(Op, DAG, Subtarget))
return Res;
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