[llvm] [X86][CodeGen] Support partial-reduce dot products (PR #205373)

[Evgenii Kudriashov via llvm-commits]

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e-kud wrote:

```suggestion
    if (Subtarget.useAVX512Regs())
      setPartialReduceMLAAction(ISD::PARTIAL_REDUCE_SUMLA, MVT::v16i32,
                                MVT::v64i8, Custom);
    if (Subtarget.hasVLX()) {
      setPartialReduceMLAAction(ISD::PARTIAL_REDUCE_SUMLA, MVT::v8i32,
                                MVT::v32i8, Custom);
      setPartialReduceMLAAction(ISD::PARTIAL_REDUCE_SUMLA, MVT::v4i32,
                                MVT::v16i8, Custom);
    }
  } else if (Subtarget.hasAVXVNNI()) {
```

I believe it should be the opposite.
1) When you enable 512 bit vectors when `useAVX512Regs` is false, you can't have 512bit types, so the SDAG will fail before reaching lowering see https://github.com/llvm/llvm-project/pull/208292 and how to trigger this behavior with `prefer-vector-width`
2) Doesn't the general infrastructure handles splitting 512bit versions into smaller parts? If no, we probably need to support custom narrowing.

https://github.com/llvm/llvm-project/pull/205373