[llvm] [AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (PR #209620)
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 15 07:25:33 PDT 2026
================
@@ -432,23 +433,42 @@ AMDGPULowerVGPREncoding::handleCoissue(MachineBasicBlock::instr_iterator I) {
return I;
}
+/// Returns whether \p MI is a S_SETREG_IMM32_B32(MODE).
+static bool isSetregMode(const MachineInstr &MI, const SIInstrInfo &TII) {
+ if (MI.getOpcode() != AMDGPU::S_SETREG_IMM32_B32)
+ return false;
+
+ const MachineOperand *SIMM16Op =
+ TII.getNamedOperand(MI, AMDGPU::OpName::simm16);
+ auto [HwRegId, _Offset, _Size] =
+ AMDGPU::Hwreg::HwregEncoding::decode(SIMM16Op->getImm());
+ return HwRegId == AMDGPU::Hwreg::ID_MODE;
+}
+
bool AMDGPULowerVGPREncoding::needNopBeforeSetVGPRMSB(
MachineBasicBlock::instr_iterator I) {
- while (I != MBB->begin()) {
- I = std::prev(I);
- if (I->getOpcode() == AMDGPU::S_SETREG_IMM32_B32) {
- MachineOperand *SIMM16Op =
- TII->getNamedOperand(*I, AMDGPU::OpName::simm16);
- auto [HwRegId, Offset, Size] =
- AMDGPU::Hwreg::HwregEncoding::decode(SIMM16Op->getImm());
- if (HwRegId == AMDGPU::Hwreg::ID_MODE)
+ MachineBasicBlock *CurrentMBB = MBB;
+ MachineBasicBlock::iterator CurrentInstr = I;
----------------
jayfoad wrote:
Any particular reason to convert from `instr_iterator` to `iterator` instead of just reusing `I`?
https://github.com/llvm/llvm-project/pull/209620
More information about the llvm-commits
mailing list