[llvm] [SLP][NFC]Add a test with GEPs under the same select condition, NFC (PR #210173)

Alexey Bataev via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 16 13:47:09 PDT 2026


https://github.com/alexey-bataev created https://github.com/llvm/llvm-project/pull/210173

None

>From e9443628036e778a59337695fbb8b40ac1c3142c Mon Sep 17 00:00:00 2001
From: Alexey Bataev <a.bataev at outlook.com>
Date: Thu, 16 Jul 2026 13:46:56 -0700
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=
 =?UTF-8?q?l=20version?=
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Created using spr 1.3.7
---
 .../SLPVectorizer/X86/masked-blended-loads.ll | 187 ++++++++++++++++++
 1 file changed, 187 insertions(+)
 create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/masked-blended-loads.ll

diff --git a/llvm/test/Transforms/SLPVectorizer/X86/masked-blended-loads.ll b/llvm/test/Transforms/SLPVectorizer/X86/masked-blended-loads.ll
new file mode 100644
index 0000000000000..dd8b0e584bcfc
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/masked-blended-loads.ll
@@ -0,0 +1,187 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt -passes=slp-vectorizer -S < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=skx | FileCheck %s
+
+define <16 x i32> @test(ptr %a, ptr %b, <16 x i32> %c, <16 x i32> %d) {
+; CHECK-LABEL: define <16 x i32> @test(
+; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]], <16 x i32> [[C:%.*]], <16 x i32> [[D:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT:  [[ENTRY:.*:]]
+; CHECK-NEXT:    [[TMP0:%.*]] = icmp eq <16 x i32> [[D]], zeroinitializer
+; CHECK-NEXT:    [[TMP1:%.*]] = extractelement <16 x i1> [[TMP0]], i64 0
+; CHECK-NEXT:    [[A_B:%.*]] = select i1 [[TMP1]], ptr [[A]], ptr [[B]]
+; CHECK-NEXT:    [[L0:%.*]] = load i32, ptr [[A_B]], align 4
+; CHECK-NEXT:    [[VECINS:%.*]] = insertelement <16 x i32> [[C]], i32 [[L0]], i64 0
+; CHECK-NEXT:    [[TMP2:%.*]] = extractelement <16 x i1> [[TMP0]], i64 1
+; CHECK-NEXT:    [[A_SINK_1:%.*]] = select i1 [[TMP2]], ptr [[A]], ptr [[B]]
+; CHECK-NEXT:    [[GEP_1:%.*]] = getelementptr inbounds i8, ptr [[A_SINK_1]], i64 4
+; CHECK-NEXT:    [[L1:%.*]] = load i32, ptr [[GEP_1]], align 4
+; CHECK-NEXT:    [[VECINS_1:%.*]] = insertelement <16 x i32> [[VECINS]], i32 [[L1]], i64 1
+; CHECK-NEXT:    [[TMP3:%.*]] = extractelement <16 x i1> [[TMP0]], i64 2
+; CHECK-NEXT:    [[A_SINK_2:%.*]] = select i1 [[TMP3]], ptr [[A]], ptr [[B]]
+; CHECK-NEXT:    [[GEP_2:%.*]] = getelementptr inbounds i8, ptr [[A_SINK_2]], i64 8
+; CHECK-NEXT:    [[L2:%.*]] = load i32, ptr [[GEP_2]], align 4
+; CHECK-NEXT:    [[VECINS_2:%.*]] = insertelement <16 x i32> [[VECINS_1]], i32 [[L2]], i64 2
+; CHECK-NEXT:    [[TMP4:%.*]] = extractelement <16 x i1> [[TMP0]], i64 3
+; CHECK-NEXT:    [[A_SINK_3:%.*]] = select i1 [[TMP4]], ptr [[A]], ptr [[B]]
+; CHECK-NEXT:    [[GEP_3:%.*]] = getelementptr inbounds i8, ptr [[A_SINK_3]], i64 12
+; CHECK-NEXT:    [[L3:%.*]] = load i32, ptr [[GEP_3]], align 4
+; CHECK-NEXT:    [[VECINS_3:%.*]] = insertelement <16 x i32> [[VECINS_2]], i32 [[L3]], i64 3
+; CHECK-NEXT:    [[TMP5:%.*]] = extractelement <16 x i1> [[TMP0]], i64 4
+; CHECK-NEXT:    [[A_SINK_4:%.*]] = select i1 [[TMP5]], ptr [[A]], ptr [[B]]
+; CHECK-NEXT:    [[GEP_4:%.*]] = getelementptr inbounds i8, ptr [[A_SINK_4]], i64 16
+; CHECK-NEXT:    [[L4:%.*]] = load i32, ptr [[GEP_4]], align 4
+; CHECK-NEXT:    [[VECINS_4:%.*]] = insertelement <16 x i32> [[VECINS_3]], i32 [[L4]], i64 4
+; CHECK-NEXT:    [[TMP6:%.*]] = extractelement <16 x i1> [[TMP0]], i64 5
+; CHECK-NEXT:    [[A_SINK_5:%.*]] = select i1 [[TMP6]], ptr [[A]], ptr [[B]]
+; CHECK-NEXT:    [[GEP_5:%.*]] = getelementptr inbounds i8, ptr [[A_SINK_5]], i64 20
+; CHECK-NEXT:    [[L5:%.*]] = load i32, ptr [[GEP_5]], align 4
+; CHECK-NEXT:    [[VECINS_5:%.*]] = insertelement <16 x i32> [[VECINS_4]], i32 [[L5]], i64 5
+; CHECK-NEXT:    [[TMP7:%.*]] = extractelement <16 x i1> [[TMP0]], i64 6
+; CHECK-NEXT:    [[A_SINK_6:%.*]] = select i1 [[TMP7]], ptr [[A]], ptr [[B]]
+; CHECK-NEXT:    [[GEP_6:%.*]] = getelementptr inbounds i8, ptr [[A_SINK_6]], i64 24
+; CHECK-NEXT:    [[L6:%.*]] = load i32, ptr [[GEP_6]], align 4
+; CHECK-NEXT:    [[VECINS_6:%.*]] = insertelement <16 x i32> [[VECINS_5]], i32 [[L6]], i64 6
+; CHECK-NEXT:    [[TMP8:%.*]] = extractelement <16 x i1> [[TMP0]], i64 7
+; CHECK-NEXT:    [[A_SINK_7:%.*]] = select i1 [[TMP8]], ptr [[A]], ptr [[B]]
+; CHECK-NEXT:    [[GEP_7:%.*]] = getelementptr inbounds i8, ptr [[A_SINK_7]], i64 28
+; CHECK-NEXT:    [[L7:%.*]] = load i32, ptr [[GEP_7]], align 4
+; CHECK-NEXT:    [[VECINS_7:%.*]] = insertelement <16 x i32> [[VECINS_6]], i32 [[L7]], i64 7
+; CHECK-NEXT:    [[TMP9:%.*]] = extractelement <16 x i1> [[TMP0]], i64 8
+; CHECK-NEXT:    [[A_SINK_8:%.*]] = select i1 [[TMP9]], ptr [[A]], ptr [[B]]
+; CHECK-NEXT:    [[GEP_8:%.*]] = getelementptr inbounds i8, ptr [[A_SINK_8]], i64 32
+; CHECK-NEXT:    [[L8:%.*]] = load i32, ptr [[GEP_8]], align 4
+; CHECK-NEXT:    [[VECINS_8:%.*]] = insertelement <16 x i32> [[VECINS_7]], i32 [[L8]], i64 8
+; CHECK-NEXT:    [[TMP10:%.*]] = extractelement <16 x i1> [[TMP0]], i64 9
+; CHECK-NEXT:    [[A_SINK_9:%.*]] = select i1 [[TMP10]], ptr [[A]], ptr [[B]]
+; CHECK-NEXT:    [[GEP_9:%.*]] = getelementptr inbounds i8, ptr [[A_SINK_9]], i64 36
+; CHECK-NEXT:    [[L9:%.*]] = load i32, ptr [[GEP_9]], align 4
+; CHECK-NEXT:    [[VECINS_9:%.*]] = insertelement <16 x i32> [[VECINS_8]], i32 [[L9]], i64 9
+; CHECK-NEXT:    [[TMP11:%.*]] = extractelement <16 x i1> [[TMP0]], i64 10
+; CHECK-NEXT:    [[A_SINK_10:%.*]] = select i1 [[TMP11]], ptr [[A]], ptr [[B]]
+; CHECK-NEXT:    [[GEP_10:%.*]] = getelementptr inbounds i8, ptr [[A_SINK_10]], i64 40
+; CHECK-NEXT:    [[L10:%.*]] = load i32, ptr [[GEP_10]], align 4
+; CHECK-NEXT:    [[VECINS_10:%.*]] = insertelement <16 x i32> [[VECINS_9]], i32 [[L10]], i64 10
+; CHECK-NEXT:    [[TMP12:%.*]] = extractelement <16 x i1> [[TMP0]], i64 11
+; CHECK-NEXT:    [[A_SINK_11:%.*]] = select i1 [[TMP12]], ptr [[A]], ptr [[B]]
+; CHECK-NEXT:    [[GEP_11:%.*]] = getelementptr inbounds i8, ptr [[A_SINK_11]], i64 44
+; CHECK-NEXT:    [[L11:%.*]] = load i32, ptr [[GEP_11]], align 4
+; CHECK-NEXT:    [[VECINS_11:%.*]] = insertelement <16 x i32> [[VECINS_10]], i32 [[L11]], i64 11
+; CHECK-NEXT:    [[TMP13:%.*]] = extractelement <16 x i1> [[TMP0]], i64 12
+; CHECK-NEXT:    [[A_SINK_12:%.*]] = select i1 [[TMP13]], ptr [[A]], ptr [[B]]
+; CHECK-NEXT:    [[GEP_12:%.*]] = getelementptr inbounds i8, ptr [[A_SINK_12]], i64 48
+; CHECK-NEXT:    [[L12:%.*]] = load i32, ptr [[GEP_12]], align 4
+; CHECK-NEXT:    [[VECINS_12:%.*]] = insertelement <16 x i32> [[VECINS_11]], i32 [[L12]], i64 12
+; CHECK-NEXT:    [[TMP14:%.*]] = extractelement <16 x i1> [[TMP0]], i64 13
+; CHECK-NEXT:    [[A_SINK_13:%.*]] = select i1 [[TMP14]], ptr [[A]], ptr [[B]]
+; CHECK-NEXT:    [[GEP_13:%.*]] = getelementptr inbounds i8, ptr [[A_SINK_13]], i64 52
+; CHECK-NEXT:    [[L13:%.*]] = load i32, ptr [[GEP_13]], align 4
+; CHECK-NEXT:    [[VECINS_13:%.*]] = insertelement <16 x i32> [[VECINS_12]], i32 [[L13]], i64 13
+; CHECK-NEXT:    [[TMP15:%.*]] = extractelement <16 x i1> [[TMP0]], i64 14
+; CHECK-NEXT:    [[A_SINK_14:%.*]] = select i1 [[TMP15]], ptr [[A]], ptr [[B]]
+; CHECK-NEXT:    [[GEP_14:%.*]] = getelementptr inbounds i8, ptr [[A_SINK_14]], i64 56
+; CHECK-NEXT:    [[L14:%.*]] = load i32, ptr [[GEP_14]], align 4
+; CHECK-NEXT:    [[VECINS_14:%.*]] = insertelement <16 x i32> [[VECINS_13]], i32 [[L14]], i64 14
+; CHECK-NEXT:    [[TMP16:%.*]] = extractelement <16 x i1> [[TMP0]], i64 15
+; CHECK-NEXT:    [[A_SINK_15:%.*]] = select i1 [[TMP16]], ptr [[A]], ptr [[B]]
+; CHECK-NEXT:    [[GEP_15:%.*]] = getelementptr inbounds i8, ptr [[A_SINK_15]], i64 60
+; CHECK-NEXT:    [[L15:%.*]] = load i32, ptr [[GEP_15]], align 4
+; CHECK-NEXT:    [[VECINS_15:%.*]] = insertelement <16 x i32> [[VECINS_14]], i32 [[L15]], i64 15
+; CHECK-NEXT:    ret <16 x i32> [[VECINS_15]]
+;
+entry:
+  %vecext = extractelement <16 x i32> %d, i64 0
+  %tobool.not = icmp eq i32 %vecext, 0
+  %a.b = select i1 %tobool.not, ptr %a, ptr %b
+  %l0 = load i32, ptr %a.b, align 4
+  %vecins = insertelement <16 x i32> %c, i32 %l0, i64 0
+  %vecext.1 = extractelement <16 x i32> %d, i64 1
+  %tobool.not.1 = icmp eq i32 %vecext.1, 0
+  %a.sink.1 = select i1 %tobool.not.1, ptr %a, ptr %b
+  %gep.1 = getelementptr inbounds i8, ptr %a.sink.1, i64 4
+  %l1 = load i32, ptr %gep.1, align 4
+  %vecins.1 = insertelement <16 x i32> %vecins, i32 %l1, i64 1
+  %vecext.2 = extractelement <16 x i32> %d, i64 2
+  %tobool.not.2 = icmp eq i32 %vecext.2, 0
+  %a.sink.2 = select i1 %tobool.not.2, ptr %a, ptr %b
+  %gep.2 = getelementptr inbounds i8, ptr %a.sink.2, i64 8
+  %l2 = load i32, ptr %gep.2, align 4
+  %vecins.2 = insertelement <16 x i32> %vecins.1, i32 %l2, i64 2
+  %vecext.3 = extractelement <16 x i32> %d, i64 3
+  %tobool.not.3 = icmp eq i32 %vecext.3, 0
+  %a.sink.3 = select i1 %tobool.not.3, ptr %a, ptr %b
+  %gep.3 = getelementptr inbounds i8, ptr %a.sink.3, i64 12
+  %l3 = load i32, ptr %gep.3, align 4
+  %vecins.3 = insertelement <16 x i32> %vecins.2, i32 %l3, i64 3
+  %vecext.4 = extractelement <16 x i32> %d, i64 4
+  %tobool.not.4 = icmp eq i32 %vecext.4, 0
+  %a.sink.4 = select i1 %tobool.not.4, ptr %a, ptr %b
+  %gep.4 = getelementptr inbounds i8, ptr %a.sink.4, i64 16
+  %l4 = load i32, ptr %gep.4, align 4
+  %vecins.4 = insertelement <16 x i32> %vecins.3, i32 %l4, i64 4
+  %vecext.5 = extractelement <16 x i32> %d, i64 5
+  %tobool.not.5 = icmp eq i32 %vecext.5, 0
+  %a.sink.5 = select i1 %tobool.not.5, ptr %a, ptr %b
+  %gep.5 = getelementptr inbounds i8, ptr %a.sink.5, i64 20
+  %l5 = load i32, ptr %gep.5, align 4
+  %vecins.5 = insertelement <16 x i32> %vecins.4, i32 %l5, i64 5
+  %vecext.6 = extractelement <16 x i32> %d, i64 6
+  %tobool.not.6 = icmp eq i32 %vecext.6, 0
+  %a.sink.6 = select i1 %tobool.not.6, ptr %a, ptr %b
+  %gep.6 = getelementptr inbounds i8, ptr %a.sink.6, i64 24
+  %l6 = load i32, ptr %gep.6, align 4
+  %vecins.6 = insertelement <16 x i32> %vecins.5, i32 %l6, i64 6
+  %vecext.7 = extractelement <16 x i32> %d, i64 7
+  %tobool.not.7 = icmp eq i32 %vecext.7, 0
+  %a.sink.7 = select i1 %tobool.not.7, ptr %a, ptr %b
+  %gep.7 = getelementptr inbounds i8, ptr %a.sink.7, i64 28
+  %l7 = load i32, ptr %gep.7, align 4
+  %vecins.7 = insertelement <16 x i32> %vecins.6, i32 %l7, i64 7
+  %vecext.8 = extractelement <16 x i32> %d, i64 8
+  %tobool.not.8 = icmp eq i32 %vecext.8, 0
+  %a.sink.8 = select i1 %tobool.not.8, ptr %a, ptr %b
+  %gep.8 = getelementptr inbounds i8, ptr %a.sink.8, i64 32
+  %l8 = load i32, ptr %gep.8, align 4
+  %vecins.8 = insertelement <16 x i32> %vecins.7, i32 %l8, i64 8
+  %vecext.9 = extractelement <16 x i32> %d, i64 9
+  %tobool.not.9 = icmp eq i32 %vecext.9, 0
+  %a.sink.9 = select i1 %tobool.not.9, ptr %a, ptr %b
+  %gep.9 = getelementptr inbounds i8, ptr %a.sink.9, i64 36
+  %l9 = load i32, ptr %gep.9, align 4
+  %vecins.9 = insertelement <16 x i32> %vecins.8, i32 %l9, i64 9
+  %vecext.10 = extractelement <16 x i32> %d, i64 10
+  %tobool.not.10 = icmp eq i32 %vecext.10, 0
+  %a.sink.10 = select i1 %tobool.not.10, ptr %a, ptr %b
+  %gep.10 = getelementptr inbounds i8, ptr %a.sink.10, i64 40
+  %l10 = load i32, ptr %gep.10, align 4
+  %vecins.10 = insertelement <16 x i32> %vecins.9, i32 %l10, i64 10
+  %vecext.11 = extractelement <16 x i32> %d, i64 11
+  %tobool.not.11 = icmp eq i32 %vecext.11, 0
+  %a.sink.11 = select i1 %tobool.not.11, ptr %a, ptr %b
+  %gep.11 = getelementptr inbounds i8, ptr %a.sink.11, i64 44
+  %l11 = load i32, ptr %gep.11, align 4
+  %vecins.11 = insertelement <16 x i32> %vecins.10, i32 %l11, i64 11
+  %vecext.12 = extractelement <16 x i32> %d, i64 12
+  %tobool.not.12 = icmp eq i32 %vecext.12, 0
+  %a.sink.12 = select i1 %tobool.not.12, ptr %a, ptr %b
+  %gep.12 = getelementptr inbounds i8, ptr %a.sink.12, i64 48
+  %l12 = load i32, ptr %gep.12, align 4
+  %vecins.12 = insertelement <16 x i32> %vecins.11, i32 %l12, i64 12
+  %vecext.13 = extractelement <16 x i32> %d, i64 13
+  %tobool.not.13 = icmp eq i32 %vecext.13, 0
+  %a.sink.13 = select i1 %tobool.not.13, ptr %a, ptr %b
+  %gep.13 = getelementptr inbounds i8, ptr %a.sink.13, i64 52
+  %l13 = load i32, ptr %gep.13, align 4
+  %vecins.13 = insertelement <16 x i32> %vecins.12, i32 %l13, i64 13
+  %vecext.14 = extractelement <16 x i32> %d, i64 14
+  %tobool.not.14 = icmp eq i32 %vecext.14, 0
+  %a.sink.14 = select i1 %tobool.not.14, ptr %a, ptr %b
+  %gep.14 = getelementptr inbounds i8, ptr %a.sink.14, i64 56
+  %l14 = load i32, ptr %gep.14, align 4
+  %vecins.14 = insertelement <16 x i32> %vecins.13, i32 %l14, i64 14
+  %vecext.15 = extractelement <16 x i32> %d, i64 15
+  %tobool.not.15 = icmp eq i32 %vecext.15, 0
+  %a.sink.15 = select i1 %tobool.not.15, ptr %a, ptr %b
+  %gep.15 = getelementptr inbounds i8, ptr %a.sink.15, i64 60
+  %l15 = load i32, ptr %gep.15, align 4
+  %vecins.15 = insertelement <16 x i32> %vecins.14, i32 %l15, i64 15
+  ret <16 x i32> %vecins.15
+}



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