[llvm] AMDGPU: Migrate more tests to amdgpu triples (PR #210113)

via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 16 10:14:55 PDT 2026


llvmorg-github-actions[bot] wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-amdgpu

Author: Matt Arsenault (arsenm)

<details>
<summary>Changes</summary>

These were missed in previous conversions for whatever reason.
Some are new tests added after I did the bulk migration, some
are special cases.

---

Patch is 404.10 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/210113.diff


180 Files Affected:

- (modified) llvm/test/Analysis/CostModel/AMDGPU/fsub.ll (+1-1) 
- (modified) llvm/test/Analysis/CostModel/AMDGPU/fused_costs.ll (-2) 
- (modified) llvm/test/Analysis/DotMachineCFG/AMDGPU/functions.mir (+2-2) 
- (modified) llvm/test/Analysis/DotMachineCFG/AMDGPU/irreducible.mir (+4-4) 
- (modified) llvm/test/Analysis/Lint/const-store.ll (+2-2) 
- (modified) llvm/test/Analysis/MemorySSA/ptr-const-mem.ll (+1-1) 
- (modified) llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir (+2-2) 
- (modified) llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics-gmir.mir (+2-2) 
- (modified) llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics.mir (+2-2) 
- (modified) llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir (+2-2) 
- (modified) llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir (+2-2) 
- (modified) llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/branch-outside-gmir.mir (+2-2) 
- (modified) llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir (+2-2) 
- (modified) llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/exit-divergence-gmir.mir (+2-2) 
- (modified) llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/irreducible-2-gmir.mir (+2-2) 
- (modified) llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/join-loopexit-gmir.mir (+2-2) 
- (modified) llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/loads-gmir.mir (+2-2) 
- (modified) llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform-gmir.mir (+2-2) 
- (modified) llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir (+2-2) 
- (modified) llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/hidden-diverge.mir (+2-2) 
- (modified) llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/irreducible-1.mir (+2-2) 
- (modified) llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/irreducible-2.ll (+1-1) 
- (modified) llvm/test/Assembler/amdgpu-image-atomic-attributes.ll (+2-2) 
- (modified) llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extendedLLTs-err.mir (+1-1) 
- (modified) llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extendedLLTs.mir (+1-1) 
- (modified) llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.offset-split.ll (+2-2) 
- (modified) llvm/test/CodeGen/AMDGPU/GlobalISel/merge-values-s16-true16.ll (+1-1) 
- (modified) llvm/test/CodeGen/AMDGPU/atomic_optimizations_dpp_lds_expected_active_lanes.ll (+6-6) 
- (modified) llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll (-2) 
- (modified) llvm/test/CodeGen/AMDGPU/coalescer-subranges-another-copymi-not-live.mir (-2) 
- (modified) llvm/test/CodeGen/AMDGPU/coalescer-subranges-another-prune-error.mir (-3) 
- (modified) llvm/test/CodeGen/AMDGPU/coalescer-subregjoin-fullcopy.mir (-2) 
- (modified) llvm/test/CodeGen/AMDGPU/coalescer-with-subregs-bad-identical.mir (-3) 
- (modified) llvm/test/CodeGen/AMDGPU/coexec-rewrite-mfma.ll (-2) 
- (modified) llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll (+2-2) 
- (modified) llvm/test/CodeGen/AMDGPU/eliminate-frame-index-flat-scratch-svs.mir (+2-2) 
- (modified) llvm/test/CodeGen/AMDGPU/expand-mov-b64-globaladdr-hsa.ll (+1-1) 
- (modified) llvm/test/CodeGen/AMDGPU/expand-mov-b64-globaladdr-rel32.mir (+1-1) 
- (modified) llvm/test/CodeGen/AMDGPU/expand-mov-b64-globaladdr.ll (+2-2) 
- (modified) llvm/test/CodeGen/AMDGPU/expand-variadic-call.ll (+1-1) 
- (modified) llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.ll (-4) 
- (modified) llvm/test/CodeGen/AMDGPU/finalize-isel-kill-scc-vcc.mir (+1-1) 
- (modified) llvm/test/CodeGen/AMDGPU/flat-error-unsupported-gpu-hsa.ll (+1-1) 
- (modified) llvm/test/CodeGen/AMDGPU/issue196582-late-codegenprepare-crash-non-po2.ll (+1-1) 
- (modified) llvm/test/CodeGen/AMDGPU/lds-dma-workgroup-release.ll (+1-1) 
- (modified) llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load-exported.ll (+4-4) 
- (modified) llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.format.i8.xfail.ll (+2-2) 
- (modified) llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-calls.ll (+8-8) 
- (modified) llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-constants.ll (+30-57) 
- (modified) llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization-alignment.ll (+129-129) 
- (modified) llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization.ll (+176-176) 
- (modified) llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-control-flow.ll (+14-14) 
- (modified) llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-mem-transfer.ll (+3-3) 
- (modified) llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-memops.ll (+8-8) 
- (modified) llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-p7-in-memory.ll (+7-7) 
- (modified) llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-pointer-ops.ll (+50-56) 
- (modified) llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-unoptimized-debug-data.ll (+57-57) 
- (modified) llvm/test/CodeGen/AMDGPU/mcinstlower-external-symbol-reloc.mir (+2-2) 
- (modified) llvm/test/CodeGen/AMDGPU/noop-shader-O0.ll (-2) 
- (modified) llvm/test/CodeGen/AMDGPU/pack-half-to-lshl-or.ll (+6-6) 
- (modified) llvm/test/CodeGen/AMDGPU/packed_shl64_combine.ll (+1-1) 
- (modified) llvm/test/CodeGen/AMDGPU/phi-elimination-assertion.mir (+2-2) 
- (modified) llvm/test/CodeGen/AMDGPU/phi-elimination-end-cf.mir (+2-2) 
- (modified) llvm/test/CodeGen/AMDGPU/rewrite-out-arguments-2.ll (+1-1) 
- (modified) llvm/test/CodeGen/AMDGPU/s-barrier-signal-var-gep.ll (+4-4) 
- (modified) llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-dead-def-join.mir (-1) 
- (modified) llvm/test/CodeGen/AMDGPU/si-pre-allocate-wwwmregs-dbg-noreg.mir (+6-7) 
- (modified) llvm/test/CodeGen/AMDGPU/strict_fptrunc_bf16.ll (+2-2) 
- (modified) llvm/test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll (-1) 
- (modified) llvm/test/CodeGen/AMDGPU/v_mov_b64-isel.ll (+3-3) 
- (modified) llvm/test/CodeGen/AMDGPU/vgpr-setreg-pred-block.mir (+1-1) 
- (modified) llvm/test/CodeGen/Generic/GlobalISel/irtranslator-byte-type.ll (+1-1) 
- (modified) llvm/test/CodeGen/Generic/bfloat-op.ll (+1-1) 
- (modified) llvm/test/CodeGen/Generic/bfloat.ll (+1-1) 
- (modified) llvm/test/CodeGen/Generic/half-op.ll (+1-1) 
- (modified) llvm/test/CodeGen/Generic/half.ll (+1-1) 
- (modified) llvm/test/CodeGen/Generic/live-debug-label.ll (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/empty-custom-regmask.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/expected-target-index-name.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/intrinsics.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/invalid-frame-index-invalid-fixed-stack.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/invalid-frame-index-invalid-stack.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/invalid-frame-index-no-stack.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/invalid-frame-index.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/invalid-frame-index2.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/invalid-target-index-operand.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline-ir.mir (+5-5) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline.mir (+2-2) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/long-branch-reg-all-sgpr-used.ll (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/lr-split-flag.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-dynlds-align-invalid-case.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg-debug.ll (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir (+2-2) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-register-parse-error1.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-register-parse-error2.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/mfi-frame-offset-reg-class.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/mfi-parse-error-frame-offset-reg.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/mfi-parse-error-scratch-rsrc-reg.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/mfi-parse-error-stack-ptr-offset-reg.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/mfi-scratch-rsrc-reg-reg-class.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/mfi-stack-ptr-offset-reg-class.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/mir-canon-multi-def.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/mir-canon-multi.mir (+2-2) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/noconvergent-invalid.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/noconvergent.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/parse-lanemask-operand-empty-lanemask.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/parse-lanemask-operand-invalid-lanemask.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/parse-lanemask-operand-missing-lparen.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/parse-lanemask-operand-missing-rparen.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/parse-lanemask-operand.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/parse-order-reserved-regs.mir (+3-3) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/s_wait_alu_missing_operand_crash.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt_missing_operand_crash.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/sgpr-for-exec-copy-invalid-reg.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/spill-phys-vgprs-invalid.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/spill-phys-vgprs-not-a-reg.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/spill-phys-vgprs.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/stack-id-assert.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/stack-id.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/target-flags.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/target-index-operands.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/target-memoperands.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/vgpr-for-agpr-copy-invalid-reg.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/wwm-reserved-regs-invalid-reg.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/wwm-reserved-regs-not-a-reg.mir (+1-1) 
- (modified) llvm/test/CodeGen/MIR/AMDGPU/wwm-reserved-regs.mir (+2-2) 
- (modified) llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_do_not_internalize.ll (+4-4) 
- (modified) llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_mem_intrinsics.ll (+1-1) 
- (modified) llvm/test/Instrumentation/InstrProfiling/amdgpu-3d-grid.ll (+1-1) 
- (modified) llvm/test/Instrumentation/InstrProfiling/amdgpu-contiguous-counters.ll (+1-1) 
- (modified) llvm/test/Instrumentation/InstrProfiling/amdgpu-instrumentation.ll (+2-2) 
- (modified) llvm/test/Instrumentation/InstrProfiling/amdgpu-uniform-counters.ll (+1-1) 
- (modified) llvm/test/Instrumentation/InstrProfiling/amdgpu-wave32.ll (+1-1) 
- (modified) llvm/test/Instrumentation/InstrProfiling/amdgpu-wave64.ll (+1-1) 
- (modified) llvm/test/Instrumentation/InstrProfiling/platform.ll (+1-1) 
- (modified) llvm/test/LTO/AMDGPU/closed-world-assumption.ll (+3-3) 
- (modified) llvm/test/MachineVerifier/AMDGPU/undef-virt-reg-entry-block.mir (+1-1) 
- (modified) llvm/test/MachineVerifier/AMDGPU/verifier-implicit-virtreg-invalid-physreg-liveness.mir (+1-1) 
- (modified) llvm/test/MachineVerifier/AMDGPU/verify-implicit-def.mir (+1-1) 
- (modified) llvm/test/MachineVerifier/AMDGPU/writelane_m0.mir (+8-8) 
- (modified) llvm/test/MachineVerifier/convergencectrl/AMDGPU/cycles.mir (+1-1) 
- (modified) llvm/test/MachineVerifier/convergencectrl/AMDGPU/mixed2.mir (+1-1) 
- (modified) llvm/test/MachineVerifier/convergencectrl/AMDGPU/region-nesting.mir (+1-1) 
- (modified) llvm/test/MachineVerifier/stack-protector-offset.mir (+1-1) 
- (modified) llvm/test/ThinLTO/AMDGPU/force-import-all.ll (+2-2) 
- (modified) llvm/test/Transforms/Attributor/heap_to_stack_gpu.ll (+1-1) 
- (modified) llvm/test/Transforms/Attributor/memory_locations_gpu.ll (+1-1) 
- (modified) llvm/test/Transforms/Attributor/reduced/openmp_opt_constant_type_crash.ll (+1-1) 
- (modified) llvm/test/Transforms/Attributor/value-simplify-gpu.ll (+1-1) 
- (modified) llvm/test/Transforms/FunctionAttrs/make-buffer-rsrc.ll (-2) 
- (modified) llvm/test/Transforms/IndVarSimplify/AMDGPU/addrspace-7-doesnt-crash.ll (+1-1) 
- (modified) llvm/test/Transforms/InstCombine/AMDGPU/phi-with-incoming-from-load.ll (+1-1) 
- (modified) llvm/test/Transforms/InstCombine/AMDGPU/select-from-load.ll (+1-1) 
- (modified) llvm/test/Transforms/LICM/AMDGPU/buffer-rsrc-ptrs.ll (+1-1) 
- (modified) llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/adjust-alloca-alignment.ll (+5-5) 
- (modified) llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/dont-adjust-globalobj-alignment.ll (+2-2) 
- (modified) llvm/test/Transforms/LoopLoadElim/pr46854-adress-spaces.ll (+1-1) 
- (modified) llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-icmpzero-mixed-ptr-width.ll (+3-3) 
- (modified) llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-void-inseltpoison.ll (+1-1) 
- (modified) llvm/test/Transforms/LoopUnroll/AMDGPU/scev-mul-expansion-cost.ll (+1-1) 
- (modified) llvm/test/Transforms/OpenMP/add_attributes_amdgcn.ll (+1-1) 
- (modified) llvm/test/Transforms/OpenMP/barrier_removal.ll (+1-1) 
- (modified) llvm/test/Transforms/OpenMP/indirect_call_kernel_info_crash.ll (+1-1) 
- (modified) llvm/test/Transforms/OpenMP/spmdization_constant_prop.ll (+7-7) 
- (modified) llvm/test/Transforms/OpenMP/spmdization_kernel_env_dep.ll (+2-2) 
- (modified) llvm/test/Transforms/OpenMP/value-simplify-openmp-opt.ll (+1-1) 
- (modified) llvm/test/Transforms/PGOProfile/amdgpu-disable-value-profiling.ll (+1-1) 
- (modified) llvm/test/Transforms/PhaseOrdering/varargs.ll (+2-2) 
- (modified) llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/lower-gep.ll (+1-1) 
- (modified) llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/pr23975.ll (+1-1) 
- (modified) llvm/test/Transforms/StructurizeCFG/hoist-zerocost-nested.ll (+1-1) 
- (modified) llvm/test/Transforms/StructurizeCFG/rebuild-ssa-infinite-loop-inseltpoison.ll (+1-1) 
- (modified) llvm/test/Transforms/StructurizeCFG/rebuild-ssa-infinite-loop.ll (+1-1) 
- (modified) llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_no_merge_comments.ll (+1-1) 
- (modified) llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_no_merge_comments.ll.expected (+1-1) 
- (modified) llvm/test/tools/llvm-objdump/ELF/AMDGPU/source-lines.ll (-2) 
- (modified) llvm/test/tools/llvm-objdump/Offloading/Inputs/binary.yaml (+2-2) 
- (modified) llvm/test/tools/llvm-objdump/Offloading/coff.test (+2-2) 
- (modified) llvm/test/tools/llvm-objdump/Offloading/elf.test (+2-2) 


``````````diff
diff --git a/llvm/test/Analysis/CostModel/AMDGPU/fsub.ll b/llvm/test/Analysis/CostModel/AMDGPU/fsub.ll
index 3b9ba5ac2a06b..8a6462165e526 100644
--- a/llvm/test/Analysis/CostModel/AMDGPU/fsub.ll
+++ b/llvm/test/Analysis/CostModel/AMDGPU/fsub.ll
@@ -6,7 +6,7 @@
 ; RUN: opt -passes="print<cost-model>" -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgpu9.0a-unknown-amdhsa  -mattr=+half-rate-64-ops < %s | FileCheck -check-prefixes=FASTF16-SIZE,GFX90A-FASTF64-SIZE %s
 ; RUN: opt -passes="print<cost-model>" -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgpu9.00-unknown-amdhsa  -mattr=+half-rate-64-ops < %s | FileCheck -check-prefixes=NOPACKEDF32-SIZE,FASTF16-SIZE %s
 ; RUN: opt -passes="print<cost-model>" -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgpu6.01-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileCheck -check-prefixes=NOPACKEDF32-SIZE,SLOWF64-SIZE %s
-; RUN  opt -passes="print<cost-model>" -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GFX1250-SIZE %s
+; RUN  opt -passes="print<cost-model>" -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgpu12.50-unknown-amdhsa < %s | FileCheck -check-prefixes=GFX1250-SIZE %s
 ; END.
 
 define amdgpu_kernel void @fsub_f32() #0 {
diff --git a/llvm/test/Analysis/CostModel/AMDGPU/fused_costs.ll b/llvm/test/Analysis/CostModel/AMDGPU/fused_costs.ll
index d976a03e3b50d..98773ba7292f4 100644
--- a/llvm/test/Analysis/CostModel/AMDGPU/fused_costs.ll
+++ b/llvm/test/Analysis/CostModel/AMDGPU/fused_costs.ll
@@ -10,8 +10,6 @@
 ; RUN: opt -passes="print<cost-model>" -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgpu10.30-unknown-amdhsa -denormal-fp-math-f32=preserve-sign -denormal-fp-math=preserve-sign -fp-contract=on < %s | FileCheck -check-prefixes=SLOWF64-SIZE,FUSED-SIZE,FASTF32-SIZE %s
 ; END.
 
-target triple = "amdgcn--"
-
 define void @fmul_fadd_f32() #0 {
 ; SLOWF32-LABEL: 'fmul_fadd_f32'
 ; SLOWF32-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %f32 = fmul float undef, undef
diff --git a/llvm/test/Analysis/DotMachineCFG/AMDGPU/functions.mir b/llvm/test/Analysis/DotMachineCFG/AMDGPU/functions.mir
index e3527f589e7a1..1c29a62324767 100644
--- a/llvm/test/Analysis/DotMachineCFG/AMDGPU/functions.mir
+++ b/llvm/test/Analysis/DotMachineCFG/AMDGPU/functions.mir
@@ -1,7 +1,7 @@
-# RUN: llc -mtriple=amdgcn-- -run-pass=dot-machine-cfg  -mcfg-dot-filename-prefix=%t -mcfg-func-name=func2 -o -  %s -filetype=null 2>&1
+# RUN: llc -mtriple=amdgpu6.00-- -run-pass=dot-machine-cfg  -mcfg-dot-filename-prefix=%t -mcfg-func-name=func2 -o -  %s -filetype=null 2>&1
 # RUN: FileCheck %s -input-file=%t.func2.dot --check-prefix=MCFG
 
-# RUN: llc -mtriple=amdgcn-- -passes=dot-machine-cfg  -mcfg-dot-filename-prefix=%t -mcfg-func-name=func2 -o -  %s -filetype=null 2>&1
+# RUN: llc -mtriple=amdgpu6.00-- -passes=dot-machine-cfg  -mcfg-dot-filename-prefix=%t -mcfg-func-name=func2 -o -  %s -filetype=null 2>&1
 # RUN: FileCheck %s -input-file=%t.func2.dot --check-prefix=MCFG
 
 # MCFG-NOT: digraph "Machine CFG for 'func1' function"
diff --git a/llvm/test/Analysis/DotMachineCFG/AMDGPU/irreducible.mir b/llvm/test/Analysis/DotMachineCFG/AMDGPU/irreducible.mir
index ed84f5590ff41..5c32c7f5bba75 100644
--- a/llvm/test/Analysis/DotMachineCFG/AMDGPU/irreducible.mir
+++ b/llvm/test/Analysis/DotMachineCFG/AMDGPU/irreducible.mir
@@ -1,11 +1,11 @@
-# RUN: llc -mtriple=amdgcn-- -run-pass=dot-machine-cfg  -mcfg-dot-filename-prefix=%t -o -  %s -filetype=null 2>&1
+# RUN: llc -mtriple=amdgpu6.00-- -run-pass=dot-machine-cfg  -mcfg-dot-filename-prefix=%t -o -  %s -filetype=null 2>&1
 # RUN: FileCheck %s -input-file=%t.irreducible.dot --check-prefix=MCFG
-# RUN: llc -mtriple=amdgcn-- -run-pass=dot-machine-cfg  -mcfg-dot-filename-prefix=%t -dot-mcfg-only -o -  %s -filetype=null 2>&1
+# RUN: llc -mtriple=amdgpu6.00-- -run-pass=dot-machine-cfg  -mcfg-dot-filename-prefix=%t -dot-mcfg-only -o -  %s -filetype=null 2>&1
 # RUN: FileCheck %s -input-file=%t.irreducible.dot --check-prefix=MCFG-ONLY
 
-# RUN: llc -mtriple=amdgcn-- -passes=dot-machine-cfg  -mcfg-dot-filename-prefix=%t -o -  %s -filetype=null 2>&1
+# RUN: llc -mtriple=amdgpu6.00-- -passes=dot-machine-cfg  -mcfg-dot-filename-prefix=%t -o -  %s -filetype=null 2>&1
 # RUN: FileCheck %s -input-file=%t.irreducible.dot --check-prefix=MCFG
-# RUN: llc -mtriple=amdgcn-- -passes=dot-machine-cfg  -mcfg-dot-filename-prefix=%t -dot-mcfg-only -o -  %s -filetype=null 2>&1
+# RUN: llc -mtriple=amdgpu6.00-- -passes=dot-machine-cfg  -mcfg-dot-filename-prefix=%t -dot-mcfg-only -o -  %s -filetype=null 2>&1
 # RUN: FileCheck %s -input-file=%t.irreducible.dot --check-prefix=MCFG-ONLY
 
 # MCFG: digraph "Machine CFG for 'irreducible' function"
diff --git a/llvm/test/Analysis/Lint/const-store.ll b/llvm/test/Analysis/Lint/const-store.ll
index 748f752b2975f..584fefd53b8b5 100644
--- a/llvm/test/Analysis/Lint/const-store.ll
+++ b/llvm/test/Analysis/Lint/const-store.ll
@@ -1,5 +1,5 @@
-; RUN: not opt --mtriple=amdgcn --passes='lint<abort-on-error>' %s -disable-output 2>&1 | FileCheck %s
-; RUN: opt --mtriple=amdgcn --mcpu=gfx1030 --passes=lint %s -disable-output 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK0
+; RUN: not opt --mtriple=amdgpu6.00 --passes='lint<abort-on-error>' %s -disable-output 2>&1 | FileCheck %s
+; RUN: opt --mtriple=amdgpu10.30 --passes=lint %s -disable-output 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK0
 ; RUN: opt --mtriple=x86_64 --passes='lint<abort-on-error>' %s -disable-output 2>&1 | FileCheck %s --allow-empty --check-prefix=NOERR
 ; NOERR: {{^$}}
 
diff --git a/llvm/test/Analysis/MemorySSA/ptr-const-mem.ll b/llvm/test/Analysis/MemorySSA/ptr-const-mem.ll
index badcfbba0f5f0..3199f6946a759 100644
--- a/llvm/test/Analysis/MemorySSA/ptr-const-mem.ll
+++ b/llvm/test/Analysis/MemorySSA/ptr-const-mem.ll
@@ -1,5 +1,5 @@
 ; RUN: opt -aa-pipeline=basic-aa -passes='print<memoryssa>' -verify-memoryssa -disable-output -memssa-check-limit=0 < %s 2>&1 | FileCheck %s
-target triple = "amdgcn"
+target triple = "amdgpu6.00"
 
 @g4 = external unnamed_addr constant i8, align 1
 
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir
index 8f44855b3caff..773df75a4dcdf 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir
@@ -1,6 +1,6 @@
 # NOTE: This file is Generic MIR translation of test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll test file
-# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu9.00-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu9.00-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 ---
 name:            readfirstlane
 body:             |
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics-gmir.mir
index d7862e8373121..8292118fe7d2d 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics-gmir.mir
@@ -1,5 +1,5 @@
-# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu7.00-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu7.00-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 
 ---
 name:            test1
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics.mir
index 432582197f652..f84120b6713d7 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics.mir
@@ -1,5 +1,5 @@
-# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu9.00-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu9.00-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 
 ---
 name:            test1
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
index 27c53815feb06..118272d8d73ed 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
@@ -1,5 +1,5 @@
-# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu9.00-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu9.00-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 # CHECK-LABEL: MachineUniformityInfo for function:  @hidden_diverge
 # CHECK-LABEL: BLOCK bb.0
 # CHECK:     DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.workitem.id.x)
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir
index fd811e276c593..f06bbebe12676 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir
@@ -1,5 +1,5 @@
-# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu6.00-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu6.00-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 # CHECK-LABEL: MachineUniformityInfo for function:  @hidden_loop_diverge
 
 # CHECK-LABEL: BLOCK bb.0
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/branch-outside-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/branch-outside-gmir.mir
index c61113b976a69..5c735787da8bb 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/branch-outside-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/branch-outside-gmir.mir
@@ -1,5 +1,5 @@
-# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu6.00-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu6.00-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 
 # CHECK-LABEL: MachineUniformityInfo for function:  @basic
 # CHECK-NEXT: CYCLES ASSUMED DIVERGENT:
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir
index dfa05f44bd7eb..b6de0d6ec093d 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir
@@ -1,5 +1,5 @@
-# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu7.00-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu7.00-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 # CHECK-LABEL: MachineUniformityInfo for function:  @divergent_cycle_1
 # CHECK-NEXT: CYCLES ASSUMED DIVERGENT:
 # CHECK-NEXT: depth=1: entries(bb.3 bb.1) bb.4 bb.2
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/exit-divergence-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/exit-divergence-gmir.mir
index 8627db017eaf0..fb938e93c7665 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/exit-divergence-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/exit-divergence-gmir.mir
@@ -1,5 +1,5 @@
-# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu7.00-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu7.00-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 # CHECK-LABEL: MachineUniformityInfo for function:  @basic
 # CHECK-NOT: CYCLES ASSUMED DIVERGENT:
 # CHECK: CYCLES WITH DIVERGENT EXIT:
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/irreducible-2-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/irreducible-2-gmir.mir
index 575092d6f4be6..90aad6fadbaf7 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/irreducible-2-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/irreducible-2-gmir.mir
@@ -1,5 +1,5 @@
-# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu6.00-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu6.00-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 
 #        bb0(div)
 #       /    \
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/join-loopexit-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/join-loopexit-gmir.mir
index ffafb9b3ba633..8a1a713020b4f 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/join-loopexit-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/join-loopexit-gmir.mir
@@ -1,5 +1,5 @@
-# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu6.00-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu6.00-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 # CHECK-LABEL: MachineUniformityInfo for function:  @test
 
 # CHECK-LABEL: BLOCK bb.0
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/loads-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/loads-gmir.mir
index d799cd2057f47..cfda128bbbc52 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/loads-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/loads-gmir.mir
@@ -1,5 +1,5 @@
-# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu6.00-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu6.00-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 
 ---
 name:            loads
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform-gmir.mir
index e59410179b526..24825209b090f 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform-gmir.mir
@@ -1,5 +1,5 @@
-# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu6.00-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu6.00-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 
 # whole wave func setup (original exec mask) is a divergence source
 ---
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir
index a0f637b24e5ab..4251549ba1c1b 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir
@@ -1,5 +1,5 @@
-# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu6.00-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu6.00-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 
 ---
 # CHECK-LABEL: MachineUniformityInfo for function:  @temporal_diverge
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/hidden-diverge.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/hidden-diverge.mir
index 7d3eaee02c387..637b348e41dcb 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/hidden-diverge.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/hidden-diverge.mir
@@ -1,5 +1,5 @@
-# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu9.00-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu9.00-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 
 # This test was generated using SelectionDAG, where the compilation flow does
 # not match the assumptions made in MachineUA. For now, this test mostly serves
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/irreducible-1.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/irreducible-1.mir
index 97dfbd05cf242..6cd12b37aea33 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/irreducible-1.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/irreducible-1.mir
@@ -1,5 +1,5 @@
-# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu6.00-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgpu6.00-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 
 # This test was generated using SelectionDAG, where the compilation flow does
 # not match the assumptions made in MachineUA. For now, this test mostly serves
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/irreducible-2.ll b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/irreducible-2.ll
index 91b444647f8bf..05466fe1c2699 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/irreducible-2.ll
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/irreducible-2.ll
@@ -1,4 +1,4 @@
-; RUN: opt %s -mtriple amdgcn-- -passes='print<uniformity>' -disable-output 2>&1 | FileCheck %s
+; RUN: opt %s -mtriple=amdgpu6.00-- -passes='print<uniformity>' -disable-output 2>&1 | FileCheck %s
 
 define amdgpu_kernel void @cycle_diverge_enter(i32 %n, i32 %a, i32 %b) #0 {
 ;      entry(div)
diff --git a/llvm/test/Assembler/amdgpu-image-atomic-attributes.ll b/llvm/test/Assembler/amdgpu-image-atomic-attributes.ll
index bc03908d5f218..6d12c8c63a8a3 100644
--- a/llvm/test/Assembler/amdgpu-image-atomic-attributes.ll
+++ b/llvm/test/Assembler/amdgpu-image-atomic-attribut...
[truncated]

``````````

</details>


https://github.com/llvm/llvm-project/pull/210113


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