[llvm] [InstCombine] Add demanded-bits pext handling (PR #205092)

[Jan Schultke via llvm-commits]

eisenwave wrote:

I don't really know anything about demanded bits optimization, but I couldn't spot any obvious problem.

I'm also wondering why there is so little code for the demanded bits of the RHS. For example, if the demanded bits are all located in the lower 4 bits, then we know that only the lowest 4 set bits of the mask are relevant, any any unset bits between those. Is that case actually handled here somehow?

Or more extremely, if we compute `& 1` at the end so we are only interested in the lowest bit of the result, i.e. `__builtin_elementwise_pext(x, y) & 1`, and if we know that the lowest bit in the mask is set, then all the bits above become irrelevant. I'm not really seeing this covered by the tests, and I thought that this is what demanded bits optimization is for.

https://github.com/llvm/llvm-project/pull/205092