[llvm] [X86] combineShiftRightLogical - fold srl(vecreduce_umax(x),bw-1) as MOVMSK signbit reduction (PR #210281)

[Simon Pilgrim via llvm-commits]

RKSimon wrote:

An alternative would be to remove the VectorCombine foldSignBitReductionCmp fold from 23.x - I'm not entirely happy with how constrained I had to make this backend patch, and until costs are improved foldSignBitReductionCmp is going to do some silly things......

https://github.com/llvm/llvm-project/pull/210281