[llvm] [Reland][X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (PR #210069)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 16 07:24:48 PDT 2026
https://github.com/VachanVY created https://github.com/llvm/llvm-project/pull/210069
fix #193178
relands PR #208392
>From 6facdb497b9bbfdf6b0a1bdd74030c48f5103afe Mon Sep 17 00:00:00 2001
From: Vachan V Y <vachanvy05 at gmail.com>
Date: Thu, 16 Jul 2026 19:52:16 +0530
Subject: [PATCH] [X86] pre commit tests
---
.../X86/remove-redundant-cmp-lzcnt-i64.ll | 78 +++++++
.../CodeGen/X86/remove-redundant-cmp-lzcnt.ll | 195 +++++++++++++++++
.../X86/remove-redundant-cmp-tzcnt-i64.ll | 76 +++++++
.../CodeGen/X86/remove-redundant-cmp-tzcnt.ll | 205 ++++++++++++++++++
4 files changed, 554 insertions(+)
create mode 100644 llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt-i64.ll
create mode 100644 llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt.ll
create mode 100644 llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt-i64.ll
create mode 100644 llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt.ll
diff --git a/llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt-i64.ll b/llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt-i64.ll
new file mode 100644
index 0000000000000..09571fa20b711
--- /dev/null
+++ b/llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt-i64.ll
@@ -0,0 +1,78 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+lzcnt | FileCheck %s
+
+define i64 @remove_redundant_cmp_ult_lzcnt_i64(i64 %0) {
+; CHECK-LABEL: remove_redundant_cmp_ult_lzcnt_i64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: lzcntq %rdi, %rax
+; CHECK-NEXT: cmpq $1, %rdi
+; CHECK-NEXT: adcq $0, %rax
+; CHECK-NEXT: retq
+ %2 = tail call i64 @llvm.ctlz.i64(i64 %0, i1 false)
+ %3 = icmp ult i64 %0, 1
+ %4 = zext i1 %3 to i64
+ %5 = add nuw nsw i64 %2, %4
+ ret i64 %5
+}
+
+define i64 @remove_redundant_cmp_ugt_lzcnt_i64(i64 %0) {
+; CHECK-LABEL: remove_redundant_cmp_ugt_lzcnt_i64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: lzcntq %rdi, %rax
+; CHECK-NEXT: cmpq $2, %rdi
+; CHECK-NEXT: sbbq $-1, %rax
+; CHECK-NEXT: retq
+ %2 = tail call i64 @llvm.ctlz.i64(i64 %0, i1 false)
+ %3 = icmp ugt i64 %0, 1
+ %4 = zext i1 %3 to i64
+ %5 = add nuw nsw i64 %2, %4
+ ret i64 %5
+}
+
+define i64 @remove_redundant_cmp_ne_lzcnt_i64(i64 %0) {
+; CHECK-LABEL: remove_redundant_cmp_ne_lzcnt_i64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: lzcntq %rdi, %rcx
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: cmpq $1, %rdi
+; CHECK-NEXT: setne %al
+; CHECK-NEXT: addq %rcx, %rax
+; CHECK-NEXT: retq
+ %2 = tail call i64 @llvm.ctlz.i64(i64 %0, i1 false)
+ %3 = icmp ne i64 %0, 1
+ %4 = zext i1 %3 to i64
+ %5 = add nuw nsw i64 %2, %4
+ ret i64 %5
+}
+
+define i64 @remove_redundant_cmp_sge_lzcnt_i64(i64 %0) {
+; CHECK-LABEL: remove_redundant_cmp_sge_lzcnt_i64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: lzcntq %rdi, %rcx
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: testq %rdi, %rdi
+; CHECK-NEXT: setg %al
+; CHECK-NEXT: addq %rcx, %rax
+; CHECK-NEXT: retq
+ %2 = tail call i64 @llvm.ctlz.i64(i64 %0, i1 false)
+ %3 = icmp sge i64 %0, 1
+ %4 = zext i1 %3 to i64
+ %5 = add nuw nsw i64 %2, %4
+ ret i64 %5
+}
+
+define i64 @remove_redundant_cmp_sle_lzcnt_i64(i64 %0) {
+; CHECK-LABEL: remove_redundant_cmp_sle_lzcnt_i64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: lzcntq %rdi, %rcx
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: cmpq $2, %rdi
+; CHECK-NEXT: setl %al
+; CHECK-NEXT: addq %rcx, %rax
+; CHECK-NEXT: retq
+ %2 = tail call i64 @llvm.ctlz.i64(i64 %0, i1 false)
+ %3 = icmp sle i64 %0, 1
+ %4 = zext i1 %3 to i64
+ %5 = add nuw nsw i64 %2, %4
+ ret i64 %5
+}
diff --git a/llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt.ll b/llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt.ll
new file mode 100644
index 0000000000000..f7725897533b0
--- /dev/null
+++ b/llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt.ll
@@ -0,0 +1,195 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+lzcnt | FileCheck %s --check-prefix=X64
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+bmi,+lzcnt | FileCheck %s --check-prefix=X86
+
+define i32 @remove_redundant_cmp_eq_lzcnt_i32(i32 %0) {
+; X64-LABEL: remove_redundant_cmp_eq_lzcnt_i32:
+; X64: # %bb.0:
+; X64-NEXT: lzcntl %edi, %eax
+; X64-NEXT: cmpl $1, %edi
+; X64-NEXT: adcl $0, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_eq_lzcnt_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: lzcntl %ecx, %eax
+; X86-NEXT: cmpl $1, %ecx
+; X86-NEXT: adcl $0, %eax
+; X86-NEXT: retl
+ %2 = tail call i32 @llvm.ctlz.i32(i32 %0, i1 false)
+ %3 = icmp eq i32 %0, 0
+ %4 = zext i1 %3 to i32
+ %5 = add nuw nsw i32 %2, %4
+ ret i32 %5
+}
+
+define i32 @remove_redundant_cmp_uge_lzcnt_i32(i32 %0) {
+; X64-LABEL: remove_redundant_cmp_uge_lzcnt_i32:
+; X64: # %bb.0:
+; X64-NEXT: lzcntl %edi, %eax
+; X64-NEXT: cmpl $1, %edi
+; X64-NEXT: sbbl $-1, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_uge_lzcnt_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: lzcntl %ecx, %eax
+; X86-NEXT: cmpl $1, %ecx
+; X86-NEXT: sbbl $-1, %eax
+; X86-NEXT: retl
+ %2 = tail call i32 @llvm.ctlz.i32(i32 %0, i1 false)
+ %3 = icmp uge i32 %0, 1
+ %4 = zext i1 %3 to i32
+ %5 = add nuw nsw i32 %2, %4
+ ret i32 %5
+}
+
+define i32 @remove_redundant_cmp_ule_lzcnt_i32(i32 %0) {
+; X64-LABEL: remove_redundant_cmp_ule_lzcnt_i32:
+; X64: # %bb.0:
+; X64-NEXT: lzcntl %edi, %eax
+; X64-NEXT: cmpl $2, %edi
+; X64-NEXT: adcl $0, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_ule_lzcnt_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: lzcntl %ecx, %eax
+; X86-NEXT: cmpl $2, %ecx
+; X86-NEXT: adcl $0, %eax
+; X86-NEXT: retl
+ %2 = tail call i32 @llvm.ctlz.i32(i32 %0, i1 false)
+ %3 = icmp ule i32 %0, 1
+ %4 = zext i1 %3 to i32
+ %5 = add nuw nsw i32 %2, %4
+ ret i32 %5
+}
+
+define i32 @remove_redundant_cmp_slt_lzcnt_i32(i32 %0) {
+; X64-LABEL: remove_redundant_cmp_slt_lzcnt_i32:
+; X64: # %bb.0:
+; X64-NEXT: lzcntl %edi, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: testl %edi, %edi
+; X64-NEXT: setle %al
+; X64-NEXT: addl %ecx, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_slt_lzcnt_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: lzcntl %ecx, %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: testl %ecx, %ecx
+; X86-NEXT: setle %al
+; X86-NEXT: addl %edx, %eax
+; X86-NEXT: retl
+ %2 = tail call i32 @llvm.ctlz.i32(i32 %0, i1 false)
+ %3 = icmp slt i32 %0, 1
+ %4 = zext i1 %3 to i32
+ %5 = add nuw nsw i32 %2, %4
+ ret i32 %5
+}
+
+define i32 @remove_redundant_cmp_sgt_lzcnt_i32(i32 %0) {
+; X64-LABEL: remove_redundant_cmp_sgt_lzcnt_i32:
+; X64: # %bb.0:
+; X64-NEXT: lzcntl %edi, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: cmpl $2, %edi
+; X64-NEXT: setge %al
+; X64-NEXT: addl %ecx, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_sgt_lzcnt_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: lzcntl %ecx, %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: cmpl $2, %ecx
+; X86-NEXT: setge %al
+; X86-NEXT: addl %edx, %eax
+; X86-NEXT: retl
+ %2 = tail call i32 @llvm.ctlz.i32(i32 %0, i1 false)
+ %3 = icmp sgt i32 %0, 1
+ %4 = zext i1 %3 to i32
+ %5 = add nuw nsw i32 %2, %4
+ ret i32 %5
+}
+
+define i16 @remove_redundant_cmp_lzcnt_i16(i16 %0) {
+; X64-LABEL: remove_redundant_cmp_lzcnt_i16:
+; X64: # %bb.0:
+; X64-NEXT: lzcntw %di, %ax
+; X64-NEXT: cmpw $1, %di
+; X64-NEXT: adcw $0, %ax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_lzcnt_i16:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: lzcntw %cx, %ax
+; X86-NEXT: cmpw $1, %cx
+; X86-NEXT: adcw $0, %ax
+; X86-NEXT: retl
+ %2 = tail call i16 @llvm.ctlz.i16(i16 %0, i1 false)
+ %3 = icmp eq i16 %0, 0
+ %4 = zext i1 %3 to i16
+ %5 = add nuw nsw i16 %2, %4
+ ret i16 %5
+}
+
+define i32 @remove_redundant_cmp_lzcnt_no_constant(i32 %0, i32 %1) {
+; X64-LABEL: remove_redundant_cmp_lzcnt_no_constant:
+; X64: # %bb.0:
+; X64-NEXT: lzcntl %edi, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: cmpl %esi, %edi
+; X64-NEXT: sete %al
+; X64-NEXT: addl %ecx, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_lzcnt_no_constant:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: lzcntl %ecx, %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: cmpl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: sete %al
+; X86-NEXT: addl %edx, %eax
+; X86-NEXT: retl
+ %3 = tail call i32 @llvm.ctlz.i32(i32 %0, i1 false)
+ %4 = icmp eq i32 %0, %1
+ %5 = zext i1 %4 to i32
+ %6 = add nuw nsw i32 %3, %5
+ ret i32 %6
+}
+
+define i32 @remove_redundant_cmp_lzcnt_wrong_const(i32 %0) {
+; X64-LABEL: remove_redundant_cmp_lzcnt_wrong_const:
+; X64: # %bb.0:
+; X64-NEXT: lzcntl %edi, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: cmpl $2, %edi
+; X64-NEXT: sete %al
+; X64-NEXT: addl %ecx, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_lzcnt_wrong_const:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: lzcntl %ecx, %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: cmpl $2, %ecx
+; X86-NEXT: sete %al
+; X86-NEXT: addl %edx, %eax
+; X86-NEXT: retl
+ %2 = tail call i32 @llvm.ctlz.i32(i32 %0, i1 false)
+ %3 = icmp eq i32 %0, 2
+ %4 = zext i1 %3 to i32
+ %5 = add nuw nsw i32 %2, %4
+ ret i32 %5
+}
diff --git a/llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt-i64.ll b/llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt-i64.ll
new file mode 100644
index 0000000000000..3b72de62bbdf2
--- /dev/null
+++ b/llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt-i64.ll
@@ -0,0 +1,76 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+lzcnt | FileCheck %s
+
+define i64 @remove_redundant_cmp_eq_tzcnt_i64(i64 %0) {
+; CHECK-LABEL: remove_redundant_cmp_eq_tzcnt_i64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: tzcntq %rdi, %rax
+; CHECK-NEXT: cmpq $1, %rdi
+; CHECK-NEXT: adcq $0, %rax
+; CHECK-NEXT: retq
+ %2 = tail call i64 @llvm.cttz.i64(i64 %0, i1 false)
+ %3 = icmp eq i64 %0, 0
+ %4 = zext i1 %3 to i64
+ %5 = add nuw nsw i64 %2, %4
+ ret i64 %5
+}
+
+define i64 @remove_redundant_cmp_uge_tzcnt_i64(i64 %0) {
+; CHECK-LABEL: remove_redundant_cmp_uge_tzcnt_i64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: tzcntq %rdi, %rax
+; CHECK-NEXT: cmpq $1, %rdi
+; CHECK-NEXT: sbbq $-1, %rax
+; CHECK-NEXT: retq
+ %2 = tail call i64 @llvm.cttz.i64(i64 %0, i1 false)
+ %3 = icmp uge i64 %0, 1
+ %4 = zext i1 %3 to i64
+ %5 = add nuw nsw i64 %2, %4
+ ret i64 %5
+}
+
+define i64 @remove_redundant_cmp_ule_tzcnt_i64(i64 %0) {
+; CHECK-LABEL: remove_redundant_cmp_ule_tzcnt_i64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: tzcntq %rdi, %rax
+; CHECK-NEXT: cmpq $2, %rdi
+; CHECK-NEXT: adcq $0, %rax
+; CHECK-NEXT: retq
+ %2 = tail call i64 @llvm.cttz.i64(i64 %0, i1 false)
+ %3 = icmp ule i64 %0, 1
+ %4 = zext i1 %3 to i64
+ %5 = add nuw nsw i64 %2, %4
+ ret i64 %5
+}
+
+define i64 @remove_redundant_cmp_slt_tzcnt_i64(i64 %0) {
+; CHECK-LABEL: remove_redundant_cmp_slt_tzcnt_i64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: tzcntq %rdi, %rcx
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: testq %rdi, %rdi
+; CHECK-NEXT: setle %al
+; CHECK-NEXT: addq %rcx, %rax
+; CHECK-NEXT: retq
+ %2 = tail call i64 @llvm.cttz.i64(i64 %0, i1 false)
+ %3 = icmp slt i64 %0, 1
+ %4 = zext i1 %3 to i64
+ %5 = add nuw nsw i64 %2, %4
+ ret i64 %5
+}
+
+define i64 @remove_redundant_cmp_sgt_tzcnt_i64(i64 %0) {
+; CHECK-LABEL: remove_redundant_cmp_sgt_tzcnt_i64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: tzcntq %rdi, %rcx
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: cmpq $2, %rdi
+; CHECK-NEXT: setge %al
+; CHECK-NEXT: addq %rcx, %rax
+; CHECK-NEXT: retq
+ %2 = tail call i64 @llvm.cttz.i64(i64 %0, i1 false)
+ %3 = icmp sgt i64 %0, 1
+ %4 = zext i1 %3 to i64
+ %5 = add nuw nsw i64 %2, %4
+ ret i64 %5
+}
diff --git a/llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt.ll b/llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt.ll
new file mode 100644
index 0000000000000..d6eafb5da1119
--- /dev/null
+++ b/llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt.ll
@@ -0,0 +1,205 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+lzcnt | FileCheck %s --check-prefix=X64
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+bmi,+lzcnt | FileCheck %s --check-prefix=X86
+
+define i32 @remove_redundant_cmp_ult_tzcnt_i32(i32 %0) {
+; X64-LABEL: remove_redundant_cmp_ult_tzcnt_i32:
+; X64: # %bb.0:
+; X64-NEXT: tzcntl %edi, %eax
+; X64-NEXT: cmpl $1, %edi
+; X64-NEXT: adcl $0, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_ult_tzcnt_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: tzcntl %ecx, %eax
+; X86-NEXT: cmpl $1, %ecx
+; X86-NEXT: adcl $0, %eax
+; X86-NEXT: retl
+ %2 = tail call i32 @llvm.cttz.i32(i32 %0, i1 false)
+ %3 = icmp ult i32 %0, 1
+ %4 = zext i1 %3 to i32
+ %5 = add nuw nsw i32 %2, %4
+ ret i32 %5
+}
+
+define i32 @remove_redundant_cmp_ugt_tzcnt_i32(i32 %0) {
+; X64-LABEL: remove_redundant_cmp_ugt_tzcnt_i32:
+; X64: # %bb.0:
+; X64-NEXT: tzcntl %edi, %eax
+; X64-NEXT: cmpl $2, %edi
+; X64-NEXT: sbbl $-1, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_ugt_tzcnt_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: tzcntl %ecx, %eax
+; X86-NEXT: cmpl $2, %ecx
+; X86-NEXT: sbbl $-1, %eax
+; X86-NEXT: retl
+ %2 = tail call i32 @llvm.cttz.i32(i32 %0, i1 false)
+ %3 = icmp ugt i32 %0, 1
+ %4 = zext i1 %3 to i32
+ %5 = add nuw nsw i32 %2, %4
+ ret i32 %5
+}
+
+define i32 @remove_redundant_cmp_ne_tzcnt_i32(i32 %0) {
+; X64-LABEL: remove_redundant_cmp_ne_tzcnt_i32:
+; X64: # %bb.0:
+; X64-NEXT: tzcntl %edi, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: cmpl $1, %edi
+; X64-NEXT: setne %al
+; X64-NEXT: addl %ecx, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_ne_tzcnt_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: tzcntl %ecx, %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: cmpl $1, %ecx
+; X86-NEXT: setne %al
+; X86-NEXT: addl %edx, %eax
+; X86-NEXT: retl
+ %2 = tail call i32 @llvm.cttz.i32(i32 %0, i1 false)
+ %3 = icmp ne i32 %0, 1
+ %4 = zext i1 %3 to i32
+ %5 = add nuw nsw i32 %2, %4
+ ret i32 %5
+}
+
+define i32 @remove_redundant_cmp_sge_tzcnt_i32(i32 %0) {
+; X64-LABEL: remove_redundant_cmp_sge_tzcnt_i32:
+; X64: # %bb.0:
+; X64-NEXT: tzcntl %edi, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: testl %edi, %edi
+; X64-NEXT: setg %al
+; X64-NEXT: addl %ecx, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_sge_tzcnt_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: tzcntl %ecx, %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: testl %ecx, %ecx
+; X86-NEXT: setg %al
+; X86-NEXT: addl %edx, %eax
+; X86-NEXT: retl
+ %2 = tail call i32 @llvm.cttz.i32(i32 %0, i1 false)
+ %3 = icmp sge i32 %0, 1
+ %4 = zext i1 %3 to i32
+ %5 = add nuw nsw i32 %2, %4
+ ret i32 %5
+}
+
+define i32 @remove_redundant_cmp_sle_tzcnt_i32(i32 %0) {
+; X64-LABEL: remove_redundant_cmp_sle_tzcnt_i32:
+; X64: # %bb.0:
+; X64-NEXT: tzcntl %edi, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: cmpl $2, %edi
+; X64-NEXT: setl %al
+; X64-NEXT: addl %ecx, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_sle_tzcnt_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: tzcntl %ecx, %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: cmpl $2, %ecx
+; X86-NEXT: setl %al
+; X86-NEXT: addl %edx, %eax
+; X86-NEXT: retl
+ %2 = tail call i32 @llvm.cttz.i32(i32 %0, i1 false)
+ %3 = icmp sle i32 %0, 1
+ %4 = zext i1 %3 to i32
+ %5 = add nuw nsw i32 %2, %4
+ ret i32 %5
+}
+
+define i16 @remove_redundant_cmp_tzcnt_i16(i16 %0) {
+; X64-LABEL: remove_redundant_cmp_tzcnt_i16:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: orl $65536, %eax # imm = 0x10000
+; X64-NEXT: tzcntl %eax, %eax
+; X64-NEXT: cmpw $1, %di
+; X64-NEXT: adcw $0, %ax
+; X64-NEXT: # kill: def $ax killed $ax killed $eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_tzcnt_i16:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: orl $65536, %eax # imm = 0x10000
+; X86-NEXT: tzcntl %eax, %eax
+; X86-NEXT: cmpw $1, %cx
+; X86-NEXT: adcw $0, %ax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
+ %2 = tail call i16 @llvm.cttz.i16(i16 %0, i1 false)
+ %3 = icmp eq i16 %0, 0
+ %4 = zext i1 %3 to i16
+ %5 = add nuw nsw i16 %2, %4
+ ret i16 %5
+}
+
+define i32 @remove_redundant_cmp_tzcnt_no_constant(i32 %0, i32 %1) {
+; X64-LABEL: remove_redundant_cmp_tzcnt_no_constant:
+; X64: # %bb.0:
+; X64-NEXT: tzcntl %edi, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: cmpl %esi, %edi
+; X64-NEXT: sete %al
+; X64-NEXT: addl %ecx, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_tzcnt_no_constant:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: tzcntl %ecx, %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: cmpl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: sete %al
+; X86-NEXT: addl %edx, %eax
+; X86-NEXT: retl
+ %3 = tail call i32 @llvm.cttz.i32(i32 %0, i1 false)
+ %4 = icmp eq i32 %0, %1
+ %5 = zext i1 %4 to i32
+ %6 = add nuw nsw i32 %3, %5
+ ret i32 %6
+}
+
+define i32 @remove_redundant_cmp_tzcnt_wrong_const(i32 %0) {
+; X64-LABEL: remove_redundant_cmp_tzcnt_wrong_const:
+; X64: # %bb.0:
+; X64-NEXT: tzcntl %edi, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: cmpl $2, %edi
+; X64-NEXT: sete %al
+; X64-NEXT: addl %ecx, %eax
+; X64-NEXT: retq
+;
+; X86-LABEL: remove_redundant_cmp_tzcnt_wrong_const:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: tzcntl %ecx, %edx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: cmpl $2, %ecx
+; X86-NEXT: sete %al
+; X86-NEXT: addl %edx, %eax
+; X86-NEXT: retl
+ %2 = tail call i32 @llvm.cttz.i32(i32 %0, i1 false)
+ %3 = icmp eq i32 %0, 2
+ %4 = zext i1 %3 to i32
+ %5 = add nuw nsw i32 %2, %4
+ ret i32 %5
+}
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