[llvm] [SLP][NFC]Add a test with the non-profitable instcount check across the loops, NFC (PR #210045)
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llvm-commits at lists.llvm.org
Thu Jul 16 05:25:33 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-transforms
Author: Alexey Bataev (alexey-bataev)
<details>
<summary>Changes</summary>
---
Full diff: https://github.com/llvm/llvm-project/pull/210045.diff
1 Files Affected:
- (added) llvm/test/Transforms/SLPVectorizer/X86/loop-invariant-gather-inst-count.ll (+181)
``````````diff
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/loop-invariant-gather-inst-count.ll b/llvm/test/Transforms/SLPVectorizer/X86/loop-invariant-gather-inst-count.ll
new file mode 100644
index 0000000000000..923af5efa5d2e
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/loop-invariant-gather-inst-count.ll
@@ -0,0 +1,181 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt -passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu -mcpu=icelake-server -S < %s | FileCheck %s
+
+; Reduced from SPEC2017 508.namd_r (#207572): the VF=2 distance computation in
+; the loop is profitable, but its broadcasts and initial loads are hoisted out
+; of it, so the VF=2 instruction-count check must not count them against the
+; loop body.
+
+
+define void @test(ptr noalias readonly %0, ptr noalias readonly %1, i32 %2, double %3, double %4, double %5, double %6, ptr noalias writeonly %7) {
+; CHECK-LABEL: define void @test(
+; CHECK-SAME: ptr noalias readonly [[TMP0:%.*]], ptr noalias readonly [[TMP1:%.*]], i32 [[TMP2:%.*]], double [[TMP3:%.*]], double [[TMP4:%.*]], double [[TMP5:%.*]], double [[TMP6:%.*]], ptr noalias writeonly [[TMP7:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT: [[TMP9:%.*]] = icmp sgt i32 [[TMP2]], 4
+; CHECK-NEXT: br i1 [[TMP9]], label %[[BB10:.*]], label %[[BB83:.*]]
+; CHECK: [[BB10]]:
+; CHECK-NEXT: [[TMP11:%.*]] = add nsw i32 [[TMP2]], -2
+; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 4
+; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
+; CHECK-NEXT: [[TMP14:%.*]] = sext i32 [[TMP13]] to i64
+; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds [32 x i8], ptr [[TMP0]], i64 [[TMP14]]
+; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP15]], i64 16
+; CHECK-NEXT: [[TMP17:%.*]] = load double, ptr [[TMP16]], align 8
+; CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP1]], align 4
+; CHECK-NEXT: [[TMP19:%.*]] = sext i32 [[TMP18]] to i64
+; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds [32 x i8], ptr [[TMP0]], i64 [[TMP19]]
+; CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP20]], i64 16
+; CHECK-NEXT: [[TMP22:%.*]] = load double, ptr [[TMP21]], align 8
+; CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP15]], i64 8
+; CHECK-NEXT: [[TMP24:%.*]] = load double, ptr [[TMP23]], align 8
+; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP20]], i64 8
+; CHECK-NEXT: [[TMP26:%.*]] = load double, ptr [[TMP25]], align 8
+; CHECK-NEXT: [[TMP27:%.*]] = load double, ptr [[TMP15]], align 8
+; CHECK-NEXT: [[TMP28:%.*]] = load double, ptr [[TMP20]], align 8
+; CHECK-NEXT: [[TMP29:%.*]] = zext nneg i32 [[TMP11]] to i64
+; CHECK-NEXT: br label %[[BB30:.*]]
+; CHECK: [[BB30]]:
+; CHECK-NEXT: [[TMP31:%.*]] = phi i64 [ 2, %[[BB10]] ], [ [[TMP81:%.*]], %[[BB30]] ]
+; CHECK-NEXT: [[TMP32:%.*]] = phi i32 [ 0, %[[BB10]] ], [ [[TMP80:%.*]], %[[BB30]] ]
+; CHECK-NEXT: [[TMP33:%.*]] = phi i32 [ [[TMP18]], %[[BB10]] ], [ [[TMP54:%.*]], %[[BB30]] ]
+; CHECK-NEXT: [[TMP34:%.*]] = phi i32 [ [[TMP13]], %[[BB10]] ], [ [[TMP56:%.*]], %[[BB30]] ]
+; CHECK-NEXT: [[TMP35:%.*]] = phi double [ [[TMP28]], %[[BB10]] ], [ [[TMP59:%.*]], %[[BB30]] ]
+; CHECK-NEXT: [[TMP36:%.*]] = phi double [ [[TMP27]], %[[BB10]] ], [ [[TMP62:%.*]], %[[BB30]] ]
+; CHECK-NEXT: [[TMP37:%.*]] = phi double [ [[TMP17]], %[[BB10]] ], [ [[TMP70:%.*]], %[[BB30]] ]
+; CHECK-NEXT: [[TMP38:%.*]] = phi double [ [[TMP22]], %[[BB10]] ], [ [[TMP68:%.*]], %[[BB30]] ]
+; CHECK-NEXT: [[TMP39:%.*]] = phi double [ [[TMP24]], %[[BB10]] ], [ [[TMP66:%.*]], %[[BB30]] ]
+; CHECK-NEXT: [[TMP40:%.*]] = phi double [ [[TMP26]], %[[BB10]] ], [ [[TMP64:%.*]], %[[BB30]] ]
+; CHECK-NEXT: [[TMP41:%.*]] = fsub double [[TMP3]], [[TMP35]]
+; CHECK-NEXT: [[TMP42:%.*]] = fsub double [[TMP3]], [[TMP36]]
+; CHECK-NEXT: [[TMP43:%.*]] = fmul double [[TMP41]], [[TMP41]]
+; CHECK-NEXT: [[TMP44:%.*]] = fmul double [[TMP42]], [[TMP42]]
+; CHECK-NEXT: [[TMP45:%.*]] = fsub double [[TMP4]], [[TMP40]]
+; CHECK-NEXT: [[TMP46:%.*]] = fsub double [[TMP4]], [[TMP39]]
+; CHECK-NEXT: [[TMP47:%.*]] = tail call double @llvm.fmuladd.f64(double [[TMP45]], double [[TMP45]], double [[TMP43]])
+; CHECK-NEXT: [[TMP48:%.*]] = tail call double @llvm.fmuladd.f64(double [[TMP46]], double [[TMP46]], double [[TMP44]])
+; CHECK-NEXT: [[TMP49:%.*]] = fsub double [[TMP5]], [[TMP38]]
+; CHECK-NEXT: [[TMP50:%.*]] = fsub double [[TMP5]], [[TMP37]]
+; CHECK-NEXT: [[TMP51:%.*]] = tail call double @llvm.fmuladd.f64(double [[TMP49]], double [[TMP49]], double [[TMP47]])
+; CHECK-NEXT: [[TMP52:%.*]] = tail call double @llvm.fmuladd.f64(double [[TMP50]], double [[TMP50]], double [[TMP48]])
+; CHECK-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[TMP1]], i64 [[TMP31]]
+; CHECK-NEXT: [[TMP54]] = load i32, ptr [[TMP53]], align 4
+; CHECK-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP53]], i64 4
+; CHECK-NEXT: [[TMP56]] = load i32, ptr [[TMP55]], align 4
+; CHECK-NEXT: [[TMP57:%.*]] = sext i32 [[TMP54]] to i64
+; CHECK-NEXT: [[TMP58:%.*]] = getelementptr inbounds [32 x i8], ptr [[TMP0]], i64 [[TMP57]]
+; CHECK-NEXT: [[TMP59]] = load double, ptr [[TMP58]], align 8
+; CHECK-NEXT: [[TMP60:%.*]] = sext i32 [[TMP56]] to i64
+; CHECK-NEXT: [[TMP61:%.*]] = getelementptr inbounds [32 x i8], ptr [[TMP0]], i64 [[TMP60]]
+; CHECK-NEXT: [[TMP62]] = load double, ptr [[TMP61]], align 8
+; CHECK-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP58]], i64 8
+; CHECK-NEXT: [[TMP64]] = load double, ptr [[TMP63]], align 8
+; CHECK-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP61]], i64 8
+; CHECK-NEXT: [[TMP66]] = load double, ptr [[TMP65]], align 8
+; CHECK-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP58]], i64 16
+; CHECK-NEXT: [[TMP68]] = load double, ptr [[TMP67]], align 8
+; CHECK-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP61]], i64 16
+; CHECK-NEXT: [[TMP70]] = load double, ptr [[TMP69]], align 8
+; CHECK-NEXT: [[TMP71:%.*]] = fcmp olt double [[TMP51]], [[TMP6]]
+; CHECK-NEXT: [[TMP72:%.*]] = fcmp olt double [[TMP52]], [[TMP6]]
+; CHECK-NEXT: [[TMP73:%.*]] = zext nneg i32 [[TMP32]] to i64
+; CHECK-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[TMP7]], i64 [[TMP73]]
+; CHECK-NEXT: store i32 [[TMP33]], ptr [[TMP74]], align 4
+; CHECK-NEXT: [[TMP75:%.*]] = zext i1 [[TMP71]] to i32
+; CHECK-NEXT: [[TMP76:%.*]] = add nuw nsw i32 [[TMP32]], [[TMP75]]
+; CHECK-NEXT: [[TMP77:%.*]] = zext nneg i32 [[TMP76]] to i64
+; CHECK-NEXT: [[TMP78:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[TMP7]], i64 [[TMP77]]
+; CHECK-NEXT: store i32 [[TMP34]], ptr [[TMP78]], align 4
+; CHECK-NEXT: [[TMP79:%.*]] = zext i1 [[TMP72]] to i32
+; CHECK-NEXT: [[TMP80]] = add nuw nsw i32 [[TMP76]], [[TMP79]]
+; CHECK-NEXT: [[TMP81]] = add nuw nsw i64 [[TMP31]], 2
+; CHECK-NEXT: [[TMP82:%.*]] = icmp samesign ult i64 [[TMP81]], [[TMP29]]
+; CHECK-NEXT: br i1 [[TMP82]], label %[[BB30]], label %[[BB83]]
+; CHECK: [[BB83]]:
+; CHECK-NEXT: ret void
+;
+ %9 = icmp sgt i32 %2, 4
+ br i1 %9, label %10, label %83
+
+10:
+ %11 = add nsw i32 %2, -2
+ %12 = getelementptr inbounds nuw i8, ptr %1, i64 4
+ %13 = load i32, ptr %12, align 4
+ %14 = sext i32 %13 to i64
+ %15 = getelementptr inbounds [32 x i8], ptr %0, i64 %14
+ %16 = getelementptr inbounds nuw i8, ptr %15, i64 16
+ %17 = load double, ptr %16, align 8
+ %18 = load i32, ptr %1, align 4
+ %19 = sext i32 %18 to i64
+ %20 = getelementptr inbounds [32 x i8], ptr %0, i64 %19
+ %21 = getelementptr inbounds nuw i8, ptr %20, i64 16
+ %22 = load double, ptr %21, align 8
+ %23 = getelementptr inbounds nuw i8, ptr %15, i64 8
+ %24 = load double, ptr %23, align 8
+ %25 = getelementptr inbounds nuw i8, ptr %20, i64 8
+ %26 = load double, ptr %25, align 8
+ %27 = load double, ptr %15, align 8
+ %28 = load double, ptr %20, align 8
+ %29 = zext nneg i32 %11 to i64
+ br label %30
+
+30:
+ %31 = phi i64 [ 2, %10 ], [ %81, %30 ]
+ %32 = phi i32 [ 0, %10 ], [ %80, %30 ]
+ %33 = phi i32 [ %18, %10 ], [ %54, %30 ]
+ %34 = phi i32 [ %13, %10 ], [ %56, %30 ]
+ %35 = phi double [ %28, %10 ], [ %59, %30 ]
+ %36 = phi double [ %27, %10 ], [ %62, %30 ]
+ %37 = phi double [ %17, %10 ], [ %70, %30 ]
+ %38 = phi double [ %22, %10 ], [ %68, %30 ]
+ %39 = phi double [ %24, %10 ], [ %66, %30 ]
+ %40 = phi double [ %26, %10 ], [ %64, %30 ]
+ %41 = fsub double %3, %35
+ %42 = fsub double %3, %36
+ %43 = fmul double %41, %41
+ %44 = fmul double %42, %42
+ %45 = fsub double %4, %40
+ %46 = fsub double %4, %39
+ %47 = tail call double @llvm.fmuladd.f64(double %45, double %45, double %43)
+ %48 = tail call double @llvm.fmuladd.f64(double %46, double %46, double %44)
+ %49 = fsub double %5, %38
+ %50 = fsub double %5, %37
+ %51 = tail call double @llvm.fmuladd.f64(double %49, double %49, double %47)
+ %52 = tail call double @llvm.fmuladd.f64(double %50, double %50, double %48)
+ %53 = getelementptr inbounds nuw [4 x i8], ptr %1, i64 %31
+ %54 = load i32, ptr %53, align 4
+ %55 = getelementptr inbounds nuw i8, ptr %53, i64 4
+ %56 = load i32, ptr %55, align 4
+ %57 = sext i32 %54 to i64
+ %58 = getelementptr inbounds [32 x i8], ptr %0, i64 %57
+ %59 = load double, ptr %58, align 8
+ %60 = sext i32 %56 to i64
+ %61 = getelementptr inbounds [32 x i8], ptr %0, i64 %60
+ %62 = load double, ptr %61, align 8
+ %63 = getelementptr inbounds nuw i8, ptr %58, i64 8
+ %64 = load double, ptr %63, align 8
+ %65 = getelementptr inbounds nuw i8, ptr %61, i64 8
+ %66 = load double, ptr %65, align 8
+ %67 = getelementptr inbounds nuw i8, ptr %58, i64 16
+ %68 = load double, ptr %67, align 8
+ %69 = getelementptr inbounds nuw i8, ptr %61, i64 16
+ %70 = load double, ptr %69, align 8
+ %71 = fcmp olt double %51, %6
+ %72 = fcmp olt double %52, %6
+ %73 = zext nneg i32 %32 to i64
+ %74 = getelementptr inbounds nuw [4 x i8], ptr %7, i64 %73
+ store i32 %33, ptr %74, align 4
+ %75 = zext i1 %71 to i32
+ %76 = add nuw nsw i32 %32, %75
+ %77 = zext nneg i32 %76 to i64
+ %78 = getelementptr inbounds nuw [4 x i8], ptr %7, i64 %77
+ store i32 %34, ptr %78, align 4
+ %79 = zext i1 %72 to i32
+ %80 = add nuw nsw i32 %76, %79
+ %81 = add nuw nsw i64 %31, 2
+ %82 = icmp samesign ult i64 %81, %29
+ br i1 %82, label %30, label %83
+
+83:
+ ret void
+}
+
+declare double @llvm.fmuladd.f64(double, double, double)
``````````
</details>
https://github.com/llvm/llvm-project/pull/210045
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