[llvm] [GlobalISel] Preserve volatile and atomic undef/poison stores (PR #200099)
Justin Lebar via llvm-commits
llvm-commits at lists.llvm.org
Sat Jul 18 13:59:02 PDT 2026
https://github.com/jlebar updated https://github.com/llvm/llvm-project/pull/200099
>From 6f20f1d9a04709e8e91f40b544154b4380ec201c Mon Sep 17 00:00:00 2001
From: Justin Lebar <justin.lebar at gmail.com>
Date: Wed, 27 May 2026 15:30:17 -0700
Subject: [PATCH 1/2] [GlobalISel] Preserve volatile and ordered atomic undef
stores
It's not correct to elide a volatile or ordered atomic store, even if the
stored value is undef.
If you addrspacecast a pointer to an illegal address space, we fold the
pointer to poison. If you then try to store such a pointer, previously
we would elide the store, but now we sometimes keep it. (Note, the
pointer in the illegal address space here is the value being stored, not
the address that we're storing to.)
On AMDGPU, this causes backend crashes. There are (apparently) tests
that store such values, and the backend wasn't able to lower these "new"
instructions. We teach the backend to handle these stores by casting
the pointer to an integer first.
This bug was found by a large run of Opus 4.7 looking for bugs in LLVM.
Co-Authored-By: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
---
.../lib/CodeGen/GlobalISel/CombinerHelper.cpp | 9 ++-
.../lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 32 ++++++++
.../GlobalISel/legalize-store-global.mir | 78 ++++++++++++-------
.../CodeGen/AMDGPU/invalid-addrspacecast.ll | 21 +++--
.../lower-work-group-id-intrinsics-pal.ll | 6 ++
llvm/test/CodeGen/X86/GlobalISel/undef.ll | 42 ++++++++++
6 files changed, 149 insertions(+), 39 deletions(-)
diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
index a910a900e775f..b886bf4364a2f 100644
--- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
@@ -2880,8 +2880,13 @@ bool CombinerHelper::matchUndefShuffleVectorMask(MachineInstr &MI) const {
bool CombinerHelper::matchUndefStore(MachineInstr &MI) const {
assert(MI.getOpcode() == TargetOpcode::G_STORE);
- return getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MI.getOperand(0).getReg(),
- MRI);
+ auto &Store = cast<GStore>(MI);
+ // An undef store can be erased only if it has no side effects beyond the
+ // value written. That holds for non-atomic and unordered atomic stores, but
+ // not for volatile or ordered atomic stores, which must be preserved.
+ if (!Store.isUnordered())
+ return false;
+ return getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, Store.getValueReg(), MRI);
}
bool CombinerHelper::matchUndefSelectCmp(MachineInstr &MI) const {
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
index 8b5076cdd7712..5c73b0b09c556 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -542,8 +542,20 @@ static bool loadStoreBitcastWorkaround(const LLT Ty) {
return EltSize != 32 && EltSize != 64;
}
+// True for a pointer in an address space beyond the known AMDGPU address
+// spaces (e.g. produced by an illegal addrspacecast). Such pointers have no
+// register class or load/store selection pattern.
+static bool isUnsupportedPointerType(LLT Ty) {
+ return Ty.isPointer() && Ty.getAddressSpace() > AMDGPUAS::MAX_AMDGPU_ADDRESS;
+}
+
static bool isLoadStoreLegal(const GCNSubtarget &ST, const LegalityQuery &Query) {
const LLT Ty = Query.Types[0];
+ // Stores of a pointer in an unsupported address space have no selection
+ // pattern; route them to custom legalization, which reinterprets the stored
+ // value as an integer of the same size.
+ if (Query.Opcode == TargetOpcode::G_STORE && isUnsupportedPointerType(Ty))
+ return false;
return isRegisterType(ST, Ty) && isLoadStoreSizeLegal(ST, Query) &&
!hasBufferRsrcWorkaround(Ty) && !loadStoreBitcastWorkaround(Ty);
}
@@ -1598,6 +1610,15 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST_,
return isLoadStoreLegal(ST, Query);
});
+ // Stores of a pointer in an address space without a register class (e.g.
+ // produced by an illegal addrspacecast) have no selection pattern.
+ // Reinterpret the value as an integer of the same size, which does.
+ if (IsStore) {
+ Actions.customIf([=](const LegalityQuery &Query) -> bool {
+ return isUnsupportedPointerType(Query.Types[0]);
+ });
+ }
+
// The custom pointers (fat pointers, buffer resources) don't work with load
// and store at this level. Fat pointers should have been lowered to
// intrinsics before the translation to MIR.
@@ -3508,6 +3529,17 @@ bool AMDGPULegalizerInfo::legalizeStore(LegalizerHelper &Helper,
Observer.changedInstr(MI);
return true;
}
+
+ // A pointer in an address space without a register class (e.g. produced by
+ // an addrspacecast to an illegal address space) has no store pattern.
+ // Reinterpret the value as an integer of the same size, which does.
+ if (isUnsupportedPointerType(DataTy)) {
+ auto Cast = B.buildPtrToInt(LLT::scalar(DataTy.getSizeInBits()), DataReg);
+ Observer.changingInstr(MI);
+ MI.getOperand(0).setReg(Cast.getReg(0));
+ Observer.changedInstr(MI);
+ return true;
+ }
return false;
}
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
index 0a009e702dea4..ea2671deb9e40 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
@@ -2352,7 +2352,8 @@ body: |
; CI-NEXT: {{ $}}
; CI-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; CI-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; CI-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 1, addrspace 1)
+ ; CI-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
+ ; CI-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 1, addrspace 1)
;
; VI-LABEL: name: test_store_global_p999_align1
; VI: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
@@ -2407,21 +2408,24 @@ body: |
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX9-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX9-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 1, addrspace 1)
+ ; GFX9-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
+ ; GFX9-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 1, addrspace 1)
;
; GFX11-LABEL: name: test_store_global_p999_align1
; GFX11: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX11-NEXT: {{ $}}
; GFX11-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX11-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 1, addrspace 1)
+ ; GFX11-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
+ ; GFX11-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 1, addrspace 1)
;
; GFX12-LABEL: name: test_store_global_p999_align1
; GFX12: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX12-NEXT: {{ $}}
; GFX12-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX12-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 1, addrspace 1)
+ ; GFX12-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
+ ; GFX12-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 1, addrspace 1)
%0:_(p1) = COPY $vgpr0_vgpr1
%1:_(p999) = COPY $vgpr2_vgpr3
G_STORE %1, %0 :: (store (p999), align 1, addrspace 1)
@@ -2464,7 +2468,8 @@ body: |
; CI-NEXT: {{ $}}
; CI-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; CI-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; CI-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 2, addrspace 1)
+ ; CI-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
+ ; CI-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 2, addrspace 1)
;
; VI-LABEL: name: test_store_global_p999_align2
; VI: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
@@ -2497,21 +2502,24 @@ body: |
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX9-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX9-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 2, addrspace 1)
+ ; GFX9-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
+ ; GFX9-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 2, addrspace 1)
;
; GFX11-LABEL: name: test_store_global_p999_align2
; GFX11: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX11-NEXT: {{ $}}
; GFX11-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX11-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 2, addrspace 1)
+ ; GFX11-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
+ ; GFX11-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 2, addrspace 1)
;
; GFX12-LABEL: name: test_store_global_p999_align2
; GFX12: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX12-NEXT: {{ $}}
; GFX12-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX12-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 2, addrspace 1)
+ ; GFX12-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
+ ; GFX12-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 2, addrspace 1)
%0:_(p1) = COPY $vgpr0_vgpr1
%1:_(p999) = COPY $vgpr2_vgpr3
G_STORE %1, %0 :: (store (p999), align 2, addrspace 1)
@@ -2528,42 +2536,48 @@ body: |
; SI-NEXT: {{ $}}
; SI-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; SI-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; SI-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 4, addrspace 1)
+ ; SI-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
+ ; SI-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 4, addrspace 1)
;
; CI-LABEL: name: test_store_global_p999_align4
; CI: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; CI-NEXT: {{ $}}
; CI-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; CI-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; CI-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 4, addrspace 1)
+ ; CI-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
+ ; CI-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 4, addrspace 1)
;
; VI-LABEL: name: test_store_global_p999_align4
; VI: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; VI-NEXT: {{ $}}
; VI-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; VI-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; VI-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 4, addrspace 1)
+ ; VI-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
+ ; VI-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 4, addrspace 1)
;
; GFX9-LABEL: name: test_store_global_p999_align4
; GFX9: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX9-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX9-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 4, addrspace 1)
+ ; GFX9-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
+ ; GFX9-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 4, addrspace 1)
;
; GFX11-LABEL: name: test_store_global_p999_align4
; GFX11: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX11-NEXT: {{ $}}
; GFX11-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX11-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 4, addrspace 1)
+ ; GFX11-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
+ ; GFX11-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 4, addrspace 1)
;
; GFX12-LABEL: name: test_store_global_p999_align4
; GFX12: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX12-NEXT: {{ $}}
; GFX12-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX12-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 4, addrspace 1)
+ ; GFX12-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
+ ; GFX12-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 4, addrspace 1)
%0:_(p1) = COPY $vgpr0_vgpr1
%1:_(p999) = COPY $vgpr2_vgpr3
G_STORE %1, %0 :: (store (p999), align 4, addrspace 1)
@@ -2580,42 +2594,48 @@ body: |
; SI-NEXT: {{ $}}
; SI-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; SI-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; SI-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), addrspace 1)
+ ; SI-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
+ ; SI-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), addrspace 1)
;
; CI-LABEL: name: test_store_global_p999_align8
; CI: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; CI-NEXT: {{ $}}
; CI-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; CI-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; CI-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), addrspace 1)
+ ; CI-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
+ ; CI-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), addrspace 1)
;
; VI-LABEL: name: test_store_global_p999_align8
; VI: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; VI-NEXT: {{ $}}
; VI-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; VI-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; VI-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), addrspace 1)
+ ; VI-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
+ ; VI-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), addrspace 1)
;
; GFX9-LABEL: name: test_store_global_p999_align8
; GFX9: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX9-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX9-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), addrspace 1)
+ ; GFX9-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
+ ; GFX9-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), addrspace 1)
;
; GFX11-LABEL: name: test_store_global_p999_align8
; GFX11: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX11-NEXT: {{ $}}
; GFX11-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX11-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), addrspace 1)
+ ; GFX11-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
+ ; GFX11-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), addrspace 1)
;
; GFX12-LABEL: name: test_store_global_p999_align8
; GFX12: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX12-NEXT: {{ $}}
; GFX12-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX12-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), addrspace 1)
+ ; GFX12-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
+ ; GFX12-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), addrspace 1)
%0:_(p1) = COPY $vgpr0_vgpr1
%1:_(p999) = COPY $vgpr2_vgpr3
G_STORE %1, %0 :: (store (p999), align 8, addrspace 1)
@@ -2632,42 +2652,48 @@ body: |
; SI-NEXT: {{ $}}
; SI-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; SI-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; SI-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 16, addrspace 1)
+ ; SI-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
+ ; SI-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 16, addrspace 1)
;
; CI-LABEL: name: test_store_global_p999_align16
; CI: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; CI-NEXT: {{ $}}
; CI-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; CI-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; CI-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 16, addrspace 1)
+ ; CI-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
+ ; CI-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 16, addrspace 1)
;
; VI-LABEL: name: test_store_global_p999_align16
; VI: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; VI-NEXT: {{ $}}
; VI-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; VI-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; VI-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 16, addrspace 1)
+ ; VI-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
+ ; VI-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 16, addrspace 1)
;
; GFX9-LABEL: name: test_store_global_p999_align16
; GFX9: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX9-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX9-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 16, addrspace 1)
+ ; GFX9-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
+ ; GFX9-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 16, addrspace 1)
;
; GFX11-LABEL: name: test_store_global_p999_align16
; GFX11: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX11-NEXT: {{ $}}
; GFX11-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX11-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 16, addrspace 1)
+ ; GFX11-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
+ ; GFX11-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 16, addrspace 1)
;
; GFX12-LABEL: name: test_store_global_p999_align16
; GFX12: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX12-NEXT: {{ $}}
; GFX12-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX12-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 16, addrspace 1)
+ ; GFX12-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
+ ; GFX12-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 16, addrspace 1)
%0:_(p1) = COPY $vgpr0_vgpr1
%1:_(p999) = COPY $vgpr2_vgpr3
G_STORE %1, %0 :: (store (p999), align 16, addrspace 1)
diff --git a/llvm/test/CodeGen/AMDGPU/invalid-addrspacecast.ll b/llvm/test/CodeGen/AMDGPU/invalid-addrspacecast.ll
index 294c9045ebc14..2ba9f6e1e8e5a 100644
--- a/llvm/test/CodeGen/AMDGPU/invalid-addrspacecast.ll
+++ b/llvm/test/CodeGen/AMDGPU/invalid-addrspacecast.ll
@@ -42,17 +42,16 @@ define amdgpu_kernel void @use_constant32bit_to_local_addrspacecast(ptr addrspac
}
define amdgpu_kernel void @use_local_to_42_addrspacecast(ptr addrspace(3) %ptr) {
-; SDAG-LABEL: use_local_to_42_addrspacecast:
-; SDAG: ; %bb.0:
-; SDAG-NEXT: v_mov_b32_e32 v0, 0
-; SDAG-NEXT: v_mov_b32_e32 v1, 0
-; SDAG-NEXT: flat_store_dwordx2 v[0:1], v[0:1]
-; SDAG-NEXT: s_waitcnt vmcnt(0)
-; SDAG-NEXT: s_endpgm
-;
-; GISEL-LABEL: use_local_to_42_addrspacecast:
-; GISEL: ; %bb.0:
-; GISEL-NEXT: s_endpgm
+; CHECK-LABEL: use_local_to_42_addrspacecast:
+; CHECK: ; %bb.0:
+; CHECK-NEXT: s_mov_b32 flat_scratch_lo, s13
+; CHECK-NEXT: s_add_i32 s12, s12, s17
+; CHECK-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8
+; CHECK-NEXT: v_mov_b32_e32 v0, 0
+; CHECK-NEXT: v_mov_b32_e32 v1, 0
+; CHECK-NEXT: flat_store_dwordx2 v[0:1], v[0:1]
+; CHECK-NEXT: s_waitcnt vmcnt(0)
+; CHECK-NEXT: s_endpgm
%cast = addrspacecast ptr addrspace(3) %ptr to ptr addrspace(42)
store volatile ptr addrspace(42) %cast, ptr addrspace(1) null
ret void
diff --git a/llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll b/llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll
index 94648892373e7..571c6215bd3aa 100644
--- a/llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll
+++ b/llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll
@@ -180,6 +180,12 @@ define amdgpu_gfx void @workgroup_ids_gfx(ptr addrspace(1) %outx, ptr addrspace(
; GFX9-GISEL-LABEL: workgroup_ids_gfx:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-GISEL-NEXT: global_store_dword v[0:1], v0, off
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX9-GISEL-NEXT: global_store_dword v[2:3], v0, off
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX9-GISEL-NEXT: global_store_dword v[4:5], v0, off
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX9ARCH-SDAG-LABEL: workgroup_ids_gfx:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/undef.ll b/llvm/test/CodeGen/X86/GlobalISel/undef.ll
index 34ada8a20999d..3199a96d38244 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/undef.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/undef.ll
@@ -56,3 +56,45 @@ define float @test4(float %a) {
ret float %r
}
+define void @plain_undef_store(ptr %p) {
+; ALL-LABEL: plain_undef_store:
+; ALL: # %bb.0:
+; ALL-NEXT: retq
+ store i32 undef, ptr %p, align 4
+ ret void
+}
+
+define void @volatile_undef_store(ptr %p) {
+; ALL-LABEL: volatile_undef_store:
+; ALL: # %bb.0:
+; ALL-NEXT: movl %eax, (%rdi)
+; ALL-NEXT: retq
+ store volatile i32 undef, ptr %p, align 4
+ ret void
+}
+
+define void @seq_cst_atomic_undef_store(ptr %p) {
+; ALL-LABEL: seq_cst_atomic_undef_store:
+; ALL: # %bb.0:
+; ALL-NEXT: movl %eax, (%rdi)
+; ALL-NEXT: retq
+ store atomic i32 undef, ptr %p seq_cst, align 4
+ ret void
+}
+
+define void @unordered_atomic_undef_store(ptr %p) {
+; ALL-LABEL: unordered_atomic_undef_store:
+; ALL: # %bb.0:
+; ALL-NEXT: retq
+ store atomic i32 undef, ptr %p unordered, align 4
+ ret void
+}
+
+define void @monotonic_atomic_undef_store(ptr %p) {
+; ALL-LABEL: monotonic_atomic_undef_store:
+; ALL: # %bb.0:
+; ALL-NEXT: movl %eax, (%rdi)
+; ALL-NEXT: retq
+ store atomic i32 undef, ptr %p monotonic, align 4
+ ret void
+}
>From d7e3de154fa18276d012c4f45ee05ef23952e898 Mon Sep 17 00:00:00 2001
From: Justin Lebar <justin.lebar at gmail.com>
Date: Sat, 18 Jul 2026 20:57:55 +0000
Subject: [PATCH 2/2] [AMDGPU] Fix stores of unknown-addrspace pointers at
selection, not legalization
A G_STORE whose stored value is a pointer in an address space the
target doesn't know about (e.g. the poison produced by an illegal
addrspacecast) has no selection pattern -- the register class type
lists in SIRegisterInfo.td only name pointers in the known address
spaces -- so selection fails with
cannot select: G_STORE %18:vgpr(p42), %19:vgpr(p1)
The previous commit worked around this in the legalizer by routing
such stores to custom legalization and ptrtoint'ing the stored value.
Per review, unrecognized address spaces are supposed to be treated as
aliases of global, and this belongs in selection, not in the legalizer
rules. Drop the legalizer workaround and instead rewrite the value
operand through a COPY to a same-size integer just before running the
imported patterns, the same thing AArch64's preISelLower does for
pointer-valued stores.
---
.../AMDGPU/AMDGPUInstructionSelector.cpp | 21 +++++
.../lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 32 --------
.../GlobalISel/inst-select-store-global.mir | 75 ++++++++++++++++++
.../GlobalISel/legalize-store-global.mir | 78 +++++++------------
4 files changed, 122 insertions(+), 84 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
index 463b8c40350b2..071104c1dd9c8 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -3159,6 +3159,27 @@ void AMDGPUInstructionSelector::initM0(MachineInstr &I) const {
bool AMDGPUInstructionSelector::selectG_LOAD_STORE_ATOMICRMW(
MachineInstr &I) const {
initM0(I);
+
+ // Pointers in address spaces the target doesn't know about are treated as
+ // aliases of the global address space. Stored values of such pointer types
+ // have no store patterns of their own (the register class type lists only
+ // name pointers in the known address spaces), so rewrite the value operand
+ // through a COPY to an integer of the same size, which the patterns do
+ // match.
+ if (auto *Store = dyn_cast<GStore>(&I)) {
+ Register ValReg = Store->getValueReg();
+ const LLT ValTy = MRI->getType(ValReg);
+ if (ValTy.isPointer() &&
+ ValTy.getAddressSpace() > AMDGPUAS::MAX_AMDGPU_ADDRESS) {
+ Register IntReg =
+ MRI->createGenericVirtualRegister(LLT::scalar(ValTy.getSizeInBits()));
+ MRI->setRegBank(IntReg, *RBI.getRegBank(ValReg, *MRI, TRI));
+ BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(AMDGPU::COPY), IntReg)
+ .addReg(ValReg);
+ I.getOperand(0).setReg(IntReg);
+ }
+ }
+
return selectImpl(I, *CoverageInfo);
}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
index 5c73b0b09c556..8b5076cdd7712 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -542,20 +542,8 @@ static bool loadStoreBitcastWorkaround(const LLT Ty) {
return EltSize != 32 && EltSize != 64;
}
-// True for a pointer in an address space beyond the known AMDGPU address
-// spaces (e.g. produced by an illegal addrspacecast). Such pointers have no
-// register class or load/store selection pattern.
-static bool isUnsupportedPointerType(LLT Ty) {
- return Ty.isPointer() && Ty.getAddressSpace() > AMDGPUAS::MAX_AMDGPU_ADDRESS;
-}
-
static bool isLoadStoreLegal(const GCNSubtarget &ST, const LegalityQuery &Query) {
const LLT Ty = Query.Types[0];
- // Stores of a pointer in an unsupported address space have no selection
- // pattern; route them to custom legalization, which reinterprets the stored
- // value as an integer of the same size.
- if (Query.Opcode == TargetOpcode::G_STORE && isUnsupportedPointerType(Ty))
- return false;
return isRegisterType(ST, Ty) && isLoadStoreSizeLegal(ST, Query) &&
!hasBufferRsrcWorkaround(Ty) && !loadStoreBitcastWorkaround(Ty);
}
@@ -1610,15 +1598,6 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST_,
return isLoadStoreLegal(ST, Query);
});
- // Stores of a pointer in an address space without a register class (e.g.
- // produced by an illegal addrspacecast) have no selection pattern.
- // Reinterpret the value as an integer of the same size, which does.
- if (IsStore) {
- Actions.customIf([=](const LegalityQuery &Query) -> bool {
- return isUnsupportedPointerType(Query.Types[0]);
- });
- }
-
// The custom pointers (fat pointers, buffer resources) don't work with load
// and store at this level. Fat pointers should have been lowered to
// intrinsics before the translation to MIR.
@@ -3529,17 +3508,6 @@ bool AMDGPULegalizerInfo::legalizeStore(LegalizerHelper &Helper,
Observer.changedInstr(MI);
return true;
}
-
- // A pointer in an address space without a register class (e.g. produced by
- // an addrspacecast to an illegal address space) has no store pattern.
- // Reinterpret the value as an integer of the same size, which does.
- if (isUnsupportedPointerType(DataTy)) {
- auto Cast = B.buildPtrToInt(LLT::scalar(DataTy.getSizeInBits()), DataReg);
- Observer.changingInstr(MI);
- MI.getOperand(0).setReg(Cast.getReg(0));
- Observer.changedInstr(MI);
- return true;
- }
return false;
}
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-global.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-global.mir
index 9136f44dfc227..156400b40dd62 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-global.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-global.mir
@@ -896,6 +896,81 @@ body: |
---
+name: store_global_p999
+legalized: true
+tracksRegLiveness: true
+regBankSelected: true
+
+body: |
+ bb.0:
+ liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
+
+ ; GFX6-LABEL: name: store_global_p999
+ ; GFX6: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
+ ; GFX6-NEXT: {{ $}}
+ ; GFX6-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
+ ; GFX6-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
+ ; GFX6-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
+ ; GFX6-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 61440
+ ; GFX6-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_]], %subreg.sub0, [[S_MOV_B32_1]], %subreg.sub1
+ ; GFX6-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 0
+ ; GFX6-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[S_MOV_B64_]], %subreg.sub0_sub1, [[REG_SEQUENCE]], %subreg.sub2_sub3
+ ; GFX6-NEXT: BUFFER_STORE_DWORDX2_ADDR64 [[COPY1]], [[COPY]], [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec :: (store (p999), addrspace 1)
+ ;
+ ; GFX7-LABEL: name: store_global_p999
+ ; GFX7: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
+ ; GFX7-NEXT: {{ $}}
+ ; GFX7-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
+ ; GFX7-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
+ ; GFX7-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
+ ; GFX7-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 61440
+ ; GFX7-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_]], %subreg.sub0, [[S_MOV_B32_1]], %subreg.sub1
+ ; GFX7-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 0
+ ; GFX7-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[S_MOV_B64_]], %subreg.sub0_sub1, [[REG_SEQUENCE]], %subreg.sub2_sub3
+ ; GFX7-NEXT: BUFFER_STORE_DWORDX2_ADDR64 [[COPY1]], [[COPY]], [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec :: (store (p999), addrspace 1)
+ ;
+ ; GFX7-FLAT-LABEL: name: store_global_p999
+ ; GFX7-FLAT: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
+ ; GFX7-FLAT-NEXT: {{ $}}
+ ; GFX7-FLAT-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
+ ; GFX7-FLAT-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
+ ; GFX7-FLAT-NEXT: FLAT_STORE_DWORDX2 [[COPY]], [[COPY1]], 0, 0, implicit $exec, implicit $flat_scr :: (store (p999), addrspace 1)
+ ;
+ ; GFX8-LABEL: name: store_global_p999
+ ; GFX8: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
+ ; GFX8-NEXT: {{ $}}
+ ; GFX8-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
+ ; GFX8-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
+ ; GFX8-NEXT: FLAT_STORE_DWORDX2 [[COPY]], [[COPY1]], 0, 0, implicit $exec, implicit $flat_scr :: (store (p999), addrspace 1)
+ ;
+ ; GFX9-LABEL: name: store_global_p999
+ ; GFX9: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
+ ; GFX9-NEXT: {{ $}}
+ ; GFX9-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
+ ; GFX9-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
+ ; GFX9-NEXT: GLOBAL_STORE_DWORDX2 [[COPY]], [[COPY1]], 0, 0, implicit $exec :: (store (p999), addrspace 1)
+ ;
+ ; GFX10-LABEL: name: store_global_p999
+ ; GFX10: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
+ ; GFX10-NEXT: {{ $}}
+ ; GFX10-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
+ ; GFX10-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
+ ; GFX10-NEXT: GLOBAL_STORE_DWORDX2 [[COPY]], [[COPY1]], 0, 0, implicit $exec :: (store (p999), addrspace 1)
+ ;
+ ; GFX12-LABEL: name: store_global_p999
+ ; GFX12: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
+ ; GFX12-NEXT: {{ $}}
+ ; GFX12-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
+ ; GFX12-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
+ ; GFX12-NEXT: GLOBAL_STORE_DWORDX2 [[COPY]], [[COPY1]], 0, 0, implicit $exec :: (store (p999), addrspace 1)
+ %0:vgpr(p1) = COPY $vgpr0_vgpr1
+ %1:vgpr(p999) = COPY $vgpr2_vgpr3
+ G_STORE %1, %0 :: (store (p999), align 8, addrspace 1)
+
+...
+
+---
+
name: store_global_v2p1
legalized: true
tracksRegLiveness: true
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
index ea2671deb9e40..0a009e702dea4 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
@@ -2352,8 +2352,7 @@ body: |
; CI-NEXT: {{ $}}
; CI-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; CI-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; CI-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
- ; CI-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 1, addrspace 1)
+ ; CI-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 1, addrspace 1)
;
; VI-LABEL: name: test_store_global_p999_align1
; VI: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
@@ -2408,24 +2407,21 @@ body: |
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX9-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX9-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
- ; GFX9-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 1, addrspace 1)
+ ; GFX9-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 1, addrspace 1)
;
; GFX11-LABEL: name: test_store_global_p999_align1
; GFX11: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX11-NEXT: {{ $}}
; GFX11-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX11-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
- ; GFX11-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 1, addrspace 1)
+ ; GFX11-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 1, addrspace 1)
;
; GFX12-LABEL: name: test_store_global_p999_align1
; GFX12: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX12-NEXT: {{ $}}
; GFX12-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX12-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
- ; GFX12-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 1, addrspace 1)
+ ; GFX12-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 1, addrspace 1)
%0:_(p1) = COPY $vgpr0_vgpr1
%1:_(p999) = COPY $vgpr2_vgpr3
G_STORE %1, %0 :: (store (p999), align 1, addrspace 1)
@@ -2468,8 +2464,7 @@ body: |
; CI-NEXT: {{ $}}
; CI-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; CI-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; CI-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
- ; CI-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 2, addrspace 1)
+ ; CI-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 2, addrspace 1)
;
; VI-LABEL: name: test_store_global_p999_align2
; VI: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
@@ -2502,24 +2497,21 @@ body: |
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX9-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX9-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
- ; GFX9-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 2, addrspace 1)
+ ; GFX9-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 2, addrspace 1)
;
; GFX11-LABEL: name: test_store_global_p999_align2
; GFX11: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX11-NEXT: {{ $}}
; GFX11-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX11-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
- ; GFX11-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 2, addrspace 1)
+ ; GFX11-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 2, addrspace 1)
;
; GFX12-LABEL: name: test_store_global_p999_align2
; GFX12: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX12-NEXT: {{ $}}
; GFX12-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX12-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
- ; GFX12-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 2, addrspace 1)
+ ; GFX12-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 2, addrspace 1)
%0:_(p1) = COPY $vgpr0_vgpr1
%1:_(p999) = COPY $vgpr2_vgpr3
G_STORE %1, %0 :: (store (p999), align 2, addrspace 1)
@@ -2536,48 +2528,42 @@ body: |
; SI-NEXT: {{ $}}
; SI-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; SI-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; SI-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
- ; SI-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 4, addrspace 1)
+ ; SI-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 4, addrspace 1)
;
; CI-LABEL: name: test_store_global_p999_align4
; CI: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; CI-NEXT: {{ $}}
; CI-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; CI-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; CI-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
- ; CI-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 4, addrspace 1)
+ ; CI-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 4, addrspace 1)
;
; VI-LABEL: name: test_store_global_p999_align4
; VI: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; VI-NEXT: {{ $}}
; VI-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; VI-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; VI-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
- ; VI-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 4, addrspace 1)
+ ; VI-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 4, addrspace 1)
;
; GFX9-LABEL: name: test_store_global_p999_align4
; GFX9: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX9-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX9-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
- ; GFX9-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 4, addrspace 1)
+ ; GFX9-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 4, addrspace 1)
;
; GFX11-LABEL: name: test_store_global_p999_align4
; GFX11: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX11-NEXT: {{ $}}
; GFX11-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX11-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
- ; GFX11-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 4, addrspace 1)
+ ; GFX11-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 4, addrspace 1)
;
; GFX12-LABEL: name: test_store_global_p999_align4
; GFX12: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX12-NEXT: {{ $}}
; GFX12-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX12-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
- ; GFX12-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 4, addrspace 1)
+ ; GFX12-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 4, addrspace 1)
%0:_(p1) = COPY $vgpr0_vgpr1
%1:_(p999) = COPY $vgpr2_vgpr3
G_STORE %1, %0 :: (store (p999), align 4, addrspace 1)
@@ -2594,48 +2580,42 @@ body: |
; SI-NEXT: {{ $}}
; SI-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; SI-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; SI-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
- ; SI-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), addrspace 1)
+ ; SI-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), addrspace 1)
;
; CI-LABEL: name: test_store_global_p999_align8
; CI: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; CI-NEXT: {{ $}}
; CI-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; CI-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; CI-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
- ; CI-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), addrspace 1)
+ ; CI-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), addrspace 1)
;
; VI-LABEL: name: test_store_global_p999_align8
; VI: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; VI-NEXT: {{ $}}
; VI-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; VI-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; VI-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
- ; VI-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), addrspace 1)
+ ; VI-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), addrspace 1)
;
; GFX9-LABEL: name: test_store_global_p999_align8
; GFX9: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX9-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX9-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
- ; GFX9-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), addrspace 1)
+ ; GFX9-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), addrspace 1)
;
; GFX11-LABEL: name: test_store_global_p999_align8
; GFX11: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX11-NEXT: {{ $}}
; GFX11-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX11-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
- ; GFX11-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), addrspace 1)
+ ; GFX11-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), addrspace 1)
;
; GFX12-LABEL: name: test_store_global_p999_align8
; GFX12: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX12-NEXT: {{ $}}
; GFX12-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX12-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
- ; GFX12-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), addrspace 1)
+ ; GFX12-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), addrspace 1)
%0:_(p1) = COPY $vgpr0_vgpr1
%1:_(p999) = COPY $vgpr2_vgpr3
G_STORE %1, %0 :: (store (p999), align 8, addrspace 1)
@@ -2652,48 +2632,42 @@ body: |
; SI-NEXT: {{ $}}
; SI-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; SI-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; SI-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
- ; SI-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 16, addrspace 1)
+ ; SI-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 16, addrspace 1)
;
; CI-LABEL: name: test_store_global_p999_align16
; CI: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; CI-NEXT: {{ $}}
; CI-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; CI-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; CI-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
- ; CI-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 16, addrspace 1)
+ ; CI-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 16, addrspace 1)
;
; VI-LABEL: name: test_store_global_p999_align16
; VI: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; VI-NEXT: {{ $}}
; VI-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; VI-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; VI-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
- ; VI-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 16, addrspace 1)
+ ; VI-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 16, addrspace 1)
;
; GFX9-LABEL: name: test_store_global_p999_align16
; GFX9: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX9-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX9-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
- ; GFX9-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 16, addrspace 1)
+ ; GFX9-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 16, addrspace 1)
;
; GFX11-LABEL: name: test_store_global_p999_align16
; GFX11: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX11-NEXT: {{ $}}
; GFX11-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX11-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
- ; GFX11-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 16, addrspace 1)
+ ; GFX11-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 16, addrspace 1)
;
; GFX12-LABEL: name: test_store_global_p999_align16
; GFX12: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX12-NEXT: {{ $}}
; GFX12-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(p999) = COPY $vgpr2_vgpr3
- ; GFX12-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY1]](p999)
- ; GFX12-NEXT: G_STORE [[PTRTOINT]](s64), [[COPY]](p1) :: (store (p999), align 16, addrspace 1)
+ ; GFX12-NEXT: G_STORE [[COPY1]](p999), [[COPY]](p1) :: (store (p999), align 16, addrspace 1)
%0:_(p1) = COPY $vgpr0_vgpr1
%1:_(p999) = COPY $vgpr2_vgpr3
G_STORE %1, %0 :: (store (p999), align 16, addrspace 1)
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