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@@ -1223,6 +1223,62 @@ define float @v_copysign_f32_0_f16(half %sign) {
ret float %result
}
+define float @v_copysign_f32_0_fneg(float %sign) {
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arsenm wrote:
Test SALU variants of these patterns
https://github.com/llvm/llvm-project/pull/207178