[llvm] [X86] Select i8 ANDN via i32 promotion (PR #205050)

[via llvm-commits]

================
@@ -165,25 +165,45 @@ define i16 @andnot_rotl_i16(i16 %a0, i16 %a1, i16 %a2) nounwind {
 }
 
 define i8 @andnot_rotl_i8(i8 %a0, i8 %a1, i8 %a2) nounwind {
-; X86-LABEL: andnot_rotl_i8:
-; X86:       # %bb.0:
-; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT:    rolb %cl, %al
-; X86-NEXT:    notb %al
-; X86-NEXT:    andb {{[0-9]+}}(%esp), %al
-; X86-NEXT:    retl
+; X86-NOBMI-LABEL: andnot_rotl_i8:
+; X86-NOBMI:       # %bb.0:
+; X86-NOBMI-NEXT:    movzbl {{[0-9]+}}(%esp), %ecx
+; X86-NOBMI-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
+; X86-NOBMI-NEXT:    rolb %cl, %al
+; X86-NOBMI-NEXT:    notb %al
+; X86-NOBMI-NEXT:    andb {{[0-9]+}}(%esp), %al
+; X86-NOBMI-NEXT:    retl
 ;
-; X64-LABEL: andnot_rotl_i8:
-; X64:       # %bb.0:
-; X64-NEXT:    movl %edx, %ecx
-; X64-NEXT:    movl %esi, %eax
-; X64-NEXT:    # kill: def $cl killed $cl killed $ecx
-; X64-NEXT:    rolb %cl, %al
-; X64-NEXT:    notb %al
-; X64-NEXT:    andb %dil, %al
-; X64-NEXT:    # kill: def $al killed $al killed $eax
-; X64-NEXT:    retq
+; X86-BMI-LABEL: andnot_rotl_i8:
+; X86-BMI:       # %bb.0:
+; X86-BMI-NEXT:    movzbl {{[0-9]+}}(%esp), %ecx
+; X86-BMI-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
+; X86-BMI-NEXT:    rolb %cl, %al
+; X86-BMI-NEXT:    movzbl %al, %eax
+; X86-BMI-NEXT:    andnl {{[0-9]+}}(%esp), %eax, %eax
----------------
mygitljf wrote:

The current i686 case reads an ABI-promoted four-byte argument slot. For a genuine `load i8`, the extending load retains the `i8` memory type,so it should use a byte load instead of matching `ANDN32rm`. I'll add a pointer-load regression test to make this explicit.

https://github.com/llvm/llvm-project/pull/205050