[llvm] [RISCV][MC] Emit Better Token Diagnostics (PR #209700)

[Sam Elliott via llvm-commits]

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@@ -30,13 +30,13 @@ c.sdsp t1, -8(sp) # CHECK: :[[@LINE]]:12: error: immediate must be a multiple of
 c.ld  s0, -8(sp)
 # CHECK: :[[@LINE-1]]:1: error: invalid instruction, any one of the following would fix this:
 # CHECK: :[[@LINE-2]]:7: note: register must be a GPR from x8 to x15
-# CHECK: :[[@LINE-3]]:11: note: invalid operand for instruction
+# CHECK: :[[@LINE-3]]:11: note: expected '('
 # CHECK: :[[@LINE-4]]:11: note: immediate must be a multiple of 8 bytes in the range [0, 248]
 
 c.sd  s0, 256(sp)
 # CHECK: :[[@LINE-1]]:1: error: invalid instruction, any one of the following would fix this:
 # CHECK: :[[@LINE-2]]:7: note: register must be a GPR from x8 to x15
-# CHECK: :[[@LINE-3]]:11: note: invalid operand for instruction
+# CHECK: :[[@LINE-3]]:11: note: expected '('
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lenary wrote:

I sort-of agree but still think this PR is broadly a step forward.

I think in the long run we want to revisit the immediate being optional in the `offset(reg)` syntax, which right now is implemented with aliases. Using aliases means there are two asm match table entries for basically every single instruction, one with the immediate and one without, and each row is considered separately for "near  miss" errors.



https://github.com/llvm/llvm-project/pull/209700